Commit d538ee1b54b78295dbc3bd0d8c5d5fafa5c9e343
1 parent
4d2749be62
Exists in
v2017.01-smarct4x
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net: emaclite: Move driver to DM
Move driver to DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Showing 5 changed files with 92 additions and 111 deletions Side-by-side Diff
board/xilinx/microblaze-generic/microblaze-generic.c
... | ... | @@ -12,7 +12,6 @@ |
12 | 12 | #include <common.h> |
13 | 13 | #include <config.h> |
14 | 14 | #include <fdtdec.h> |
15 | -#include <netdev.h> | |
16 | 15 | #include <asm/processor.h> |
17 | 16 | #include <asm/microblaze_intc.h> |
18 | 17 | #include <asm/asm.h> |
... | ... | @@ -99,25 +98,5 @@ |
99 | 98 | void board_init(void) |
100 | 99 | { |
101 | 100 | gpio_init(); |
102 | -} | |
103 | - | |
104 | -int board_eth_init(bd_t *bis) | |
105 | -{ | |
106 | - int ret = 0; | |
107 | - | |
108 | -#if defined(CONFIG_XILINX_EMACLITE) && defined(XILINX_EMACLITE_BASEADDR) | |
109 | - u32 txpp = 0; | |
110 | - u32 rxpp = 0; | |
111 | -# ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG | |
112 | - txpp = 1; | |
113 | -# endif | |
114 | -# ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG | |
115 | - rxpp = 1; | |
116 | -# endif | |
117 | - ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR, | |
118 | - txpp, rxpp); | |
119 | -#endif | |
120 | - | |
121 | - return ret; | |
122 | 101 | } |
board/xilinx/zynq/board.c
... | ... | @@ -8,7 +8,6 @@ |
8 | 8 | #include <fdtdec.h> |
9 | 9 | #include <fpga.h> |
10 | 10 | #include <mmc.h> |
11 | -#include <netdev.h> | |
12 | 11 | #include <zynqpl.h> |
13 | 12 | #include <asm/arch/hardware.h> |
14 | 13 | #include <asm/arch/sys_proto.h> |
... | ... | @@ -98,25 +97,6 @@ |
98 | 97 | return 0; |
99 | 98 | } |
100 | 99 | #endif |
101 | - | |
102 | -int board_eth_init(bd_t *bis) | |
103 | -{ | |
104 | - u32 ret = 0; | |
105 | - | |
106 | -#ifdef CONFIG_XILINX_EMACLITE | |
107 | - u32 txpp = 0; | |
108 | - u32 rxpp = 0; | |
109 | -# ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG | |
110 | - txpp = 1; | |
111 | -# endif | |
112 | -# ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG | |
113 | - rxpp = 1; | |
114 | -# endif | |
115 | - ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR, | |
116 | - txpp, rxpp); | |
117 | -#endif | |
118 | - return ret; | |
119 | -} | |
120 | 100 | |
121 | 101 | int dram_init(void) |
122 | 102 | { |
configs/microblaze-generic_defconfig
drivers/net/xilinx_emaclite.c
... | ... | @@ -10,6 +10,7 @@ |
10 | 10 | #include <common.h> |
11 | 11 | #include <net.h> |
12 | 12 | #include <config.h> |
13 | +#include <dm.h> | |
13 | 14 | #include <console.h> |
14 | 15 | #include <malloc.h> |
15 | 16 | #include <asm/io.h> |
... | ... | @@ -19,7 +20,7 @@ |
19 | 20 | #include <asm-generic/errno.h> |
20 | 21 | #include <linux/kernel.h> |
21 | 22 | |
22 | -#undef DEBUG | |
23 | +DECLARE_GLOBAL_DATA_PTR; | |
23 | 24 | |
24 | 25 | #define ENET_ADDR_LENGTH 6 |
25 | 26 | #define ETH_FCS_LEN 4 /* Octets in the FCS */ |
... | ... | @@ -146,7 +147,6 @@ |
146 | 147 | *to32ptr++ = alignbuffer; |
147 | 148 | } |
148 | 149 | |
149 | -#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB) | |
150 | 150 | static int wait_for_bit(const char *func, u32 *reg, const u32 mask, |
151 | 151 | bool set, unsigned int timeout) |
152 | 152 | { |
153 | 153 | |
... | ... | @@ -231,9 +231,8 @@ |
231 | 231 | |
232 | 232 | return 0; |
233 | 233 | } |
234 | -#endif | |
235 | 234 | |
236 | -static void emaclite_halt(struct eth_device *dev) | |
235 | +static void emaclite_halt(struct udevice *dev) | |
237 | 236 | { |
238 | 237 | debug("eth_halt\n"); |
239 | 238 | } |
240 | 239 | |
... | ... | @@ -249,12 +248,11 @@ |
249 | 248 | */ |
250 | 249 | #define PHY_DETECT_MASK 0x1808 |
251 | 250 | |
252 | -#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB) | |
253 | -static int setup_phy(struct eth_device *dev) | |
251 | +static int setup_phy(struct udevice *dev) | |
254 | 252 | { |
255 | 253 | int i; |
256 | 254 | u16 phyreg; |
257 | - struct xemaclite *emaclite = dev->priv; | |
255 | + struct xemaclite *emaclite = dev_get_priv(dev); | |
258 | 256 | struct phy_device *phydev; |
259 | 257 | |
260 | 258 | u32 supported = SUPPORTED_10baseT_Half | |
261 | 259 | |
262 | 260 | |
... | ... | @@ -314,11 +312,11 @@ |
314 | 312 | /* Do not setup anything */ |
315 | 313 | return 1; |
316 | 314 | } |
317 | -#endif | |
318 | 315 | |
319 | -static int emaclite_init(struct eth_device *dev, bd_t *bis) | |
316 | +static int emaclite_init(struct udevice *dev) | |
320 | 317 | { |
321 | - struct xemaclite *emaclite = dev->priv; | |
318 | + struct xemaclite *emaclite = dev_get_priv(dev); | |
319 | + struct eth_pdata *pdata = dev_get_platdata(dev); | |
322 | 320 | struct emaclite_regs *regs = emaclite->regs; |
323 | 321 | |
324 | 322 | debug("EmacLite Initialization Started\n"); |
... | ... | @@ -329,7 +327,7 @@ |
329 | 327 | /* Restart PING TX */ |
330 | 328 | out_be32(®s->tx_ping_tsr, 0); |
331 | 329 | /* Copy MAC address */ |
332 | - xemaclite_alignedwrite(dev->enetaddr, ®s->tx_ping, | |
330 | + xemaclite_alignedwrite(pdata->enetaddr, ®s->tx_ping, | |
333 | 331 | ENET_ADDR_LENGTH); |
334 | 332 | /* Set the length */ |
335 | 333 | out_be32(®s->tx_ping_tplr, ENET_ADDR_LENGTH); |
... | ... | @@ -343,7 +341,7 @@ |
343 | 341 | if (emaclite->txpp) { |
344 | 342 | /* The same operation with PONG TX */ |
345 | 343 | out_be32(®s->tx_pong_tsr, 0); |
346 | - xemaclite_alignedwrite(dev->enetaddr, ®s->tx_pong, | |
344 | + xemaclite_alignedwrite(pdata->enetaddr, ®s->tx_pong, | |
347 | 345 | ENET_ADDR_LENGTH); |
348 | 346 | out_be32(®s->tx_pong_tplr, ENET_ADDR_LENGTH); |
349 | 347 | out_be32(®s->tx_pong_tsr, XEL_TSR_PROG_MAC_ADDR); |
350 | 348 | |
... | ... | @@ -361,12 +359,11 @@ |
361 | 359 | if (emaclite->rxpp) |
362 | 360 | out_be32(®s->rx_pong_rsr, XEL_RSR_RECV_IE_MASK); |
363 | 361 | |
364 | -#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB) | |
365 | 362 | out_be32(®s->mdioctrl, XEL_MDIOCTRL_MDIOEN_MASK); |
366 | 363 | if (in_be32(®s->mdioctrl) & XEL_MDIOCTRL_MDIOEN_MASK) |
367 | 364 | if (!setup_phy(dev)) |
368 | 365 | return -1; |
369 | -#endif | |
366 | + | |
370 | 367 | debug("EmacLite Initialization complete\n"); |
371 | 368 | return 0; |
372 | 369 | } |
373 | 370 | |
... | ... | @@ -387,10 +384,10 @@ |
387 | 384 | return !(tmp & XEL_TSR_XMIT_BUSY_MASK); |
388 | 385 | } |
389 | 386 | |
390 | -static int emaclite_send(struct eth_device *dev, void *ptr, int len) | |
387 | +static int emaclite_send(struct udevice *dev, void *ptr, int len) | |
391 | 388 | { |
392 | 389 | u32 reg; |
393 | - struct xemaclite *emaclite = dev->priv; | |
390 | + struct xemaclite *emaclite = dev_get_priv(dev); | |
394 | 391 | struct emaclite_regs *regs = emaclite->regs; |
395 | 392 | |
396 | 393 | u32 maxtry = 1000; |
... | ... | @@ -448,7 +445,7 @@ |
448 | 445 | return -1; |
449 | 446 | } |
450 | 447 | |
451 | -static int emaclite_recv(struct eth_device *dev) | |
448 | +static int emaclite_recv(struct udevice *dev, int flags, uchar **packetp) | |
452 | 449 | { |
453 | 450 | u32 length, first_read, reg, attempt = 0; |
454 | 451 | void *addr, *ack; |
455 | 452 | |
456 | 453 | |
457 | 454 | |
458 | 455 | |
459 | 456 | |
460 | 457 | |
461 | 458 | |
462 | 459 | |
463 | 460 | |
464 | 461 | |
465 | 462 | |
466 | 463 | |
467 | 464 | |
468 | 465 | |
469 | 466 | |
470 | 467 | |
471 | 468 | |
472 | 469 | |
473 | 470 | |
474 | 471 | |
475 | 472 | |
... | ... | @@ -532,79 +529,105 @@ |
532 | 529 | |
533 | 530 | debug("Packet receive from 0x%p, length %dB\n", addr, length); |
534 | 531 | net_process_received_packet((uchar *)etherrxbuff, length); |
535 | - return length; | |
536 | - | |
532 | + return 0; | |
537 | 533 | } |
538 | 534 | |
539 | -#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB) | |
540 | -static int emaclite_miiphy_read(const char *devname, uchar addr, | |
541 | - uchar reg, ushort *val) | |
535 | +static int emaclite_miiphy_read(struct mii_dev *bus, int addr, | |
536 | + int devad, int reg) | |
542 | 537 | { |
543 | 538 | u32 ret; |
544 | - struct eth_device *dev = eth_get_dev(); | |
539 | + u16 val = 0; | |
545 | 540 | |
546 | - ret = phyread(dev->priv, addr, reg, val); | |
547 | - debug("emaclite: Read MII 0x%x, 0x%x, 0x%x\n", addr, reg, *val); | |
548 | - return ret; | |
541 | + ret = phyread(bus->priv, addr, reg, &val); | |
542 | + debug("emaclite: Read MII 0x%x, 0x%x, 0x%x, %d\n", addr, reg, val, ret); | |
543 | + return val; | |
549 | 544 | } |
550 | 545 | |
551 | -static int emaclite_miiphy_write(const char *devname, uchar addr, | |
552 | - uchar reg, ushort val) | |
546 | +static int emaclite_miiphy_write(struct mii_dev *bus, int addr, int devad, | |
547 | + int reg, u16 value) | |
553 | 548 | { |
554 | - struct eth_device *dev = eth_get_dev(); | |
555 | - | |
556 | - debug("emaclite: Write MII 0x%x, 0x%x, 0x%x\n", addr, reg, val); | |
557 | - return phywrite(dev->priv, addr, reg, val); | |
549 | + debug("emaclite: Write MII 0x%x, 0x%x, 0x%x\n", addr, reg, value); | |
550 | + return phywrite(bus->priv, addr, reg, value); | |
558 | 551 | } |
559 | -#endif | |
560 | 552 | |
561 | -int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr, | |
562 | - int txpp, int rxpp) | |
553 | +static int emaclite_probe(struct udevice *dev) | |
563 | 554 | { |
564 | - struct eth_device *dev; | |
565 | - struct xemaclite *emaclite; | |
566 | - struct emaclite_regs *regs; | |
555 | + struct xemaclite *emaclite = dev_get_priv(dev); | |
556 | + int ret; | |
567 | 557 | |
568 | - dev = calloc(1, sizeof(*dev)); | |
569 | - if (dev == NULL) | |
570 | - return -1; | |
558 | + emaclite->bus = mdio_alloc(); | |
559 | + emaclite->bus->read = emaclite_miiphy_read; | |
560 | + emaclite->bus->write = emaclite_miiphy_write; | |
561 | + emaclite->bus->priv = emaclite; | |
562 | + strcpy(emaclite->bus->name, "emaclite"); | |
571 | 563 | |
572 | - emaclite = calloc(1, sizeof(struct xemaclite)); | |
573 | - if (emaclite == NULL) { | |
574 | - free(dev); | |
575 | - return -1; | |
576 | - } | |
564 | + ret = mdio_register(emaclite->bus); | |
565 | + if (ret) | |
566 | + return ret; | |
577 | 567 | |
578 | - dev->priv = emaclite; | |
568 | + return 0; | |
569 | +} | |
579 | 570 | |
580 | - emaclite->txpp = txpp; | |
581 | - emaclite->rxpp = rxpp; | |
571 | +static int emaclite_remove(struct udevice *dev) | |
572 | +{ | |
573 | + struct xemaclite *emaclite = dev_get_priv(dev); | |
582 | 574 | |
583 | - sprintf(dev->name, "Xelite.%lx", base_addr); | |
575 | + free(emaclite->phydev); | |
576 | + mdio_unregister(emaclite->bus); | |
577 | + mdio_free(emaclite->bus); | |
584 | 578 | |
585 | - emaclite->regs = (struct emaclite_regs *)base_addr; | |
586 | - regs = emaclite->regs; | |
587 | - dev->iobase = base_addr; | |
588 | - dev->init = emaclite_init; | |
589 | - dev->halt = emaclite_halt; | |
590 | - dev->send = emaclite_send; | |
591 | - dev->recv = emaclite_recv; | |
579 | + return 0; | |
580 | +} | |
592 | 581 | |
593 | -#ifdef CONFIG_PHY_ADDR | |
594 | - emaclite->phyaddr = CONFIG_PHY_ADDR; | |
595 | -#else | |
582 | +static const struct eth_ops emaclite_ops = { | |
583 | + .start = emaclite_init, | |
584 | + .send = emaclite_send, | |
585 | + .recv = emaclite_recv, | |
586 | + .stop = emaclite_halt, | |
587 | +}; | |
588 | + | |
589 | +static int emaclite_ofdata_to_platdata(struct udevice *dev) | |
590 | +{ | |
591 | + struct eth_pdata *pdata = dev_get_platdata(dev); | |
592 | + struct xemaclite *emaclite = dev_get_priv(dev); | |
593 | + int offset = 0; | |
594 | + | |
595 | + pdata->iobase = (phys_addr_t)dev_get_addr(dev); | |
596 | + emaclite->regs = (struct emaclite_regs *)pdata->iobase; | |
597 | + | |
596 | 598 | emaclite->phyaddr = -1; |
597 | -#endif | |
598 | 599 | |
599 | - eth_register(dev); | |
600 | + offset = fdtdec_lookup_phandle(gd->fdt_blob, dev->of_offset, | |
601 | + "phy-handle"); | |
602 | + if (offset > 0) | |
603 | + emaclite->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, | |
604 | + "reg", -1); | |
600 | 605 | |
601 | -#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB) | |
602 | - miiphy_register(dev->name, emaclite_miiphy_read, emaclite_miiphy_write); | |
603 | - emaclite->bus = miiphy_get_dev_by_name(dev->name); | |
606 | + emaclite->txpp = fdtdec_get_int(gd->fdt_blob, dev->of_offset, | |
607 | + "xlnx,tx-ping-pong", 0); | |
608 | + emaclite->rxpp = fdtdec_get_int(gd->fdt_blob, dev->of_offset, | |
609 | + "xlnx,rx-ping-pong", 0); | |
604 | 610 | |
605 | - out_be32(®s->mdioctrl, XEL_MDIOCTRL_MDIOEN_MASK); | |
606 | -#endif | |
611 | + printf("EMACLITE: %lx, phyaddr %d, %d/%d\n", (ulong)emaclite->regs, | |
612 | + emaclite->phyaddr, emaclite->txpp, emaclite->rxpp); | |
607 | 613 | |
608 | - return 1; | |
614 | + return 0; | |
609 | 615 | } |
616 | + | |
617 | +static const struct udevice_id emaclite_ids[] = { | |
618 | + { .compatible = "xlnx,xps-ethernetlite-1.00.a" }, | |
619 | + { } | |
620 | +}; | |
621 | + | |
622 | +U_BOOT_DRIVER(emaclite) = { | |
623 | + .name = "emaclite", | |
624 | + .id = UCLASS_ETH, | |
625 | + .of_match = emaclite_ids, | |
626 | + .ofdata_to_platdata = emaclite_ofdata_to_platdata, | |
627 | + .probe = emaclite_probe, | |
628 | + .remove = emaclite_remove, | |
629 | + .ops = &emaclite_ops, | |
630 | + .priv_auto_alloc_size = sizeof(struct xemaclite), | |
631 | + .platdata_auto_alloc_size = sizeof(struct eth_pdata), | |
632 | +}; |
include/netdev.h
... | ... | @@ -80,8 +80,6 @@ |
80 | 80 | int uec_standard_init(bd_t *bis); |
81 | 81 | int uli526x_initialize(bd_t *bis); |
82 | 82 | int armada100_fec_register(unsigned long base_addr); |
83 | -int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr, | |
84 | - int txpp, int rxpp); | |
85 | 83 | int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags, |
86 | 84 | unsigned long ctrl_addr); |
87 | 85 | /* |