Commit d6d50db8a32674e56d4464688b1d74c9edaab550

Authored by Simon Glass
Committed by Bin Meng
1 parent 963a811ab4

x86: gpio: Correct GPIO setup ordering

The Intel GPIO driver can set up the GPIO pin mapping when the first GPIO
is probed. However, it assumes that the first GPIO to be probed is in the
first GPIO bank. If this is not the case then the init will write to the
wrong registers.

Fix this. Also add a note that this code is deprecated. We should move to
using device tree instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

Showing 2 changed files with 8 additions and 1 deletions Side-by-side Diff

arch/x86/include/asm/gpio.h
... ... @@ -12,6 +12,7 @@
12 12 struct ich6_bank_platdata {
13 13 uint16_t base_addr;
14 14 const char *bank_name;
  15 + int offset;
15 16 };
16 17  
17 18 #define GPIO_MODE_NATIVE 0
... ... @@ -146,6 +147,10 @@
146 147 } set3;
147 148 };
148 149  
  150 +/*
  151 + * Deprecated functions to set up the GPIO map. The device tree should be used
  152 + * instead.
  153 + */
149 154 int gpio_ich6_pinctrl_init(void);
150 155 void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio);
151 156 void ich_gpio_set_gpio_map(const struct pch_gpio_map *map);
drivers/gpio/intel_ich6_gpio.c
... ... @@ -279,6 +279,7 @@
279 279 debug("%s: Invalid register offset %d\n", __func__, offset);
280 280 return -EINVAL;
281 281 }
  282 + plat->offset = offset;
282 283 plat->base_addr = gpiobase + offset;
283 284 plat->bank_name = fdt_getprop(gd->fdt_blob, dev->of_offset,
284 285 "bank-name", NULL);
... ... @@ -293,7 +294,8 @@
293 294 struct ich6_bank_priv *bank = dev_get_priv(dev);
294 295  
295 296 if (gd->arch.gpio_map) {
296   - setup_pch_gpios(plat->base_addr, gd->arch.gpio_map);
  297 + setup_pch_gpios(plat->base_addr - plat->offset,
  298 + gd->arch.gpio_map);
297 299 gd->arch.gpio_map = NULL;
298 300 }
299 301