Commit d791b1dc3e64a6a6317293245d884589bc5c6277

Authored by wdenk
1 parent 4a6fd34b26
Exists in master and in 55 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, emb_lf_v2023.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

* Make sure Block Lock Bits get cleared in R360MPI flash driver

* MPC823 LCD driver: Fill color map backwards, to allow for steady
  display when Linux takes over

* Patch by Erwin Rol, 27 Feb 2003:
  Add support for RTEMS (this time for real).

* Add support for "bmp info" and "bmp display" commands to load
  bitmap images; this can be used (for example in a "preboot"
  command) to display a splash screen very quickly after poweron.

* Add support for 133 MHz clock on INCA-IP board

Showing 21 changed files with 392 additions and 110 deletions Side-by-side Diff

... ... @@ -2,6 +2,20 @@
2 2 Changes since U-Boot 0.3.0:
3 3 ======================================================================
4 4  
  5 +* Make sure Block Lock Bits get cleared in R360MPI flash driver
  6 +
  7 +* MPC823 LCD driver: Fill color map backwards, to allow for steady
  8 + display when Linux takes over
  9 +
  10 +* Patch by Erwin Rol, 27 Feb 2003:
  11 + Add support for RTEMS (this time for real).
  12 +
  13 +* Add support for "bmp info" and "bmp display" commands to load
  14 + bitmap images; this can be used (for example in a "preboot"
  15 + command) to display a splash screen very quickly after poweron.
  16 +
  17 +* Add support for 133 MHz clock on INCA-IP board
  18 +
5 19 * Patch by Lutz Dennig, 10 Apr 2003:
6 20 Update for R360MPI board
7 21  
... ... @@ -238,6 +238,10 @@
238 238 E: stefan.roese@esd-electronics.com
239 239 D: IBM PPC401/403/405GP Support; Windows environment support
240 240  
  241 +N: Erwin Rol
  242 +E: erwin@muffin.org
  243 +D: boot support for RTEMS
  244 +
241 245 N: Neil Russell
242 246 E: caret@c-side.com
243 247 D: Author of LiMon-1.4.2, which contributed some ideas
... ... @@ -789,6 +789,18 @@
789 789 Normally display is black on white background; define
790 790 CFG_WHITE_ON_BLACK to get it inverted.
791 791  
  792 +- Spash Screen Support: CONFIG_SPLASH_SCREEN
  793 +
  794 + If this option is set, the environment is checked for
  795 + a variable "splashimage". If found, the usual display
  796 + of logo, copyright and system information on the LCD
  797 + is supressed and the BMP image at the address
  798 + specified in "splashimage" is loaded instead. The
  799 + console is redirected to the "nulldev", too. This
  800 + allows for a "silent" boot where a splash screen is
  801 + loaded very quickly after power-on.
  802 +
  803 +
792 804 - Ethernet address:
793 805 CONFIG_ETHADDR
794 806 CONFIG_ETH2ADDR
board/incaip/memsetup.S
... ... @@ -49,13 +49,11 @@
49 49 #define MC_LATENCY(value) 0x1038(value)
50 50 #define MC_TREFRESH(value) 0x1040(value)
51 51  
52   -#if CPU_CLOCK_RATE==150000000 /* 150 MHz clock for the MIPS core */
53 52 #define CGU_MODUL_BASE 0xBF107000
54 53 #define CGU_PLL1CR(value) 0x0008(value)
55 54 #define CGU_DIVCR(value) 0x0010(value)
56 55 #define CGU_MUXCR(value) 0x0014(value)
57 56 #define CGU_PLL1SR(value) 0x000C(value)
58   -#endif
59 57  
60 58 .globl memsetup
61 59 memsetup:
62 60  
... ... @@ -67,12 +65,12 @@
67 65 li t1, 0xA0000041
68 66 sw t1, EBU_ADDSEL0(t0)
69 67  
70   -#if CPU_CLOCK_RATE==150000000 /* 150 MHz clock for the MIPS core */
71   - li t1, 0xA841417E
72   - sw t1, EBU_BUSCON0(t0) /* value set up by magic flash word */
  68 +#if CPU_CLOCK_RATE==100000000 /* 100 MHz clock for the MIPS core */
  69 + lw t1, EBU_BUSCON0(t0) /* value set up by magic flash word */
73 70 sw t1, EBU_BUSCON2(t0)
74   -#else /* 100 MHz */
75   - lw t1, EBU_BUSCON0(t0) /* value set up by magic flash word */
  71 +#else /* 150 MHz or 133 MHz */
  72 + li t1, 0x8841417E
  73 + sw t1, EBU_BUSCON0(t0)
76 74 sw t1, EBU_BUSCON2(t0)
77 75 #endif
78 76  
79 77  
... ... @@ -85,10 +83,10 @@
85 83 li t1, 0xBE0000F1
86 84 sw t1, EBU_ADDSEL1(t0)
87 85  
88   -#if CPU_CLOCK_RATE==150000000 /* 150 MHz clock for the MIPS core */
89   - li t1, 0x684143FD
90   -#else /* 100 MHz */
  86 +#if CPU_CLOCK_RATE==100000000 /* 100 MHz clock for the MIPS core */
91 87 li t1, 0x684142BD
  88 +#else /* 150 MHz or 133 MHz */
  89 + li t1, 0x684143FD
92 90 #endif
93 91 sw t1, EBU_BUSCON1(t0)
94 92  
... ... @@ -105,6 +103,14 @@
105 103 beq t1, zero, b1
106 104 li t1, 0x80000001
107 105 sw t1, CGU_MUXCR(t0)
  106 +#elif CPU_CLOCK_RATE==133000000 /* 133 MHz clock for the MIPS core */
  107 + li t0, CGU_MODUL_BASE
  108 + li t1, 0x80000054
  109 + sw t1, CGU_DIVCR(t0)
  110 + li t1, 0x80000000
  111 + sw t1, CGU_MUXCR(t0)
  112 + li t1, 0x800B0001
  113 + sw t1, CGU_PLL1CR(t0)
108 114 #endif
109 115  
110 116 /* SDRAM Initialization.
board/r360mpi/flash.c
... ... @@ -206,6 +206,12 @@
206 206 {
207 207 FPW value;
208 208  
  209 + /* Make sure Block Lock Bits get cleared */
  210 + addr[0] = (FPW) 0x00FF00FF;
  211 + addr[0] = (FPW) 0x00600060;
  212 + addr[0] = (FPW) 0x00D000D0;
  213 + addr[0] = (FPW) 0x00FF00FF;
  214 +
209 215 /* Write auto select command: read Manufacturer ID */
210 216 addr[0x5555] = (FPW) 0x00AA00AA;
211 217 addr[0x2AAA] = (FPW) 0x00550055;
board/r360mpi/r360mpi.c
... ... @@ -126,12 +126,12 @@
126 126 memctl->memc_mar = 0x00000088;
127 127  
128 128 /*
129   - * Map controller bank 2 to the SDRAM bank at
  129 + * Map controller bank 1 to the SDRAM bank at
130 130 * preliminary address - these have to be modified after the
131 131 * SDRAM size has been determined.
132 132 */
133   - memctl->memc_or2 = CFG_OR2_PRELIM;
134   - memctl->memc_br2 = CFG_BR2_PRELIM;
  133 + memctl->memc_or1 = CFG_OR1_PRELIM;
  134 + memctl->memc_br1 = CFG_BR1_PRELIM;
135 135  
136 136 memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
137 137  
138 138  
... ... @@ -139,9 +139,9 @@
139 139  
140 140 /* perform SDRAM initializsation sequence */
141 141  
142   - memctl->memc_mcr = 0x80004105; /* SDRAM bank 0 */
  142 + memctl->memc_mcr = 0x80002105; /* SDRAM bank 0 */
143 143 udelay (200);
144   - memctl->memc_mcr = 0x80004230; /* SDRAM bank 0 - execute twice */
  144 + memctl->memc_mcr = 0x80002230; /* SDRAM bank 0 - execute twice */
145 145 udelay (200);
146 146  
147 147 memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
... ... @@ -153,7 +153,7 @@
153 153 *
154 154 * try 8 column mode
155 155 */
156   - size8 = dram_size (CFG_MAMR_8COL, (ulong *) SDRAM_BASE2_PRELIM,
  156 + size8 = dram_size (CFG_MAMR_8COL, (ulong *) SDRAM_BASE1_PRELIM,
157 157 SDRAM_MAX_SIZE);
158 158  
159 159 udelay (1000);
160 160  
... ... @@ -161,13 +161,13 @@
161 161 /*
162 162 * try 9 column mode
163 163 */
164   - size9 = dram_size (CFG_MAMR_9COL, (ulong *) SDRAM_BASE2_PRELIM,
  164 + size9 = dram_size (CFG_MAMR_9COL, (ulong *) SDRAM_BASE1_PRELIM,
165 165 SDRAM_MAX_SIZE);
166 166  
167 167 if (size8 < size9) { /* leave configuration at 9 columns */
168 168 size_b0 = size9;
169 169 /* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */
170   - } else { /* back to 8 columns */
  170 + } else { /* back to 8 columns */
171 171 size_b0 = size8;
172 172 memctl->memc_mamr = CFG_MAMR_8COL;
173 173 udelay (500);
... ... @@ -200,47 +200,6 @@
200 200  
201 201 udelay (10000);
202 202  
203   -#ifdef CONFIG_CAN_DRIVER
204   - /* Initialize OR3 / BR3 */
205   - memctl->memc_or3 = CFG_OR3_CAN; /* switch GPLB_5 to GPLA_5 */
206   - memctl->memc_br3 = CFG_BR3_CAN;
207   -
208   - /* Initialize MBMR */
209   - memctl->memc_mbmr = MAMR_GPL_B4DIS; /* GPL_B4 works as UPWAITB */
210   -
211   - /* Initialize UPMB for CAN: single read */
212   - memctl->memc_mdr = 0xFFFFC004;
213   - memctl->memc_mcr = 0x0100 | UPMB;
214   -
215   - memctl->memc_mdr = 0x0FFFD004;
216   - memctl->memc_mcr = 0x0101 | UPMB;
217   -
218   - memctl->memc_mdr = 0x0FFFC000;
219   - memctl->memc_mcr = 0x0102 | UPMB;
220   -
221   - memctl->memc_mdr = 0x3FFFC004;
222   - memctl->memc_mcr = 0x0103 | UPMB;
223   -
224   - memctl->memc_mdr = 0xFFFFDC05;
225   - memctl->memc_mcr = 0x0104 | UPMB;
226   -
227   - /* Initialize UPMB for CAN: single write */
228   - memctl->memc_mdr = 0xFFFCC004;
229   - memctl->memc_mcr = 0x0118 | UPMB;
230   -
231   - memctl->memc_mdr = 0xCFFCD004;
232   - memctl->memc_mcr = 0x0119 | UPMB;
233   -
234   - memctl->memc_mdr = 0x0FFCC000;
235   - memctl->memc_mcr = 0x011A | UPMB;
236   -
237   - memctl->memc_mdr = 0x7FFCC004;
238   - memctl->memc_mcr = 0x011B | UPMB;
239   -
240   - memctl->memc_mdr = 0xFFFDCC05;
241   - memctl->memc_mcr = 0x011C | UPMB;
242   -#endif
243   -
244 203 return (size_b0);
245 204 }
246 205  
... ... @@ -254,8 +213,8 @@
254 213 * - short between data lines
255 214 */
256 215  
257   -static long int dram_size (long int mamr_value,
258   - long int *base, long int maxsize)
  216 +static long int dram_size (long int mamr_value, long int *base,
  217 + long int maxsize)
259 218 {
260 219 volatile immap_t *immap = (immap_t *) CFG_IMMR;
261 220 volatile memctl8xx_t *memctl = &immap->im_memctl;
262 221  
... ... @@ -298,10 +257,10 @@
298 257  
299 258 /* ------------------------------------------------------------------------- */
300 259  
301   -void r360_i2c_lcd_write (uchar data0, uchar data1)
  260 +void r360_pwm_write (uchar reg, uchar val)
302 261 {
303   - if (i2c_write (CFG_I2C_LCD_ADDR, data0, 1, &data1, 1)) {
304   - printf("Can't write lcd data 0x%02X 0x%02X.\n", data0, data1);
  262 + if (i2c_write (CFG_I2C_PWM_ADDR, reg, 1, &val, 1)) {
  263 + printf ("Can't write PWM register 0x%02X.\n", reg);
305 264 }
306 265 }
307 266  
308 267  
... ... @@ -312,9 +271,11 @@
312 271 */
313 272  
314 273 /* Number of bytes returned from Keyboard Controller */
315   -#define KEYBD_KEY_MAX 16 /* maximum key number */
316   -#define KEYBD_DATALEN ((KEYBD_KEY_MAX + 7) / 8) /* normal key scan data */
  274 +#define KEYBD_KEY_MAX 20 /* maximum key number */
  275 +#define KEYBD_DATALEN ((KEYBD_KEY_MAX + 7) / 8) /* normal key scan data */
317 276  
  277 +static uchar kbd_addr = CFG_I2C_KBD_ADDR;
  278 +
318 279 static uchar *key_match (uchar *);
319 280  
320 281 int misc_init_r (void)
321 282  
... ... @@ -326,14 +287,14 @@
326 287  
327 288 i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
328 289  
329   - i2c_read (CFG_I2C_KEY_ADDR, 0, 0, kbd_data, KEYBD_DATALEN);
  290 + i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
330 291  
331 292 for (i = 0; i < KEYBD_DATALEN; ++i) {
332 293 sprintf (keybd_env + i + i, "%02X", kbd_data[i]);
333 294 }
334 295 setenv ("keybd", keybd_env);
335 296  
336   - str = strdup (key_match (keybd_env)); /* decode keys */
  297 + str = strdup (key_match (kbd_data)); /* decode keys */
337 298  
338 299 #ifdef CONFIG_PREBOOT /* automatically configure "preboot" command on key match */
339 300 setenv ("preboot", str); /* set or delete definition */
340 301  
341 302  
342 303  
... ... @@ -363,13 +324,16 @@
363 324 static uchar kbd_magic_prefix[] = "key_magic";
364 325 static uchar kbd_command_prefix[] = "key_cmd";
365 326  
366   -static uchar *key_match (uchar * kbd_str)
  327 +static uchar *key_match (uchar * kbd_data)
367 328 {
  329 + uchar compare[KEYBD_DATALEN];
368 330 uchar magic[sizeof (kbd_magic_prefix) + 1];
369 331 uchar cmd_name[sizeof (kbd_command_prefix) + 1];
370   - uchar *str, *suffix;
  332 + uchar key_mask;
  333 + uchar *str, *nxt, *suffix;
371 334 uchar *kbd_magic_keys;
372 335 char *cmd;
  336 + int i;
373 337  
374 338 /*
375 339 * The following string defines the characters that can pe appended
376 340  
377 341  
378 342  
379 343  
380 344  
381 345  
382 346  
383 347  
384 348  
... ... @@ -379,48 +343,62 @@
379 343 * "key_magic" is checked (old behaviour); the string "125" causes
380 344 * checks for "key_magic1", "key_magic2" and "key_magic5", etc.
381 345 */
382   - if ((kbd_magic_keys = getenv ("magic_keys")) != NULL) {
383   - /* loop over all magic keys;
384   - * use '\0' suffix in case of empty string
385   - */
386   - for (suffix = kbd_magic_keys;
387   - *suffix || suffix == kbd_magic_keys;
388   - ++suffix) {
389   - sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
  346 + if ((kbd_magic_keys = getenv ("magic_keys")) == NULL)
  347 + kbd_magic_keys = "";
390 348  
  349 + /* loop over all magic keys;
  350 + * use '\0' suffix in case of empty string
  351 + */
  352 + for (suffix=kbd_magic_keys; *suffix || suffix==kbd_magic_keys; ++suffix) {
  353 + sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
391 354 #if 0
392   - printf ("### Check magic \"%s\"\n", magic);
  355 + printf ("### Check magic \"%s\"\n", magic);
393 356 #endif
394 357  
395   - if ((str = getenv (magic)) != 0) {
  358 + memcpy(compare, kbd_data, KEYBD_DATALEN);
396 359  
397   -#if 0
398   - printf ("### Compare \"%s\" \"%s\"\n",
399   - kbd_str, str);
400   -#endif
401   - if (strcmp (kbd_str, str) == 0) {
402   - sprintf (cmd_name, "%s%c",
403   - kbd_command_prefix,
404   - *suffix);
  360 + for (str = getenv(magic); str != NULL; str = (*nxt) ? nxt+1 : nxt) {
  361 + uchar c;
405 362  
406   - if ((cmd = getenv (cmd_name)) != 0) {
  363 + c = (uchar) simple_strtoul (str, (char **) (&nxt), 16);
  364 +
  365 + if (str == nxt) /* invalid character */
  366 + break;
  367 +
  368 + if (c >= KEYBD_KEY_MAX) /* bad key number */
  369 + goto next_magic;
  370 +
  371 + key_mask = 0x80 >> (c % 8);
  372 +
  373 + if (!(compare[c / 8] & key_mask)) /* key not pressed */
  374 + goto next_magic;
  375 +
  376 + compare[c / 8] &= ~key_mask;
  377 + }
  378 +
  379 + for (i=0; i<KEYBD_DATALEN; i++)
  380 + if (compare[i]) /* key(s) not released */
  381 + goto next_magic;
  382 +
  383 + sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix);
  384 +
  385 + cmd = getenv (cmd_name);
407 386 #if 0
408   - printf ("### Set PREBOOT to $(%s): \"%s\"\n",
409   - cmd_name, cmd);
  387 + printf ("### Set PREBOOT to $(%s): \"%s\"\n",
  388 + cmd_name, cmd ? cmd : "<<NULL>>");
410 389 #endif
411   - return (cmd);
412   - }
413   - }
414   - }
415   - }
  390 + *kbd_data = *suffix;
  391 + return (cmd);
  392 +
  393 + next_magic:;
416 394 }
417 395 #if 0
418 396 printf ("### Delete PREBOOT\n");
419 397 #endif
420   - *kbd_str = ' = '\0';';
  398 + *kbd_data = ' = '\0';';
421 399 return (NULL);
422 400 }
423   -#endif /* CONFIG_PREBOOT */
  401 +#endif /* CONFIG_PREBOOT */
424 402  
425 403 /* Read Keyboard status */
426 404 int do_kbd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
... ... @@ -432,7 +410,7 @@
432 410 i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
433 411  
434 412 /* Read keys */
435   - i2c_read (CFG_I2C_KEY_ADDR, 0, 0, kbd_data, KEYBD_DATALEN);
  413 + i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
436 414  
437 415 puts ("Keys:");
438 416 for (i = 0; i < KEYBD_DATALEN; ++i) {
... ... @@ -28,7 +28,7 @@
28 28 AOBJS =
29 29  
30 30 COBJS = main.o altera.o bedbug.o \
31   - cmd_autoscript.o cmd_bedbug.o cmd_boot.o \
  31 + cmd_autoscript.o cmd_bedbug.o cmd_bmp.o cmd_boot.o \
32 32 cmd_bootm.o cmd_cache.o cmd_console.o cmd_date.o \
33 33 cmd_dcr.o cmd_diag.o cmd_doc.o cmd_nand.o cmd_dtt.o \
34 34 cmd_eeprom.o cmd_elf.o cmd_fdc.o cmd_fdos.o cmd_flash.o \
... ... @@ -98,6 +98,7 @@
98 98 extern boot_os_Fcn do_bootm_linux;
99 99 #endif
100 100 static boot_os_Fcn do_bootm_netbsd;
  101 +static boot_os_Fcn do_bootm_rtems;
101 102 #if (CONFIG_COMMANDS & CFG_CMD_ELF)
102 103 static boot_os_Fcn do_bootm_vxworks;
103 104 static boot_os_Fcn do_bootm_qnxelf;
... ... @@ -321,6 +322,12 @@
321 322 do_bootm_netbsd (cmdtp, flag, argc, argv,
322 323 addr, len_ptr, verify);
323 324 break;
  325 +
  326 + case IH_OS_RTEMS:
  327 + do_bootm_rtems (cmdtp, flag, argc, argv,
  328 + addr, len_ptr, verify);
  329 + break;
  330 +
324 331 #if (CONFIG_COMMANDS & CFG_CMD_ELF)
325 332 case IH_OS_VXWORKS:
326 333 do_bootm_vxworks (cmdtp, flag, argc, argv,
... ... @@ -831,6 +838,7 @@
831 838 case IH_OS_VXWORKS: os = "VxWorks"; break;
832 839 case IH_OS_QNX: os = "QNX"; break;
833 840 case IH_OS_U_BOOT: os = "U-Boot"; break;
  841 + case IH_OS_RTEMS: os = "RTEMS"; break;
834 842 default: os = "Unknown OS"; break;
835 843 }
836 844  
... ... @@ -951,6 +959,29 @@
951 959 inflateEnd(&s);
952 960  
953 961 return (0);
  962 +}
  963 +
  964 +static void
  965 +do_bootm_rtems (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[],
  966 + ulong addr, ulong *len_ptr, int verify)
  967 +{
  968 + DECLARE_GLOBAL_DATA_PTR;
  969 + image_header_t *hdr = &header;
  970 + void (*entry_point)(bd_t *);
  971 +
  972 + entry_point = (void (*)(bd_t *)) hdr->ih_ep;
  973 +
  974 + printf ("## Transferring control to RTEMS (at address %08lx) ...\n",
  975 + (ulong)entry_point);
  976 +
  977 + SHOW_BOOT_PROGRESS (15);
  978 +
  979 + /*
  980 + * RTEMS Parameters:
  981 + * r3: ptr to board info data
  982 + */
  983 +
  984 + (*entry_point ) ( gd->bd );
954 985 }
955 986  
956 987 #if (CONFIG_COMMANDS & CFG_CMD_ELF)
... ... @@ -72,6 +72,7 @@
72 72 #include <cmd_vfd.h> /* load a bitmap to the VFDs on TRAB */
73 73 #include <cmd_log.h>
74 74 #include <cmd_fdos.h>
  75 +#include <cmd_bmp.h>
75 76  
76 77 #ifdef CONFIG_AMIGAONEG3SE
77 78 #include <cmd_menu.h>
... ... @@ -231,6 +232,7 @@
231 232 CMD_TBL_AUTOSCRIPT
232 233 CMD_TBL_BASE
233 234 CMD_TBL_BDINFO
  235 + CMD_TBL_BMP
234 236 #ifdef CONFIG_AMIGAONEG3SE
235 237 CMD_TBL_BOOTA
236 238 #endif
... ... @@ -355,7 +355,7 @@
355 355 return (0);
356 356 }
357 357  
358   -#ifdef CFG_CONSOLE_IS_IN_ENV
  358 +#if defined(CFG_CONSOLE_IS_IN_ENV) || defined(CONFIG_SPLASH_SCREEN)
359 359 /* search a device */
360 360 device_t *search_device (int flags, char *name)
361 361 {
... ... @@ -374,7 +374,7 @@
374 374 }
375 375 return dev;
376 376 }
377   -#endif /* CFG_CONSOLE_IS_IN_ENV */
  377 +#endif /* CFG_CONSOLE_IS_IN_ENV || CONFIG_SPLASH_SCREEN */
378 378  
379 379 #ifdef CFG_CONSOLE_IS_IN_ENV
380 380 /* Called after the relocation - use desired console functions */
... ... @@ -468,6 +468,11 @@
468 468 {
469 469 device_t *inputdev = NULL, *outputdev = NULL;
470 470 int i, items = ListNumItems (devlist);
  471 +
  472 +#ifdef CONFIG_SPLASH_SCREEN
  473 + /* suppress all output if splash screen is enabled */
  474 + outputdev = search_device (DEV_FLAGS_OUTPUT, "nulldev");
  475 +#endif
471 476  
472 477 /* Scan devices looking for input and output devices */
473 478 for (i = 1;
... ... @@ -37,6 +37,11 @@
37 37 device_t *stdio_devices[] = { NULL, NULL, NULL };
38 38 char *stdio_names[MAX_FILES] = { "stdin", "stdout", "stderr" };
39 39  
  40 +#if defined(CONFIG_SPLASH_SCREEN) && !defined(CFG_DEVICE_NULLDEV)
  41 +#define CFG_DEVICE_NULLDEV 1
  42 +#endif
  43 +
  44 +
40 45 #ifdef CFG_DEVICE_NULLDEV
41 46 void nulldev_putc(const char c)
42 47 {
... ... @@ -39,12 +39,10 @@
39 39 /************************************************************************/
40 40 /* ** CONFIG STUFF -- should be moved to board config file */
41 41 /************************************************************************/
42   -#ifndef CONFIG_EDT32F10
43 42 #define CONFIG_LCD_LOGO
44 43 #define LCD_INFO /* Display Logo, (C) and system info */
45   -#endif
46 44  
47   -#ifdef CONFIG_V37
  45 +#if defined(CONFIG_V37) || defined(CONFIG_EDT32F10)
48 46 #undef CONFIG_LCD_LOGO
49 47 #undef LCD_INFO
50 48 #endif
... ... @@ -54,6 +52,14 @@
54 52 /************************************************************************/
55 53  
56 54 /************************************************************************/
  55 +/* ** BITMAP DISPLAY SUPPORT -- should probably be moved elsewhere */
  56 +/************************************************************************/
  57 +
  58 +#if (CONFIG_COMMANDS & CFG_CMD_BMP)
  59 +#include <bmp_layout.h>
  60 +#endif /* (CONFIG_COMMANDS & CFG_CMD_BMP) */
  61 +
  62 +/************************************************************************/
57 63 /* ** FONT AND LOGO DATA */
58 64 /************************************************************************/
59 65  
... ... @@ -995,6 +1001,102 @@
995 1001  
996 1002 /*----------------------------------------------------------------------*/
997 1003  
  1004 +#if (CONFIG_COMMANDS & CFG_CMD_BMP)
  1005 +/*
  1006 + Display the BMP file located at address bmp_image.
  1007 + Only uncompressed
  1008 +*/
  1009 +int lcd_display_bitmap(ulong bmp_image)
  1010 +{
  1011 + volatile immap_t *immr = (immap_t *) CFG_IMMR;
  1012 + volatile cpm8xx_t *cp = &(immr->im_cpm);
  1013 + ushort *cmap;
  1014 + ushort i, j;
  1015 + uchar *fb;
  1016 + bmp_image_t *bmp=(bmp_image_t *)bmp_image;
  1017 + uchar *bmap;
  1018 + ushort padded_line;
  1019 + unsigned long width, height;
  1020 + unsigned colors,bpix;
  1021 + unsigned long compression;
  1022 +
  1023 + if (!((bmp->header.signature[0]=='B') &&
  1024 + (bmp->header.signature[1]=='M'))) {
  1025 + printf ("Error: no valid bmp image at %lx\n", bmp_image);
  1026 + return 1;
  1027 + }
  1028 +
  1029 + width = le32_to_cpu (bmp->header.width);
  1030 + height = le32_to_cpu (bmp->header.height);
  1031 + colors = 1<<le16_to_cpu (bmp->header.bit_count);
  1032 + compression = le32_to_cpu (bmp->header.compression);
  1033 +
  1034 + bpix = NBITS(panel_info.vl_bpix);
  1035 +
  1036 + if ((bpix != 1) && (bpix != 8)) {
  1037 + printf ("Error: %d bit/pixel mode not supported by U-Boot\n",
  1038 + bpix);
  1039 + return 1;
  1040 + }
  1041 +
  1042 + if (bpix != le16_to_cpu(bmp->header.bit_count)) {
  1043 + printf ("Error: %d bit/pixel mode, but BMP has %d bit/pixel\n",
  1044 + bpix,
  1045 + le16_to_cpu(bmp->header.bit_count));
  1046 + return 1;
  1047 + }
  1048 +
  1049 + if (compression!=BMP_BI_RGB) {
  1050 + printf ("Error: compression type %ld not supported\n",
  1051 + compression);
  1052 + return 1;
  1053 + }
  1054 +
  1055 + debug ("Display-bmp: %d x %d with %d colors\n",
  1056 + width, height, colors);
  1057 +
  1058 + if (bpix==8) {
  1059 + /* Fill the entire color map */
  1060 + cmap = (ushort *)&(cp->lcd_cmap[255*sizeof(ushort)]);
  1061 +
  1062 + /* Set color map */
  1063 + for (i = 0; i < colors; ++i) {
  1064 + bmp_color_table_entry_t cte = bmp->color_table[i];
  1065 + ushort colreg =
  1066 + ((cte.red>>4) << 8) |
  1067 + ((cte.green>>4) << 4) |
  1068 + (cte.blue>>4) ;
  1069 +#ifdef CFG_INVERT_COLORS
  1070 + colreg ^= 0xFFF;
  1071 +#endif
  1072 + *cmap-- = colreg;
  1073 + }
  1074 + }
  1075 +
  1076 + padded_line = (width&0x3) ? ((width&~0x3)+4) : (width);
  1077 + if (width>panel_info.vl_col)
  1078 + width = panel_info.vl_col;
  1079 + if (height>panel_info.vl_row)
  1080 + height = panel_info.vl_row;
  1081 +
  1082 + bmap = (uchar *)bmp + le32_to_cpu (bmp->header.data_offset);
  1083 + fb = (uchar *)
  1084 + (lcd_base +
  1085 + (((height>=panel_info.vl_row) ? panel_info.vl_row : height)-1)
  1086 + * lcd_line_length);
  1087 + for (i = 0; i < height; ++i) {
  1088 + for (j = 0; j < width ; j++)
  1089 + *(fb++)=255-*(bmap++);
  1090 + bmap += (width - padded_line);
  1091 + fb -= (width + lcd_line_length);
  1092 + }
  1093 +
  1094 + return (0);
  1095 +}
  1096 +#endif /* (CONFIG_COMMANDS & CFG_CMD_BMP) */
  1097 +
  1098 +/*----------------------------------------------------------------------*/
  1099 +
998 1100 #ifdef NOT_USED_SO_FAR
999 1101 static void lcd_disable (void)
1000 1102 {
... ... @@ -1066,6 +1168,100 @@
1066 1168 }
1067 1169 #endif /* CONFIG_LCD_LOGO */
1068 1170  
  1171 +#if (CONFIG_COMMANDS & CFG_CMD_BMP)
  1172 +/*
  1173 + Display the BMP file located at address bmp_image.
  1174 + Only uncompressed
  1175 +*/
  1176 +int lcd_display_bitmap(ulong bmp_image)
  1177 +{
  1178 + volatile immap_t *immr = (immap_t *) CFG_IMMR;
  1179 + volatile cpm8xx_t *cp = &(immr->im_cpm);
  1180 + ushort *cmap;
  1181 + ushort i, j;
  1182 + uchar *fb;
  1183 + bmp_image_t *bmp=(bmp_image_t *)bmp_image;
  1184 + uchar *bmap;
  1185 + ushort padded_line;
  1186 + unsigned long width, height;
  1187 + unsigned colors,bpix;
  1188 + unsigned long compression;
  1189 +
  1190 + if (!((bmp->header.signature[0]=='B') &&
  1191 + (bmp->header.signature[1]=='M'))) {
  1192 + printf ("Error: no valid bmp image at %lx\n", bmp_image);
  1193 + return 1;
  1194 + }
  1195 +
  1196 + width = le32_to_cpu (bmp->header.width);
  1197 + height = le32_to_cpu (bmp->header.height);
  1198 + colors = 1<<le16_to_cpu (bmp->header.bit_count);
  1199 + compression = le32_to_cpu (bmp->header.compression);
  1200 +
  1201 + bpix = NBITS(panel_info.vl_bpix);
  1202 +
  1203 + if ((bpix != 1) && (bpix != 8)) {
  1204 + printf ("Error: %d bit/pixel mode not supported by U-Boot\n",
  1205 + bpix);
  1206 + return 1;
  1207 + }
  1208 +
  1209 + if (bpix != le16_to_cpu(bmp->header.bit_count)) {
  1210 + printf ("Error: %d bit/pixel mode, but BMP has %d bit/pixel\n",
  1211 + bpix,
  1212 + le16_to_cpu(bmp->header.bit_count));
  1213 + return 1;
  1214 + }
  1215 +
  1216 + if (compression!=BMP_BI_RGB) {
  1217 + printf ("Error: compression type %ld not supported\n",
  1218 + compression);
  1219 + return 1;
  1220 + }
  1221 +
  1222 + debug ("Display-bmp: %d x %d with %d colors\n",
  1223 + width, height, colors);
  1224 +
  1225 + if (bpix==8) {
  1226 + /* Fill the entire color map */
  1227 + cmap = (ushort *)&(cp->lcd_cmap[255*sizeof(ushort)]);
  1228 +
  1229 + /* Set color map */
  1230 + for (i = 0; i < colors; ++i) {
  1231 + bmp_color_table_entry_t cte = bmp->color_table[i];
  1232 + ushort colreg =
  1233 + ((cte.red>>4) << 8) |
  1234 + ((cte.green>>4) << 4) |
  1235 + (cte.blue>>4) ;
  1236 +#ifdef CFG_INVERT_COLORS
  1237 + colreg ^= 0xFFF;
  1238 +#endif
  1239 + *cmap-- = colreg;
  1240 + }
  1241 + }
  1242 +
  1243 + padded_line = (width&0x3) ? ((width&~0x3)+4) : (width);
  1244 + if (width>panel_info.vl_col)
  1245 + width = panel_info.vl_col;
  1246 + if (height>panel_info.vl_row)
  1247 + height = panel_info.vl_row;
  1248 +
  1249 + bmap = (uchar *)bmp + le32_to_cpu (bmp->header.data_offset);
  1250 + fb = (uchar *)
  1251 + (lcd_base +
  1252 + (((height>=panel_info.vl_row) ? panel_info.vl_row : height)-1)
  1253 + * lcd_line_length);
  1254 + for (i = 0; i < height; ++i) {
  1255 + for (j = 0; j < width ; j++)
  1256 + *(fb++)=255-*(bmap++);
  1257 + bmap += (width - padded_line);
  1258 + fb -= (width + lcd_line_length);
  1259 + }
  1260 +
  1261 + return (0);
  1262 +}
  1263 +#endif /* (CONFIG_COMMANDS & CFG_CMD_BMP) */
  1264 +
1069 1265 /*----------------------------------------------------------------------*/
1070 1266  
1071 1267 static void *lcd_logo (void)
... ... @@ -1077,6 +1273,19 @@
1077 1273 char temp[32];
1078 1274 #endif /* LCD_INFO */
1079 1275  
  1276 +#ifdef CONFIG_SPLASH_SCREEN
  1277 + char *s;
  1278 + ulong addr;
  1279 +
  1280 + if ((s = getenv("splashimage")) != NULL) {
  1281 + addr = simple_strtoul(s, NULL, 16);
  1282 +
  1283 + if (lcd_display_bitmap (addr) == 0) {
  1284 + return ((void *)lcd_base);
  1285 + }
  1286 + }
  1287 +#endif /* CONFIG_SPLASH_SCREEN */
  1288 +
1080 1289 #ifdef CONFIG_LCD_LOGO
1081 1290 bitmap_plot (0, 0);
1082 1291 #endif /* CONFIG_LCD_LOGO */
... ... @@ -1086,7 +1295,7 @@
1086 1295 sprintf (info, "%s (%s - %s) ", U_BOOT_VERSION, __DATE__, __TIME__);
1087 1296 lcd_drawchars (LCD_INFO_X, LCD_INFO_Y, info, strlen(info));
1088 1297  
1089   - sprintf (info, "(C) 2002 DENX Software Engineering");
  1298 + sprintf (info, "(C) 2003 DENX Software Engineering");
1090 1299 lcd_drawchars (LCD_INFO_X, LCD_INFO_Y + VIDEO_FONT_HEIGHT,
1091 1300 info, strlen(info));
1092 1301  
... ... @@ -15,6 +15,7 @@
15 15 autoscr 5
16 16 base 2
17 17 bdinfo 2
  18 +bmp 3
18 19 bootelf 7
19 20 bootm 5
20 21 bootp 5
include/cmd_confdefs.h
... ... @@ -79,6 +79,7 @@
79 79 #define CFG_CMD_FDOS 0x0000200000000000 /* Floppy DOS support */
80 80 #define CFG_CMD_VFD 0x0000400000000000 /* VFD support (TRAB) */
81 81 #define CFG_CMD_NAND 0x0000800000000000 /* NAND support */
  82 +#define CFG_CMD_BMP 0x0001000000000000 /* BMP support */
82 83  
83 84 #define CFG_CMD_ALL 0xFFFFFFFFFFFFFFFF /* ALL commands */
84 85  
... ... @@ -87,6 +88,7 @@
87 88 */
88 89 #define CFG_CMD_NONSTD (CFG_CMD_ASKENV | \
89 90 CFG_CMD_BEDBUG | \
  91 + CFG_CMD_BMP | \
90 92 CFG_CMD_BSP | \
91 93 CFG_CMD_CACHE | \
92 94 CFG_CMD_DATE | \
... ... @@ -1365,7 +1365,7 @@
1365 1365 /*** TQM855L, TQM860L, TQM862L **************************************/
1366 1366  
1367 1367 #if defined(CONFIG_TQM855L) || \
1368   - defined(CONFIG_TQM860L)
  1368 + defined(CONFIG_TQM860L) || \
1369 1369 defined(CONFIG_TQM862L)
1370 1370  
1371 1371 # ifdef CONFIG_SCC1_ENET /* use SCC for 10Mbps Ethernet */
include/configs/R360MPI.h
... ... @@ -40,6 +40,8 @@
40 40 #undef CONFIG_EDT32F10
41 41 #define CONFIG_SHARP_LQ057Q3DC02
42 42  
  43 +#define CONFIG_SPLASH_SCREEN
  44 +
43 45 #define MPC8XX_FACT 1 /* Multiply by 1 */
44 46 #define MPC8XX_XIN 50000000 /* 50 MHz in */
45 47 #define CONFIG_8xx_GCLK_FREQ 50000000 /* define if can't use get_gclk_freq */
... ... @@ -118,6 +120,7 @@
118 120 #define CFG_I2C_TEM_ADDR 0x49 /* Temperature Sensors */
119 121  
120 122 #define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
  123 + CFG_CMD_BMP | \
121 124 CFG_CMD_DHCP | \
122 125 CFG_CMD_DATE | \
123 126 CFG_CMD_I2C | \
include/configs/incaip.h
... ... @@ -31,8 +31,8 @@
31 31 #define CONFIG_MIPS32 1 /* MIPS 4Kc CPU core */
32 32 #define CONFIG_INCA_IP 1 /* on a INCA-IP Board */
33 33  
34   -/* allowed values: 100000000 and 150000000 */
35   -#define CPU_CLOCK_RATE 150000000 /* 150 MHz clock for the MIPS core */
  34 +/* allowed values: 100000000, 133000000, and 150000000 */
  35 +#define CPU_CLOCK_RATE 133000000 /* 133 MHz clock for the MIPS core */
36 36  
37 37 #if CPU_CLOCK_RATE == 100000000
38 38 #define INFINEON_EBU_BOOTCFG 0x20C4 /* CMULT = 4 for 100 MHz */
include/configs/lwmon.h
... ... @@ -153,6 +153,7 @@
153 153 CFG_CMD_EEPROM | \
154 154 CFG_CMD_IDE | \
155 155 CFG_CMD_BSP | \
  156 + CFG_CMD_BMP | \
156 157 CFG_CMD_POST_DIAG )
157 158 #else
158 159 #define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
... ... @@ -162,6 +163,7 @@
162 163 CFG_CMD_EEPROM | \
163 164 CFG_CMD_IDE | \
164 165 CFG_CMD_BSP | \
  166 + CFG_CMD_BMP | \
165 167 CFG_CMD_POST_DIAG )
166 168 #endif
167 169 #define CONFIG_MAC_PARTITION
... ... @@ -45,6 +45,7 @@
45 45 #define IH_OS_PSOS 15 /* pSOS */
46 46 #define IH_OS_QNX 16 /* QNX */
47 47 #define IH_OS_U_BOOT 17 /* Firmware */
  48 +#define IH_OS_RTEMS 18 /* RTEMS */
48 49  
49 50 /*
50 51 * CPU Architecture Codes (supported by Linux)
... ... @@ -27,7 +27,7 @@
27 27 * See included "fw_env.config" sample file (TRAB board)
28 28 * for notes on configuration.
29 29 */
30   -/*#define CONFIG_FILE "/etc/fw_env.config" */
  30 +#define CONFIG_FILE "/etc/fw_env.config"
31 31  
32 32 #define HAVE_REDUND /* For systems with 2 env sectors */
33 33 #define DEVICE1_NAME "/dev/mtd1"
... ... @@ -92,6 +92,7 @@
92 92 { IH_OS_PSOS, "psos", "pSOS", },
93 93 { IH_OS_QNX, "qnx", "QNX", },
94 94 { IH_OS_U_BOOT, "u-boot", "U-Boot", },
  95 + { IH_OS_RTEMS, "rtems", "RTEMS", },
95 96 { -1, "", "", },
96 97 };
97 98