Commit d7dd358f93c03004ba42e054c95e21596a909de6
1 parent
af4c271c33
Exists in
v2017.01-smarct4x
and in
25 other branches
arm64: mvebu: Init COMPHY from the slave-CP on the A8k
The Armada8k implements 2 CPs (communication processors) and the 2nd CP also is equipped with a COMPHY controller. This patch now loops over all enabled MISC devices (CP110) enabled in the DT to initialize all CPs. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
Showing 1 changed file with 14 additions and 6 deletions Side-by-side Diff
arch/arm/mach-mvebu/arm64-common.c
| ... | ... | @@ -109,12 +109,20 @@ |
| 109 | 109 | { |
| 110 | 110 | struct udevice *dev; |
| 111 | 111 | int ret; |
| 112 | + int i; | |
| 112 | 113 | |
| 113 | - /* Call the comphy code via the MISC uclass driver */ | |
| 114 | - ret = uclass_get_device(UCLASS_MISC, 0, &dev); | |
| 115 | - if (ret) { | |
| 116 | - debug("COMPHY init failed: %d\n", ret); | |
| 117 | - return -ENODEV; | |
| 114 | + /* | |
| 115 | + * Loop over all MISC uclass drivers to call the comphy code | |
| 116 | + * and init all CP110 devices enabled in the DT | |
| 117 | + */ | |
| 118 | + i = 0; | |
| 119 | + while (1) { | |
| 120 | + /* Call the comphy code via the MISC uclass driver */ | |
| 121 | + ret = uclass_get_device(UCLASS_MISC, i++, &dev); | |
| 122 | + | |
| 123 | + /* We're done, once no further CP110 device is found */ | |
| 124 | + if (ret) | |
| 125 | + break; | |
| 118 | 126 | } |
| 119 | 127 | |
| 120 | 128 | /* Cause the SATA device to do its early init */ |