Eric Lee / smarc-uboot | Embedian Git Server

Commit d873133f2ba9bd613d5f6552c31cc70fb13f15d3

Authored by Stefan Roese 2009-05-11 19:46:14 +0800

Committed by Wolfgang Denk 2009-06-13 02:39:47 +0800

Exists in master and in 55 other branches

ppc4xx: Add Sequoia RAM-booting target

This patch adds another build target for the AMCC Sequoia PPC440EPx
eval board. This RAM-booting version is targeted for boards without
NOR FLASH (NAND booting) which need a possibility to initially
program their NAND FLASH. Using a JTAG debugger (e.g. BDI2000/3000)
configured to setup the SDRAM, this debugger can load this RAM-
booting image to the target address in SDRAM (in this case 0x1000000)
and start it there. Then U-Boot's standard NAND commands can be
used to program the NAND FLASH (e.g. "nand write ...").

Here the commands to load and start this image from the BDI2000:

440EPX>reset halt
440EPX>load 0x1000000 /tftpboot/sequoia/u-boot.bin
440EPX>go 0x1000000

Please note that this image automatically scans for an already
initialized SDRAM TLB (detected by EPN=0). This TLB will not be
cleared. This TLB doesn't need to be TLB #0, this RAM-booting
version will detect it and preserve it. So booting via BDI2000
will work and booting with a complete different TLB init via
U-Boot works as well.

Signed-off-by: Stefan Roese <sr@denx.de>

Showing 8 changed files with 215 additions and 16 deletions Inline Diff

Makefile
board/amcc/sequoia/init.S
board/amcc/sequoia/sdram.c
board/amcc/sequoia/sequoia.c
board/amcc/sequoia/u-boot-ram.lds
cpu/ppc4xx/start.S
include/configs/amcc-common.h
include/configs/sequoia.h

Makefile

Diff comments View file @ d873133

 #
 # (C) Copyright 2000-2009
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 #
 # See file CREDITS for list of people who contributed to this
 # project.
 #
 # This program is free software; you can redistribute it and/or
 # modify it under the terms of the GNU General Public License as
 # published by the Free Software Foundatio; either version 2 of
 # the License, or (at your option) any later version.
 #
 # This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	See the
 # GNU General Public License for more details.
 #
 # You should have received a copy of the GNU General Public License
 # along with this program; if not, write to the Free Software
 # Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 # MA 02111-1307 USA
 #
 VERSION = 2009
 PATCHLEVEL = 06
 SUBLEVEL =
 EXTRAVERSION = -rc3
 ifneq "$(SUBLEVEL)" ""
 U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
 else
 U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL)$(EXTRAVERSION)
 endif
 TIMESTAMP_FILE = $(obj)include/timestamp_autogenerated.h
 VERSION_FILE = $(obj)include/version_autogenerated.h
 HOSTARCH := $(shell uname -m | \
 	sed -e s/i.86/i386/ \
 	    -e s/sun4u/sparc64/ \
 	    -e s/arm.*/arm/ \
 	    -e s/sa110/arm/ \
 	    -e s/powerpc/ppc/ \
 	    -e s/ppc64/ppc/ \
 	    -e s/macppc/ppc/)
 HOSTOS := $(shell uname -s | tr '[:upper:]' '[:lower:]' | \
 	    sed -e 's/\(cygwin\).*/cygwin/')
 # Set shell to bash if possible, otherwise fall back to sh
 SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
 	else if [ -x /bin/bash ]; then echo /bin/bash; \
 	else echo sh; fi; fi)
 export	HOSTARCH HOSTOS SHELL
 # Deal with colliding definitions from tcsh etc.
 VENDOR=
 #########################################################################
 # Allow for silent builds
 ifeq (,$(findstring s,$(MAKEFLAGS)))
 XECHO = echo
 else
 XECHO = :
 endif
 #########################################################################
 #
 # U-boot build supports producing a object files to the separate external
 # directory. Two use cases are supported:
 #
 # 1) Add O= to the make command line
 # 'make O=/tmp/build all'
 #
 # 2) Set environement variable BUILD_DIR to point to the desired location
 # 'export BUILD_DIR=/tmp/build'
 # 'make'
 #
 # The second approach can also be used with a MAKEALL script
 # 'export BUILD_DIR=/tmp/build'
 # './MAKEALL'
 #
 # Command line 'O=' setting overrides BUILD_DIR environent variable.
 #
 # When none of the above methods is used the local build is performed and
 # the object files are placed in the source directory.
 #
 ifdef O
 ifeq ("$(origin O)", "command line")
 BUILD_DIR := $(O)
 endif
 endif
 ifneq ($(BUILD_DIR),)
 saved-output := $(BUILD_DIR)
 # Attempt to create a output directory.
 $(shell [ -d ${BUILD_DIR} ] || mkdir -p ${BUILD_DIR})
 # Verify if it was successful.
 BUILD_DIR := $(shell cd $(BUILD_DIR) && /bin/pwd)
 $(if $(BUILD_DIR),,$(error output directory "$(saved-output)" does not exist))
 endif # ifneq ($(BUILD_DIR),)
 OBJTREE		:= $(if $(BUILD_DIR),$(BUILD_DIR),$(CURDIR))
 SRCTREE		:= $(CURDIR)
 TOPDIR		:= $(SRCTREE)
 LNDIR		:= $(OBJTREE)
 export	TOPDIR SRCTREE OBJTREE
 MKCONFIG	:= $(SRCTREE)/mkconfig
 export MKCONFIG
 ifneq ($(OBJTREE),$(SRCTREE))
 REMOTE_BUILD	:= 1
 export REMOTE_BUILD
 endif
 # $(obj) and (src) are defined in config.mk but here in main Makefile
 # we also need them before config.mk is included which is the case for
 # some targets like unconfig, clean, clobber, distclean, etc.
 ifneq ($(OBJTREE),$(SRCTREE))
 obj := $(OBJTREE)/
 src := $(SRCTREE)/
 else
 obj :=
 src :=
 endif
 export obj src
 # Make sure CDPATH settings don't interfere
 unexport CDPATH
 #########################################################################
 ifeq ($(ARCH),powerpc)
 ARCH = ppc
 endif
 ifeq ($(obj)include/config.mk,$(wildcard $(obj)include/config.mk))
 # load ARCH, BOARD, and CPU configuration
 include $(obj)include/config.mk
 export	ARCH CPU BOARD VENDOR SOC
 ifndef CROSS_COMPILE
 ifeq ($(HOSTARCH),$(ARCH))
 CROSS_COMPILE =
 else
 ifeq ($(ARCH),ppc)
 CROSS_COMPILE = ppc_8xx-
 endif
 ifeq ($(ARCH),arm)
 CROSS_COMPILE = arm-linux-
 endif
 ifeq ($(ARCH),i386)
 CROSS_COMPILE = i386-linux-
 endif
 ifeq ($(ARCH),mips)
 CROSS_COMPILE = mips_4KC-
 endif
 ifeq ($(ARCH),nios)
 CROSS_COMPILE = nios-elf-
 endif
 ifeq ($(ARCH),nios2)
 CROSS_COMPILE = nios2-elf-
 endif
 ifeq ($(ARCH),m68k)
 CROSS_COMPILE = m68k-elf-
 endif
 ifeq ($(ARCH),microblaze)
 CROSS_COMPILE = mb-
 endif
 ifeq ($(ARCH),blackfin)
 CROSS_COMPILE = bfin-uclinux-
 endif
 ifeq ($(ARCH),avr32)
 CROSS_COMPILE = avr32-linux-
 endif
 ifeq ($(ARCH),sh)
 CROSS_COMPILE = sh4-linux-
 endif
 ifeq ($(ARCH),sparc)
 CROSS_COMPILE = sparc-elf-
 endif	# sparc
 endif	# HOSTARCH,ARCH
 endif	# CROSS_COMPILE
 export	CROSS_COMPILE
 # load other configuration
 include $(TOPDIR)/config.mk
 #########################################################################
 # U-Boot objects....order is important (i.e. start must be first)
 OBJS  = cpu/$(CPU)/start.o
 ifeq ($(CPU),i386)
 OBJS += cpu/$(CPU)/start16.o
 OBJS += cpu/$(CPU)/resetvec.o
 endif
 ifeq ($(CPU),ppc4xx)
 OBJS += cpu/$(CPU)/resetvec.o
 endif
 ifeq ($(CPU),mpc85xx)
 OBJS += cpu/$(CPU)/resetvec.o
 endif
 OBJS := $(addprefix $(obj),$(OBJS))
 LIBS  = lib_generic/libgeneric.a
 LIBS += lib_generic/lzma/liblzma.a
 LIBS += lib_generic/lzo/liblzo.a
 LIBS += $(shell if [ -f board/$(VENDOR)/common/Makefile ]; then echo \
 	"board/$(VENDOR)/common/lib$(VENDOR).a"; fi)
 LIBS += cpu/$(CPU)/lib$(CPU).a
 ifdef SOC
 LIBS += cpu/$(CPU)/$(SOC)/lib$(SOC).a
 endif
 ifeq ($(CPU),ixp)
 LIBS += cpu/ixp/npe/libnpe.a
 endif
 LIBS += lib_$(ARCH)/lib$(ARCH).a
 LIBS += fs/cramfs/libcramfs.a fs/fat/libfat.a fs/fdos/libfdos.a fs/jffs2/libjffs2.a \
 	fs/reiserfs/libreiserfs.a fs/ext2/libext2fs.a fs/yaffs2/libyaffs2.a \
 	fs/ubifs/libubifs.a
 LIBS += net/libnet.a
 LIBS += disk/libdisk.a
 LIBS += drivers/bios_emulator/libatibiosemu.a
 LIBS += drivers/block/libblock.a
 LIBS += drivers/dma/libdma.a
 LIBS += drivers/fpga/libfpga.a
 LIBS += drivers/gpio/libgpio.a
 LIBS += drivers/hwmon/libhwmon.a
 LIBS += drivers/i2c/libi2c.a
 LIBS += drivers/input/libinput.a
 LIBS += drivers/misc/libmisc.a
 LIBS += drivers/mmc/libmmc.a
 LIBS += drivers/mtd/libmtd.a
 LIBS += drivers/mtd/nand/libnand.a
 LIBS += drivers/mtd/nand_legacy/libnand_legacy.a
 LIBS += drivers/mtd/onenand/libonenand.a
 LIBS += drivers/mtd/ubi/libubi.a
 LIBS += drivers/mtd/spi/libspi_flash.a
 LIBS += drivers/net/libnet.a
 LIBS += drivers/net/phy/libphy.a
 LIBS += drivers/net/sk98lin/libsk98lin.a
 LIBS += drivers/pci/libpci.a
 LIBS += drivers/pcmcia/libpcmcia.a
 LIBS += drivers/spi/libspi.a
 ifeq ($(CPU),mpc83xx)
 LIBS += drivers/qe/qe.a
 endif
 ifeq ($(CPU),mpc85xx)
 LIBS += drivers/qe/qe.a
 LIBS += cpu/mpc8xxx/ddr/libddr.a
 TAG_SUBDIRS += cpu/mpc8xxx
 endif
 ifeq ($(CPU),mpc86xx)
 LIBS += cpu/mpc8xxx/ddr/libddr.a
 TAG_SUBDIRS += cpu/mpc8xxx
 endif
 LIBS += drivers/rtc/librtc.a
 LIBS += drivers/serial/libserial.a
 LIBS += drivers/twserial/libtws.a
 LIBS += drivers/usb/gadget/libusb_gadget.a
 LIBS += drivers/usb/host/libusb_host.a
 LIBS += drivers/usb/musb/libusb_musb.a
 LIBS += drivers/video/libvideo.a
 LIBS += drivers/watchdog/libwatchdog.a
 LIBS += common/libcommon.a
 LIBS += libfdt/libfdt.a
 LIBS += api/libapi.a
 LIBS += post/libpost.a
 LIBS := $(addprefix $(obj),$(LIBS))
 .PHONY : $(LIBS) $(TIMESTAMP_FILE) $(VERSION_FILE)
 LIBBOARD = board/$(BOARDDIR)/lib$(BOARD).a
 LIBBOARD := $(addprefix $(obj),$(LIBBOARD))
 # Add GCC lib
 PLATFORM_LIBS += -L $(shell dirname `$(CC) $(CFLAGS) -print-libgcc-file-name`) -lgcc
 # The "tools" are needed early, so put this first
 # Don't include stuff already done in $(LIBS)
 SUBDIRS	= tools \
 	  examples \
 	  api_examples
 .PHONY : $(SUBDIRS)
 ifeq ($(CONFIG_NAND_U_BOOT),y)
 NAND_SPL = nand_spl
 U_BOOT_NAND = $(obj)u-boot-nand.bin
 endif
 ifeq ($(CONFIG_ONENAND_U_BOOT),y)
 ONENAND_IPL = onenand_ipl
 U_BOOT_ONENAND = $(obj)u-boot-onenand.bin
 endif
 __OBJS := $(subst $(obj),,$(OBJS))
 __LIBS := $(subst $(obj),,$(LIBS)) $(subst $(obj),,$(LIBBOARD))
 #########################################################################
 #########################################################################
 ALL += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map $(U_BOOT_NAND) $(U_BOOT_ONENAND)
 ifeq ($(ARCH),blackfin)
 ALL += $(obj)u-boot.ldr
 endif
 all:		$(ALL)
 $(obj)u-boot.hex:	$(obj)u-boot
 		$(OBJCOPY) ${OBJCFLAGS} -O ihex $< $@
 $(obj)u-boot.srec:	$(obj)u-boot
 		$(OBJCOPY) -O srec $< $@
 $(obj)u-boot.bin:	$(obj)u-boot
 		$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
 $(obj)u-boot.ldr:	$(obj)u-boot
 		$(LDR) -T $(CONFIG_BFIN_CPU) -c $@ $< $(LDR_FLAGS)
 $(obj)u-boot.ldr.hex:	$(obj)u-boot.ldr
 		$(OBJCOPY) ${OBJCFLAGS} -O ihex $< $@ -I binary
 $(obj)u-boot.ldr.srec:	$(obj)u-boot.ldr
 		$(OBJCOPY) ${OBJCFLAGS} -O srec $< $@ -I binary
 $(obj)u-boot.img:	$(obj)u-boot.bin
 		./tools/mkimage -A $(ARCH) -T firmware -C none \
 		-a $(TEXT_BASE) -e 0 \
 		-n $(shell sed -n -e 's/.*U_BOOT_VERSION//p' $(VERSION_FILE) | \
 			sed -e 's/"[	 ]*$$/ for $(BOARD) board"/') \
 		-d $< $@
 $(obj)u-boot.sha1:	$(obj)u-boot.bin
 		$(obj)tools/ubsha1 $(obj)u-boot.bin
 $(obj)u-boot.dis:	$(obj)u-boot
 		$(OBJDUMP) -d $< > $@
 $(obj)u-boot:		depend $(SUBDIRS) $(OBJS) $(LIBBOARD) $(LIBS) $(LDSCRIPT)
 		UNDEF_SYM=`$(OBJDUMP) -x $(LIBBOARD) $(LIBS) | \
 		sed  -n -e 's/.*\($(SYM_PREFIX)__u_boot_cmd_.*\)/-u\1/p'|sort|uniq`;\
 		cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \
 			--start-group $(__LIBS) --end-group $(PLATFORM_LIBS) \
 			-Map u-boot.map -o u-boot
 $(OBJS):	depend
 		$(MAKE) -C cpu/$(CPU) $(if $(REMOTE_BUILD),$@,$(notdir $@))
 $(LIBS):	depend $(SUBDIRS)
 		$(MAKE) -C $(dir $(subst $(obj),,$@))
 $(LIBBOARD):	depend $(LIBS)
 		$(MAKE) -C $(dir $(subst $(obj),,$@))
 $(SUBDIRS):	depend
 		$(MAKE) -C $@ all
 $(LDSCRIPT):	depend
 		$(MAKE) -C $(dir $@) $(notdir $@)
 $(NAND_SPL):	$(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
 		$(MAKE) -C nand_spl/board/$(BOARDDIR) all
 $(U_BOOT_NAND):	$(NAND_SPL) $(obj)u-boot.bin
 		cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
 $(ONENAND_IPL):	$(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
 		$(MAKE) -C onenand_ipl/board/$(BOARDDIR) all
 $(U_BOOT_ONENAND):	$(ONENAND_IPL) $(obj)u-boot.bin
 		cat $(obj)onenand_ipl/onenand-ipl-2k.bin $(obj)u-boot.bin > $(obj)u-boot-onenand.bin
 		cat $(obj)onenand_ipl/onenand-ipl-4k.bin $(obj)u-boot.bin > $(obj)u-boot-flexonenand.bin
 $(VERSION_FILE):
 		@( printf '#define U_BOOT_VERSION "U-Boot %s%s"\n' "$(U_BOOT_VERSION)" \
 		 '$(shell $(TOPDIR)/tools/setlocalversion $(TOPDIR))' ) > $@.tmp
 		@cmp -s $@ $@.tmp && rm -f $@.tmp || mv -f $@.tmp $@
 $(TIMESTAMP_FILE):
 		@date +'#define U_BOOT_DATE "%b %d %C%y"' > $@
 		@date +'#define U_BOOT_TIME "%T"' >> $@
 gdbtools:
 		$(MAKE) -C tools/gdb all || exit 1
 updater:
 		$(MAKE) -C tools/updater all || exit 1
 env:
 		$(MAKE) -C tools/env all MTD_VERSION=${MTD_VERSION} || exit 1
 depend dep:	$(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
 		for dir in $(SUBDIRS) ; do $(MAKE) -C $$dir _depend ; done
 TAG_SUBDIRS += include
 TAG_SUBDIRS += lib_generic board/$(BOARDDIR)
 TAG_SUBDIRS += cpu/$(CPU)
 TAG_SUBDIRS += lib_$(ARCH)
 TAG_SUBDIRS += fs/cramfs
 TAG_SUBDIRS += fs/fat
 TAG_SUBDIRS += fs/fdos
 TAG_SUBDIRS += fs/jffs2
 TAG_SUBDIRS += fs/yaffs2
 TAG_SUBDIRS += net
 TAG_SUBDIRS += disk
 TAG_SUBDIRS += common
 TAG_SUBDIRS += drivers/bios_emulator
 TAG_SUBDIRS += drivers/block
 TAG_SUBDIRS += drivers/gpio
 TAG_SUBDIRS += drivers/hwmon
 TAG_SUBDIRS += drivers/i2c
 TAG_SUBDIRS += drivers/input
 TAG_SUBDIRS += drivers/misc
 TAG_SUBDIRS += drivers/mmc
 TAG_SUBDIRS += drivers/mtd
 TAG_SUBDIRS += drivers/mtd/nand
 TAG_SUBDIRS += drivers/mtd/nand_legacy
 TAG_SUBDIRS += drivers/mtd/onenand
 TAG_SUBDIRS += drivers/mtd/spi
 TAG_SUBDIRS += drivers/net
 TAG_SUBDIRS += drivers/net/sk98lin
 TAG_SUBDIRS += drivers/pci
 TAG_SUBDIRS += drivers/pcmcia
 TAG_SUBDIRS += drivers/qe
 TAG_SUBDIRS += drivers/rtc
 TAG_SUBDIRS += drivers/serial
 TAG_SUBDIRS += drivers/spi
 TAG_SUBDIRS += drivers/usb
 TAG_SUBDIRS += drivers/video
 tags ctags:
 		ctags -w -o $(obj)ctags `find $(SUBDIRS) $(TAG_SUBDIRS) \
 						-name '*.[ch]' -print`
 etags:
 		etags -a -o $(obj)etags `find $(SUBDIRS) $(TAG_SUBDIRS) \
 						-name '*.[ch]' -print`
 cscope:
 		find $(SUBDIRS) $(TAG_SUBDIRS) -name '*.[ch]' -print \
 						> cscope.files
 		cscope -b -q -k
 $(obj)System.map:	$(obj)u-boot
 		@$(NM) $< | \
 		grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
 		sort > $(obj)System.map
 #
 # Auto-generate the autoconf.mk file (which is included by all makefiles)
 #
 # This target actually generates 2 files; autoconf.mk and autoconf.mk.dep.
 # the dep file is only include in this top level makefile to determine when
 # to regenerate the autoconf.mk file.
 $(obj)include/autoconf.mk.dep: $(obj)include/config.h include/common.h
 	@$(XECHO) Generating $@ ; \
 	set -e ; \
 	: Generate the dependancies ; \
 	$(CC) -x c -DDO_DEPS_ONLY -M $(HOST_CFLAGS) $(CPPFLAGS) \
 		-MQ $(obj)include/autoconf.mk include/common.h > $@
 $(obj)include/autoconf.mk: $(obj)include/config.h
 	@$(XECHO) Generating $@ ; \
 	set -e ; \
 	: Extract the config macros ; \
 	$(CPP) $(CFLAGS) -DDO_DEPS_ONLY -dM include/common.h | \
 		sed -n -f tools/scripts/define2mk.sed > $@.tmp && \
 	mv $@.tmp $@
 sinclude $(obj)include/autoconf.mk.dep
 #########################################################################
 else	# !config.mk
 all $(obj)u-boot.hex $(obj)u-boot.srec $(obj)u-boot.bin \
 $(obj)u-boot.img $(obj)u-boot.dis $(obj)u-boot \
 $(SUBDIRS) $(TIMESTAMP_FILE) $(VERSION_FILE) gdbtools updater env depend \
 dep tags ctags etags cscope $(obj)System.map:
 	@echo "System not configured - see README" >&2
 	@ exit 1
 endif	# config.mk
 .PHONY : CHANGELOG
 CHANGELOG:
 	git log --no-merges U-Boot-1_1_5.. | \
 	unexpand -a | sed -e 's/\s\s*$$//' > $@
 include/license.h: tools/bin2header COPYING
 	 cat COPYING | gzip -9 -c | ./tools/bin2header license_gzip > include/license.h
 #########################################################################
 unconfig:
 	@rm -f $(obj)include/config.h $(obj)include/config.mk \
 		$(obj)board/*/config.tmp $(obj)board/*/*/config.tmp \
 		$(obj)include/autoconf.mk $(obj)include/autoconf.mk.dep
 #========================================================================
 # PowerPC
 #========================================================================
 #########################################################################
 ## MPC5xx Systems
 #########################################################################
 canmb_config:	unconfig
 	@$(MKCONFIG) -a canmb ppc mpc5xxx canmb
 cmi_mpc5xx_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc5xx cmi
 PATI_config:		unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc5xx pati mpl
 #########################################################################
 ## MPC5xxx Systems
 #########################################################################
 aev_config: unconfig
 	@$(MKCONFIG) -a aev ppc mpc5xxx tqm5200 tqc
 BC3450_config:	unconfig
 	@$(MKCONFIG) -a BC3450 ppc mpc5xxx bc3450
 cm5200_config:	unconfig
 	@$(MKCONFIG) -a cm5200 ppc mpc5xxx cm5200
 cpci5200_config:  unconfig
 	@$(MKCONFIG) -a cpci5200  ppc mpc5xxx cpci5200 esd
 digsy_mtc_config \
 digsy_mtc_LOWBOOT_config	\
 digsy_mtc_RAMBOOT_config:	unconfig
 	@mkdir -p $(obj)include
 	@mkdir -p $(obj)board/digsy_mtc
 	@ >$(obj)include/config.h
 	@[ -z "$(findstring LOWBOOT_,$@)" ] || \
 		{ echo "TEXT_BASE = 0xFF000000" >$(obj)board/digsy_mtc/config.tmp ; \
 		  echo "... with LOWBOOT configuration" ; \
 		}
 	@[ -z "$(findstring RAMBOOT_,$@)" ] || \
 		{ echo "TEXT_BASE = 0x00100000" >$(obj)board/digsy_mtc/config.tmp ; \
 		  echo "... with RAMBOOT configuration" ; \
 		}
 	@$(MKCONFIG) -a digsy_mtc  ppc mpc5xxx digsy_mtc
 hmi1001_config:	unconfig
 	@$(MKCONFIG) hmi1001 ppc mpc5xxx hmi1001
 Lite5200_config				\
 Lite5200_LOWBOOT_config			\
 Lite5200_LOWBOOT08_config		\
 icecube_5200_config			\
 icecube_5200_LOWBOOT_config		\
 icecube_5200_LOWBOOT08_config		\
 icecube_5200_DDR_config			\
 icecube_5200_DDR_LOWBOOT_config		\
 icecube_5200_DDR_LOWBOOT08_config	\
 icecube_5100_config:			unconfig
 	@mkdir -p $(obj)include
 	@mkdir -p $(obj)board/icecube
 	@[ -z "$(findstring LOWBOOT_,$@)" ] || \
 		{ if [ "$(findstring DDR,$@)" ] ; \
 			then echo "TEXT_BASE = 0xFF800000" >$(obj)board/icecube/config.tmp ; \
 			else echo "TEXT_BASE = 0xFF000000" >$(obj)board/icecube/config.tmp ; \
 		  fi ; \
 		  $(XECHO) "... with LOWBOOT configuration" ; \
 		}
 	@[ -z "$(findstring LOWBOOT08,$@)" ] || \
 		{ echo "TEXT_BASE = 0xFF800000" >$(obj)board/icecube/config.tmp ; \
 		  echo "... with 8 MB flash only" ; \
 		  $(XECHO) "... with LOWBOOT configuration" ; \
 		}
 	@[ -z "$(findstring DDR,$@)" ] || \
 		{ echo "#define CONFIG_MPC5200_DDR"	>>$(obj)include/config.h ; \
 		  $(XECHO) "... DDR memory revision" ; \
 		}
 	@[ -z "$(findstring 5200,$@)" ] || \
 		{ echo "#define CONFIG_MPC5200"		>>$(obj)include/config.h ; \
 		  $(XECHO) "... with MPC5200 processor" ; \
 		}
 	@[ -z "$(findstring 5100,$@)" ] || \
 		{ echo "#define CONFIG_MGT5100"		>>$(obj)include/config.h ; \
 		  $(XECHO) "... with MGT5100 processor" ; \
 		}
 	@$(MKCONFIG) -a IceCube ppc mpc5xxx icecube
 jupiter_config:	unconfig
 	@$(MKCONFIG) jupiter ppc mpc5xxx jupiter
 inka4x0_config:	unconfig
 	@$(MKCONFIG) inka4x0 ppc mpc5xxx inka4x0
 lite5200b_config	\
 lite5200b_PM_config	\
 lite5200b_LOWBOOT_config:	unconfig
 	@mkdir -p $(obj)include
 	@mkdir -p $(obj)board/icecube
 	@ echo "#define CONFIG_MPC5200_DDR"	>>$(obj)include/config.h
 	@ $(XECHO) "... DDR memory revision"
 	@ echo "#define CONFIG_MPC5200"		>>$(obj)include/config.h
 	@ echo "#define CONFIG_LITE5200B"	>>$(obj)include/config.h
 	@[ -z "$(findstring _PM_,$@)" ] || \
 		{ echo "#define CONFIG_LITE5200B_PM"	>>$(obj)include/config.h ; \
 		  $(XECHO) "... with power management (low-power mode) support" ; \
 		}
 	@[ -z "$(findstring LOWBOOT_,$@)" ] || \
 		{ echo "TEXT_BASE = 0xFF000000" >$(obj)board/icecube/config.tmp ; \
 		  $(XECHO) "... with LOWBOOT configuration" ; \
 		}
 	@ $(XECHO) "... with MPC5200B processor"
 	@$(MKCONFIG) -a IceCube  ppc mpc5xxx icecube
 mcc200_config	\
 mcc200_SDRAM_config	\
 mcc200_highboot_config	\
 mcc200_COM12_config	\
 mcc200_COM12_SDRAM_config	\
 mcc200_COM12_highboot_config	\
 mcc200_COM12_highboot_SDRAM_config	\
 mcc200_highboot_SDRAM_config	\
 prs200_config	\
 prs200_DDR_config	\
 prs200_highboot_config	\
 prs200_highboot_DDR_config:	unconfig
 	@mkdir -p $(obj)include
 	@mkdir -p $(obj)board/mcc200
 	@[ -n "$(findstring highboot,$@)" ] || \
 		{ $(XECHO) "... with lowboot configuration" ; \
 		}
 	@[ -z "$(findstring highboot,$@)" ] || \
 		{ echo "TEXT_BASE = 0xFFF00000" >$(obj)board/mcc200/config.tmp ; \
 		  $(XECHO) "... with highboot configuration" ; \
 		}
 	@[ -n "$(findstring _SDRAM,$@)" ] || \
 		{ if [ -n "$(findstring mcc200,$@)" ]; \
 		  then \
 			$(XECHO) "... with DDR" ; \
 		  else \
 			if [ -n "$(findstring _DDR,$@)" ];\
 			then \
 				$(XECHO) "... with DDR" ; \
 			else \
 				echo "#define CONFIG_MCC200_SDRAM" >>$(obj)include/config.h ;\
 				$(XECHO) "... with SDRAM" ; \
 			fi; \
 		  fi; \
 		}
 	@[ -z "$(findstring _SDRAM,$@)" ] || \
 		{ echo "#define CONFIG_MCC200_SDRAM"	>>$(obj)include/config.h ; \
 		  $(XECHO) "... with SDRAM" ; \
 		}
 	@[ -z "$(findstring COM12,$@)" ] || \
 		{ echo "#define CONFIG_CONSOLE_COM12"	>>$(obj)include/config.h ; \
 		  $(XECHO) "... with console on COM12" ; \
 		}
 	@[ -z "$(findstring prs200,$@)" ] || \
 		{ echo "#define CONFIG_PRS200"	>>$(obj)include/config.h ;\
 		}
 	@$(MKCONFIG) -n $@ -a mcc200 ppc mpc5xxx mcc200
 mecp5200_config:  unconfig
 	@$(MKCONFIG) mecp5200  ppc mpc5xxx mecp5200 esd
 motionpro_config:	unconfig
 	@$(MKCONFIG) motionpro ppc mpc5xxx motionpro
 mucmc52_config:		unconfig
 	@$(MKCONFIG) mucmc52 ppc mpc5xxx mucmc52
 munices_config:	unconfig
 	@$(MKCONFIG) munices ppc mpc5xxx munices
 MVBC_P_config: unconfig
 	@mkdir -p $(obj)include
 	@mkdir -p $(obj)board/mvbc_p
 	@ >$(obj)include/config.h
 	@[ -z "$(findstring MVBC_P,$@)" ] || \
 	{   	echo "#define CONFIG_MVBC_P" 	>>$(obj)include/config.h; }
 	@$(MKCONFIG) -n $@ -a MVBC_P ppc mpc5xxx mvbc_p matrix_vision
 o2dnt_config:	unconfig
 	@$(MKCONFIG) o2dnt ppc mpc5xxx o2dnt
 pf5200_config:	unconfig
 	@$(MKCONFIG) pf5200  ppc mpc5xxx pf5200 esd
 PM520_config \
 PM520_DDR_config \
 PM520_ROMBOOT_config \
 PM520_ROMBOOT_DDR_config:	unconfig
 	@mkdir -p $(obj)include
 	@[ -z "$(findstring DDR,$@)" ] || \
 		{ echo "#define CONFIG_MPC5200_DDR"	>>$(obj)include/config.h ; \
 		  $(XECHO) "... DDR memory revision" ; \
 		}
 	@[ -z "$(findstring ROMBOOT,$@)" ] || \
 		{ echo "#define CONFIG_BOOT_ROM" >>$(obj)include/config.h ; \
 		  $(XECHO) "... booting from 8-bit flash" ; \
 		}
 	@$(MKCONFIG) -a PM520 ppc mpc5xxx pm520
 smmaco4_config: unconfig
 	@$(MKCONFIG) -a smmaco4 ppc mpc5xxx tqm5200 tqc
 spieval_config:	unconfig
 	@$(MKCONFIG) -a spieval ppc mpc5xxx tqm5200 tqc
 TB5200_B_config \
 TB5200_config:	unconfig
 	@mkdir -p $(obj)include
 	@[ -z "$(findstring _B,$@)" ] || \
 		{ echo "#define CONFIG_TQM5200_B"	>>$(obj)include/config.h ; \
 		  $(XECHO) "... with MPC5200B processor" ; \
 		}
 	@$(MKCONFIG) -n $@ -a TB5200 ppc mpc5xxx tqm5200 tqc
 MINI5200_config	\
 EVAL5200_config	\
 TOP5200_config:	unconfig
 	@mkdir -p $(obj)include
 	@ echo "#define CONFIG_$(@:_config=) 1"	>$(obj)include/config.h
 	@$(MKCONFIG) -n $@ -a TOP5200 ppc mpc5xxx top5200 emk
 Total5100_config		\
 Total5200_config		\
 Total5200_lowboot_config	\
 Total5200_Rev2_config		\
 Total5200_Rev2_lowboot_config:	unconfig
 	@mkdir -p $(obj)include
 	@mkdir -p $(obj)board/total5200
 	@[ -z "$(findstring 5100,$@)" ] || \
 		{ echo "#define CONFIG_MGT5100"		>>$(obj)include/config.h ; \
 		  $(XECHO) "... with MGT5100 processor" ; \
 		}
 	@[ -z "$(findstring 5200,$@)" ] || \
 		{ echo "#define CONFIG_MPC5200"		>>$(obj)include/config.h ; \
 		  $(XECHO) "... with MPC5200 processor" ; \
 		}
 	@[ -n "$(findstring Rev,$@)" ] || \
 		{ echo "#define CONFIG_TOTAL5200_REV 1"	>>$(obj)include/config.h ; \
 		  $(XECHO) "... revision 1 board" ; \
 		}
 	@[ -z "$(findstring Rev2_,$@)" ] || \
 		{ echo "#define CONFIG_TOTAL5200_REV 2"	>>$(obj)include/config.h ; \
 		  $(XECHO) "... revision 2 board" ; \
 		}
 	@[ -z "$(findstring lowboot_,$@)" ] || \
 		{ echo "TEXT_BASE = 0xFE000000" >$(obj)board/total5200/config.tmp ; \
 		  $(XECHO) "... with lowboot configuration" ; \
 		}
 	@$(MKCONFIG) -a Total5200 ppc mpc5xxx total5200
 cam5200_config \
 cam5200_niosflash_config \
 fo300_config \
 MiniFAP_config \
 TQM5200S_config \
 TQM5200S_HIGHBOOT_config \
 TQM5200_B_config \
 TQM5200_B_HIGHBOOT_config \
 TQM5200_config	\
 TQM5200_STK100_config:	unconfig
 	@mkdir -p $(obj)include
 	@mkdir -p $(obj)board/tqc/tqm5200
 	@[ -z "$(findstring cam5200,$@)" ] || \
 		{ echo "#define CONFIG_CAM5200"	>>$(obj)include/config.h ; \
 		  echo "#define CONFIG_TQM5200S"	>>$(obj)include/config.h ; \
 		  echo "#define CONFIG_TQM5200_B"	>>$(obj)include/config.h ; \
 		  $(XECHO) "... TQM5200S on Cam5200" ; \
 		}
 	@[ -z "$(findstring niosflash,$@)" ] || \
 		{ echo "#define CONFIG_CAM5200_NIOSFLASH"	>>$(obj)include/config.h ; \
 		  $(XECHO) "... with NIOS flash driver" ; \
 		}
 	@[ -z "$(findstring fo300,$@)" ] || \
 		{ echo "#define CONFIG_FO300"	>>$(obj)include/config.h ; \
 		  $(XECHO) "... TQM5200 on FO300" ; \
 		}
 	@[ -z "$(findstring MiniFAP,$@)" ] || \
 		{ echo "#define CONFIG_MINIFAP"	>>$(obj)include/config.h ; \
 		  $(XECHO) "... TQM5200_AC on MiniFAP" ; \
 		}
 	@[ -z "$(findstring STK100,$@)" ] || \
 		{ echo "#define CONFIG_STK52XX_REV100"	>>$(obj)include/config.h ; \
 		  $(XECHO) "... on a STK52XX.100 base board" ; \
 		}
 	@[ -z "$(findstring TQM5200_B,$@)" ] || \
 		{ echo "#define CONFIG_TQM5200_B"	>>$(obj)include/config.h ; \
 		}
 	@[ -z "$(findstring TQM5200S,$@)" ] || \
 		{ echo "#define CONFIG_TQM5200S"	>>$(obj)include/config.h ; \
 		  echo "#define CONFIG_TQM5200_B"	>>$(obj)include/config.h ; \
 		}
 	@[ -z "$(findstring HIGHBOOT,$@)" ] || \
 		{ echo "TEXT_BASE = 0xFFF00000" >$(obj)board/tqm5200/config.tmp ; \
 		}
 	@$(MKCONFIG) -n $@ -a TQM5200 ppc mpc5xxx tqm5200 tqc
 uc101_config:		unconfig
 	@$(MKCONFIG) uc101 ppc mpc5xxx uc101
 v38b_config: unconfig
 	@$(MKCONFIG) -a v38b ppc mpc5xxx v38b
 #########################################################################
 ## MPC512x Systems
 #########################################################################
 ads5121_config \
 ads5121_rev2_config	\
 	: unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring rev2,$@)" ] ; then \
 		echo "#define CONFIG_ADS5121_REV2 1" > $(obj)include/config.h; \
 	fi
 	@$(MKCONFIG) -a ads5121 ppc mpc512x ads5121
 #########################################################################
 ## MPC8xx Systems
 #########################################################################
 Adder_config	\
 Adder87x_config \
 AdderII_config	\
 	:		unconfig
 	@mkdir -p $(obj)include
 	$(if $(findstring AdderII,$@), \
 	@echo "#define CONFIG_MPC852T" > $(obj)include/config.h)
 	@$(MKCONFIG) -a Adder ppc mpc8xx adder
 AdderUSB_config:	unconfig
 	@$(MKCONFIG) -a AdderUSB ppc mpc8xx adder
 ADS860_config	  \
 FADS823_config	  \
 FADS850SAR_config \
 MPC86xADS_config  \
 MPC885ADS_config  \
 FADS860T_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx fads
 AMX860_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx amx860 westel
 c2mon_config:		unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx c2mon
 CCM_config:		unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx CCM siemens
 cogent_mpc8xx_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx cogent
 ELPT860_config:		unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx elpt860 LEOX
 EP88x_config:		unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx ep88x
 ESTEEM192E_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx esteem192e
 ETX094_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx etx094
 FLAGADM_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx flagadm
 xtract_GEN860T = $(subst _SC,,$(subst _config,,$1))
 GEN860T_SC_config	\
 GEN860T_config: unconfig
 	@mkdir -p $(obj)include
 	@[ -z "$(findstring _SC,$@)" ] || \
 		{ echo "#define CONFIG_SC" >>$(obj)include/config.h ; \
 		  $(XECHO) "With reduced H/W feature set (SC)..." ; \
 		}
 	@$(MKCONFIG) -a $(call xtract_GEN860T,$@) ppc mpc8xx gen860t
 GENIETV_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx genietv
 GTH_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx gth
 hermes_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx hermes
 HMI10_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx tqm8xx tqc
 IAD210_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx IAD210 siemens
 xtract_ICU862 = $(subst _100MHz,,$(subst _config,,$1))
 ICU862_100MHz_config	\
 ICU862_config: unconfig
 	@mkdir -p $(obj)include
 	@[ -z "$(findstring _100MHz,$@)" ] || \
 		{ echo "#define CONFIG_100MHz"	>>$(obj)include/config.h ; \
 		  $(XECHO) "... with 100MHz system clock" ; \
 		}
 	@$(MKCONFIG) -a $(call xtract_ICU862,$@) ppc mpc8xx icu862
 IP860_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx ip860
 IVML24_256_config \
 IVML24_128_config \
 IVML24_config:	unconfig
 	@mkdir -p $(obj)include
 	@[ -z "$(findstring IVML24_config,$@)" ] || \
 		 { echo "#define CONFIG_IVML24_16M"	>>$(obj)include/config.h ; \
 		 }
 	@[ -z "$(findstring IVML24_128_config,$@)" ] || \
 		 { echo "#define CONFIG_IVML24_32M"	>>$(obj)include/config.h ; \
 		 }
 	@[ -z "$(findstring IVML24_256_config,$@)" ] || \
 		 { echo "#define CONFIG_IVML24_64M"	>>$(obj)include/config.h ; \
 		 }
 	@$(MKCONFIG) -a IVML24 ppc mpc8xx ivm
 IVMS8_256_config \
 IVMS8_128_config \
 IVMS8_config:	unconfig
 	@mkdir -p $(obj)include
 	@[ -z "$(findstring IVMS8_config,$@)" ] || \
 		 { echo "#define CONFIG_IVMS8_16M"	>>$(obj)include/config.h ; \
 		 }
 	@[ -z "$(findstring IVMS8_128_config,$@)" ] || \
 		 { echo "#define CONFIG_IVMS8_32M"	>>$(obj)include/config.h ; \
 		 }
 	@[ -z "$(findstring IVMS8_256_config,$@)" ] || \
 		 { echo "#define CONFIG_IVMS8_64M"	>>$(obj)include/config.h ; \
 		 }
 	@$(MKCONFIG) -a IVMS8 ppc mpc8xx ivm
 kmsupx4_config:		unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx km8xx keymile
 KUP4K_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx kup4k kup
 KUP4X_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx kup4x kup
 LANTEC_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx lantec
 lwmon_config:		unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx lwmon
 MBX_config	\
 MBX860T_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx mbx8xx
 mgsuvd_config:		unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx km8xx keymile
 MHPC_config:		unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx mhpc eltec
 xtract_NETVIA = $(subst _V2,,$(subst _config,,$1))
 NETVIA_V2_config \
 NETVIA_config:		unconfig
 	@mkdir -p $(obj)include
 	@[ -z "$(findstring NETVIA_config,$@)" ] || \
 		 { echo "#define CONFIG_NETVIA_VERSION 1" >>$(obj)include/config.h ; \
 		  $(XECHO) "... Version 1" ; \
 		 }
 	@[ -z "$(findstring NETVIA_V2_config,$@)" ] || \
 		 { echo "#define CONFIG_NETVIA_VERSION 2" >>$(obj)include/config.h ; \
 		  $(XECHO) "... Version 2" ; \
 		 }
 	@$(MKCONFIG) -a $(call xtract_NETVIA,$@) ppc mpc8xx netvia
 xtract_NETPHONE = $(subst _V2,,$(subst _config,,$1))
 NETPHONE_V2_config \
 NETPHONE_config:	unconfig
 	@mkdir -p $(obj)include
 	@[ -z "$(findstring NETPHONE_config,$@)" ] || \
 		 { echo "#define CONFIG_NETPHONE_VERSION 1" >>$(obj)include/config.h ; \
 		 }
 	@[ -z "$(findstring NETPHONE_V2_config,$@)" ] || \
 		 { echo "#define CONFIG_NETPHONE_VERSION 2" >>$(obj)include/config.h ; \
 		 }
 	@$(MKCONFIG) -a $(call xtract_NETPHONE,$@) ppc mpc8xx netphone
 xtract_NETTA = $(subst _SWAPHOOK,,$(subst _6412,,$(subst _ISDN,,$(subst _config,,$1))))
 NETTA_ISDN_6412_SWAPHOOK_config \
 NETTA_ISDN_SWAPHOOK_config \
 NETTA_6412_SWAPHOOK_config \
 NETTA_SWAPHOOK_config \
 NETTA_ISDN_6412_config \
 NETTA_ISDN_config \
 NETTA_6412_config \
 NETTA_config:		unconfig
 	@mkdir -p $(obj)include
 	@[ -z "$(findstring ISDN_,$@)" ] || \
 		 { echo "#define CONFIG_NETTA_ISDN 1" >>$(obj)include/config.h ; \
 		 }
 	@[ -n "$(findstring ISDN_,$@)" ] || \
 		 { echo "#undef CONFIG_NETTA_ISDN" >>$(obj)include/config.h ; \
 		 }
 	@[ -z "$(findstring 6412_,$@)" ] || \
 		 { echo "#define CONFIG_NETTA_6412 1" >>$(obj)include/config.h ; \
 		 }
 	@[ -n "$(findstring 6412_,$@)" ] || \
 		 { echo "#undef CONFIG_NETTA_6412" >>$(obj)include/config.h ; \
 		 }
 	@[ -z "$(findstring SWAPHOOK_,$@)" ] || \
 		 { echo "#define CONFIG_NETTA_SWAPHOOK 1" >>$(obj)include/config.h ; \
 		 }
 	@[ -n "$(findstring SWAPHOOK_,$@)" ] || \
 		 { echo "#undef CONFIG_NETTA_SWAPHOOK" >>$(obj)include/config.h ; \
 		 }
 	@$(MKCONFIG) -a $(call xtract_NETTA,$@) ppc mpc8xx netta
 xtract_NETTA2 = $(subst _V2,,$(subst _config,,$1))
 NETTA2_V2_config \
 NETTA2_config:		unconfig
 	@mkdir -p $(obj)include
 	@[ -z "$(findstring NETTA2_config,$@)" ] || \
 		 { echo "#define CONFIG_NETTA2_VERSION 1" >>$(obj)include/config.h ; \
 		 }
 	@[ -z "$(findstring NETTA2_V2_config,$@)" ] || \
 		 { echo "#define CONFIG_NETTA2_VERSION 2" >>$(obj)include/config.h ; \
 		 }
 	@$(MKCONFIG) -a $(call xtract_NETTA2,$@) ppc mpc8xx netta2
 NC650_Rev1_config \
 NC650_Rev2_config \
 CP850_config:	unconfig
 	@mkdir -p $(obj)include
 	@[ -z "$(findstring CP850,$@)" ] || \
 		 { echo "#define CONFIG_CP850 1" >>$(obj)include/config.h ; \
 		   echo "#define CONFIG_IDS852_REV2 1" >>$(obj)include/config.h ; \
 		 }
 	@[ -z "$(findstring Rev1,$@)" ] || \
 		 { echo "#define CONFIG_IDS852_REV1 1" >>$(obj)include/config.h ; \
 		 }
 	@[ -z "$(findstring Rev2,$@)" ] || \
 		 { echo "#define CONFIG_IDS852_REV2 1" >>$(obj)include/config.h ; \
 		 }
 	@$(MKCONFIG) -a NC650 ppc mpc8xx nc650
 NX823_config:		unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx nx823
 pcu_e_config:		unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx pcu_e siemens
 QS850_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx qs850 snmc
 QS823_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx qs850 snmc
 QS860T_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx qs860t snmc
 quantum_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx quantum
 R360MPI_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx r360mpi
 RBC823_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx rbc823
 RPXClassic_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx RPXClassic
 RPXlite_config:		unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx RPXlite
 RPXlite_DW_64_config		\
 RPXlite_DW_LCD_config		\
 RPXlite_DW_64_LCD_config	\
 RPXlite_DW_NVRAM_config		\
 RPXlite_DW_NVRAM_64_config	\
 RPXlite_DW_NVRAM_LCD_config	\
 RPXlite_DW_NVRAM_64_LCD_config	\
 RPXlite_DW_config:	unconfig
 	@mkdir -p $(obj)include
 	@[ -z "$(findstring _64,$@)" ] || \
 		{ echo "#define RPXlite_64MHz"		>>$(obj)include/config.h ; \
 		  $(XECHO) "... with 64MHz system clock ..."; \
 		}
 	@[ -z "$(findstring _LCD,$@)" ] || \
 		{ echo "#define CONFIG_LCD"		>>$(obj)include/config.h ; \
 		  echo "#define CONFIG_NEC_NL6448BC20"	>>$(obj)include/config.h ; \
 		  $(XECHO) "... with LCD display ..."; \
 		}
 	@[ -z "$(findstring _NVRAM,$@)" ] || \
 		{ echo "#define  CONFIG_ENV_IS_IN_NVRAM"	>>$(obj)include/config.h ; \
 		  $(XECHO) "... with ENV in NVRAM ..."; \
 		}
 	@$(MKCONFIG) -a RPXlite_DW ppc mpc8xx RPXlite_dw
 rmu_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx rmu
 RRvision_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx RRvision
 RRvision_LCD_config:	unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_LCD" >$(obj)include/config.h
 	@echo "#define CONFIG_SHARP_LQ104V7DS01" >>$(obj)include/config.h
 	@$(MKCONFIG) -a RRvision ppc mpc8xx RRvision
 SM850_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx tqm8xx tqc
 spc1920_config:		unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx spc1920
 SPD823TS_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx spd8xx
 stxxtc_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx stxxtc
 svm_sc8xx_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx svm_sc8xx
 SXNI855T_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx sixnet
 # EMK MPC8xx based modules
 TOP860_config:		unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx top860 emk
 # Play some tricks for configuration selection
 # Only 855 and 860 boards may come with FEC
 # and only 823 boards may have LCD support
 xtract_8xx = $(subst _LCD,,$(subst _config,,$1))
 FPS850L_config		\
 FPS860L_config		\
 NSCU_config		\
 TQM823L_config		\
 TQM823L_LCD_config	\
 TQM850L_config		\
 TQM855L_config		\
 TQM860L_config		\
 TQM862L_config		\
 TQM823M_config		\
 TQM850M_config		\
 TQM855M_config		\
 TQM860M_config		\
 TQM862M_config		\
 TQM866M_config		\
 TQM885D_config		\
 TK885D_config		\
 virtlab2_config:	unconfig
 	@mkdir -p $(obj)include
 	@[ -z "$(findstring _LCD,$@)" ] || \
 		{ echo "#define CONFIG_LCD"		>>$(obj)include/config.h ; \
 		  echo "#define CONFIG_NEC_NL6448BC20"	>>$(obj)include/config.h ; \
 		  $(XECHO) "... with LCD display" ; \
 		}
 	@$(MKCONFIG) -a $(call xtract_8xx,$@) ppc mpc8xx tqm8xx tqc
 TTTech_config:	unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_LCD" >$(obj)include/config.h
 	@echo "#define CONFIG_SHARP_LQ104V7DS01" >>$(obj)include/config.h
 	@$(MKCONFIG) -a TQM823L ppc mpc8xx tqm8xx tqc
 uc100_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx uc100
 v37_config:	unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_LCD" >$(obj)include/config.h
 	@echo "#define CONFIG_SHARP_LQ084V1DG21" >>$(obj)include/config.h
 	@$(MKCONFIG) $(@:_config=) ppc mpc8xx v37
 wtk_config:	unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_LCD" >$(obj)include/config.h
 	@echo "#define CONFIG_SHARP_LQ065T9DR51U" >>$(obj)include/config.h
 	@$(MKCONFIG) -a TQM823L ppc mpc8xx tqm8xx tqc
 #########################################################################
 ## PPC4xx Systems
 #########################################################################
 xtract_4xx = $(subst _25,,$(subst _33,,$(subst _BA,,$(subst _ME,,$(subst _HI,,$(subst _config,,$1))))))
 acadia_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx acadia amcc
 acadia_nand_config:	unconfig
 	@mkdir -p $(obj)include $(obj)board/amcc/acadia
 	@mkdir -p $(obj)nand_spl/board/amcc/acadia
 	@echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
 	@$(MKCONFIG) -n $@ -a acadia ppc ppc4xx acadia amcc
 	@echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/acadia/config.tmp
 	@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
 ADCIOP_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx adciop esd
 alpr_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx alpr prodrive
 AP1000_config:unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx ap1000 amirix
 APC405_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx apc405 esd
 AR405_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx ar405 esd
 ASH405_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx ash405 esd
 bamboo_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx bamboo amcc
 bamboo_nand_config:	unconfig
 	@mkdir -p $(obj)include $(obj)board/amcc/bamboo
 	@mkdir -p $(obj)nand_spl/board/amcc/bamboo
 	@echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
 	@$(MKCONFIG) -n $@ -a bamboo ppc ppc4xx bamboo amcc
 	@echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/bamboo/config.tmp
 	@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
 bubinga_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx bubinga amcc
 CANBT_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx canbt esd
 # Arches, Canyonlands & Glacier use different U-Boot images
 arches_config \
 canyonlands_config \
 glacier_config:	unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \
 		tr '[:lower:]' '[:upper:]')" >$(obj)include/config.h
 	@$(MKCONFIG) -n $@ -a canyonlands ppc ppc4xx canyonlands amcc
 canyonlands_nand_config \
 glacier_nand_config:	unconfig
 	@mkdir -p $(obj)include $(obj)board/amcc/canyonlands
 	@mkdir -p $(obj)nand_spl/board/amcc/canyonlands
 	@echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
 	@echo "#define CONFIG_$$(echo $(subst ,,$(@:_nand_config=)) | \
 		tr '[:lower:]' '[:upper:]')" >> $(obj)include/config.h
 	@$(MKCONFIG) -n $@ -a canyonlands ppc ppc4xx canyonlands amcc
 	@echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/canyonlands/config.tmp
 	@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
 CATcenter_config	\
 CATcenter_25_config	\
 CATcenter_33_config:	unconfig
 	@mkdir -p $(obj)include
 	@ echo "/* CATcenter uses PPChameleon Model ME */"  > $(obj)include/config.h
 	@ echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 1" >> $(obj)include/config.h
 	@[ -z "$(findstring _25,$@)" ] || \
 		{ echo "#define CONFIG_PPCHAMELEON_CLK_25" >> $(obj)include/config.h ; \
 		  $(XECHO) "SysClk = 25MHz" ; \
 		}
 	@[ -z "$(findstring _33,$@)" ] || \
 		{ echo "#define CONFIG_PPCHAMELEON_CLK_33" >> $(obj)include/config.h ; \
 		  $(XECHO) "SysClk = 33MHz" ; \
 		}
 	@$(MKCONFIG) -a $(call xtract_4xx,$@) ppc ppc4xx PPChameleonEVB dave
 CMS700_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx cms700 esd
 CPCI2DP_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx cpci2dp esd
 CPCI405_config		\
 CPCI4052_config		\
 CPCI405DT_config	\
 CPCI405AB_config:	unconfig
 	@mkdir -p $(obj)board/esd/cpci405
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx cpci405 esd
 CPCIISER4_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx cpciiser4 esd
 CRAYL1_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx L1 cray
 csb272_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx csb272
 csb472_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx csb472
 DASA_SIM_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx dasa_sim esd
 DP405_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx dp405 esd
 DU405_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx du405 esd
 DU440_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx du440 esd
 ebony_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx ebony amcc
 ERIC_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx eric
 EXBITGEN_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx exbitgen
 fx12mm_flash_config: unconfig
 	@mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic
 	@mkdir -p $(obj)include $(obj)board/avnet/fx12mm
 	@echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-rom.lds"\
 		> $(obj)board/avnet/fx12mm/config.tmp
 	@echo "TEXT_BASE := 0xFFCB0000" \
 		>> $(obj)board/avnet/fx12mm/config.tmp
 	@$(MKCONFIG) fx12mm ppc ppc4xx fx12mm avnet
 fx12mm_config: unconfig
 	@mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic
 	@mkdir -p $(obj)include $(obj)board/avnet/fx12mm
 	@echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-ram.lds"\
 		> $(obj)board/avnet/fx12mm/config.tmp
 	@echo "TEXT_BASE := 0x03000000" \
 		>> $(obj)board/avnet/fx12mm/config.tmp
 	@$(MKCONFIG) fx12mm ppc ppc4xx fx12mm avnet
 G2000_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx g2000
 gdppc440etx_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx gdppc440etx gdsys
 hcu4_config:	unconfig
 	@mkdir -p $(obj)board/netstal/common
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx hcu4 netstal
 hcu5_config:	unconfig
 	@mkdir -p $(obj)board/netstal/common
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx hcu5 netstal
 HH405_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx hh405 esd
 HUB405_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx hub405 esd
 JSE_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx jse
 KAREF_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx karef sandburst
 katmai_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx katmai amcc
 # Kilauea & Haleakala images are identical (recognized via PVR)
 kilauea_config \
 haleakala_config: unconfig
 	@$(MKCONFIG) -n $@ -a kilauea ppc ppc4xx kilauea amcc
 kilauea_nand_config \
 haleakala_nand_config: unconfig
 	@mkdir -p $(obj)include $(obj)board/amcc/kilauea
 	@mkdir -p $(obj)nand_spl/board/amcc/kilauea
 	@echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
 	@$(MKCONFIG) -n $@ -a kilauea ppc ppc4xx kilauea amcc
 	@echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/kilauea/config.tmp
 	@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
 korat_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx korat
 luan_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx luan amcc
 lwmon5_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx lwmon5
 makalu_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx makalu amcc
 mcu25_config:  unconfig
 	@mkdir -p $(obj)board/netstal/common
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx mcu25 netstal
 METROBOX_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx metrobox sandburst
 MIP405_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx mip405 mpl
 MIP405T_config:	unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_MIP405T" >$(obj)include/config.h
 	@$(XECHO) "Enable subset config for MIP405T"
 	@$(MKCONFIG) -a MIP405 ppc ppc4xx mip405 mpl
 ML2_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx ml2
 ml300_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx ml300 xilinx
 ml507_flash_config: unconfig
 	@mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic
 	@mkdir -p $(obj)include $(obj)board/xilinx/ml507
 	@echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-rom.lds"\
 		> $(obj)board/xilinx/ml507/config.tmp
 	@echo "TEXT_BASE := 0xFE360000" \
 		>> $(obj)board/xilinx/ml507/config.tmp
 	@$(MKCONFIG) ml507 ppc ppc4xx ml507 xilinx
 ml507_config: unconfig
 	@mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic
 	@mkdir -p $(obj)include $(obj)board/xilinx/ml507
 	@echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-ram.lds"\
 		> $(obj)board/xilinx/ml507/config.tmp
 	@echo "TEXT_BASE := 0x04000000"  \
 		>> $(obj)board/xilinx/ml507/config.tmp
 	@$(MKCONFIG) ml507 ppc ppc4xx ml507 xilinx
 neo_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx neo gdsys
 ocotea_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx ocotea amcc
 OCRTC_config		\
 ORSG_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx ocrtc esd
 p3p440_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx p3p440 prodrive
 PCI405_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx pci405 esd
 pcs440ep_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx pcs440ep
 PIP405_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx pip405 mpl
 PLU405_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx plu405 esd
 PMC405_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx pmc405 esd
 PMC440_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx pmc440 esd
 PPChameleonEVB_config		\
 PPChameleonEVB_BA_25_config	\
 PPChameleonEVB_ME_25_config	\
 PPChameleonEVB_HI_25_config	\
 PPChameleonEVB_BA_33_config	\
 PPChameleonEVB_ME_33_config	\
 PPChameleonEVB_HI_33_config:	unconfig
 	@mkdir -p $(obj)include
 	@[ -z "$(findstring EVB_BA,$@)" ] || \
 		{ echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 0" >>$(obj)include/config.h ; \
 		  $(XECHO) "... BASIC model" ; \
 		}
 	@[ -z "$(findstring EVB_ME,$@)" ] || \
 		{ echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 1" >>$(obj)include/config.h ; \
 		  $(XECHO) "... MEDIUM model" ; \
 		}
 	@[ -z "$(findstring EVB_HI,$@)" ] || \
 		{ echo "#define CONFIG_PPCHAMELEON_MODULE_MODEL 2" >>$(obj)include/config.h ; \
 		  $(XECHO) "... HIGH-END model" ; \
 		}
 	@[ -z "$(findstring _25,$@)" ] || \
 		{ echo "#define CONFIG_PPCHAMELEON_CLK_25" >>$(obj)include/config.h ; \
 		  $(XECHO) "SysClk = 25MHz" ; \
 		}
 	@[ -z "$(findstring _33,$@)" ] || \
 		{ echo "#define CONFIG_PPCHAMELEON_CLK_33" >>$(obj)include/config.h ; \
 		  $(XECHO) "SysClk = 33MHz" ; \
 		}
 	@$(MKCONFIG) -a $(call xtract_4xx,$@) ppc ppc4xx PPChameleonEVB dave
 quad100hd_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx quad100hd
 redwood_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx redwood amcc
 sbc405_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx sbc405
 sc3_config:unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx sc3
 sequoia_config \
 rainier_config: unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \
 		tr '[:lower:]' '[:upper:]')" >$(obj)include/config.h
 	@$(MKCONFIG) -n $@ -a sequoia ppc ppc4xx sequoia amcc
 sequoia_nand_config \
 rainier_nand_config: unconfig
 	@mkdir -p $(obj)include $(obj)board/amcc/sequoia
 	@mkdir -p $(obj)nand_spl/board/amcc/sequoia
 	@echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
 	@echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \
 		tr '[:lower:]' '[:upper:]')" >> $(obj)include/config.h
 	@$(MKCONFIG) -n $@ -a sequoia ppc ppc4xx sequoia amcc
 	@echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp
 	@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
+sequoia_ramboot_config \
+rainier_ramboot_config: unconfig
+	@mkdir -p $(obj)include $(obj)board/amcc/sequoia
+	@echo "#define CONFIG_SYS_RAMBOOT" > $(obj)include/config.h
+	@echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \
+		tr '[:lower:]' '[:upper:]')" >> $(obj)include/config.h
+	@$(MKCONFIG) -n $@ -a sequoia ppc ppc4xx sequoia amcc
+	@echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp
+	@echo "LDSCRIPT = board/amcc/sequoia/u-boot-ram.lds" >> \
+		$(obj)board/amcc/sequoia/config.tmp
 taihu_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx taihu amcc
 taishan_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx taishan amcc
 v5fx30teval_config: unconfig
 	@mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic
 	@mkdir -p $(obj)include $(obj)board/avnet/v5fx30teval
 	@echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-ram.lds"\
 		> $(obj)board/avnet/v5fx30teval/config.tmp
 	@echo "TEXT_BASE := 0x03000000" \
 		>> $(obj)board/avnet/v5fx30teval/config.tmp
 	@$(MKCONFIG) v5fx30teval ppc ppc4xx v5fx30teval avnet
 v5fx30teval_flash_config: unconfig
 	@mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic
 	@mkdir -p $(obj)include $(obj)board/avnet/v5fx30teval
 	@echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-rom.lds"\
 		> $(obj)board/avnet/v5fx30teval/config.tmp
 	@echo "TEXT_BASE := 0xFF1C0000" \
 		>> $(obj)board/avnet/v5fx30teval/config.tmp
 	@$(MKCONFIG) v5fx30teval ppc ppc4xx v5fx30teval avnet
 VOH405_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx voh405 esd
 VOM405_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx vom405 esd
 W7OLMC_config	\
 W7OLMG_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx w7o
 # Walnut & Sycamore images are identical (recognized via PVR)
 walnut_config \
 sycamore_config: unconfig
 	@$(MKCONFIG) -n $@ -a walnut ppc ppc4xx walnut amcc
 WUH405_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx wuh405 esd
 xilinx-ppc405-generic_flash_config: unconfig
 	@mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic
 	@echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-rom.lds"\
 		> $(obj)board/xilinx/ppc405-generic/config.tmp
 	@echo "TEXT_BASE := 0xFE360000" \
 		>> $(obj)board/xilinx/ppc405-generic/config.tmp
 	@$(MKCONFIG) xilinx-ppc405-generic ppc ppc4xx ppc405-generic xilinx
 xilinx-ppc405-generic_config: unconfig
 	@mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic
 	@echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-ram.lds"\
 		> $(obj)board/xilinx/ppc405-generic/config.tmp
 	@echo "TEXT_BASE := 0x04000000" \
 		>> $(obj)board/xilinx/ppc405-generic/config.tmp
 	@$(MKCONFIG) xilinx-ppc405-generic ppc ppc4xx ppc405-generic xilinx
 xilinx-ppc440-generic_flash_config: unconfig
 	@mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic
 	@echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-rom.lds"\
 		> $(obj)board/xilinx/ppc440-generic/config.tmp
 	@echo "TEXT_BASE := 0xFE360000" \
 		>> $(obj)board/xilinx/ppc440-generic/config.tmp
 	@$(MKCONFIG) xilinx-ppc440-generic ppc ppc4xx ppc440-generic xilinx
 xilinx-ppc440-generic_config: unconfig
 	@mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic
 	@echo "LDSCRIPT:=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-ram.lds"\
 		> $(obj)board/xilinx/ppc440-generic/config.tmp
 	@echo "TEXT_BASE := 0x04000000" \
 		>> $(obj)board/xilinx/ppc440-generic/config.tmp
 	@$(MKCONFIG) xilinx-ppc440-generic ppc ppc4xx ppc440-generic xilinx
 XPEDITE1K_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx xpedite1k
 yosemite_config \
 yellowstone_config: unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \
 		tr '[:lower:]' '[:upper:]')" >$(obj)include/config.h
 	@$(MKCONFIG) -n $@ -a yosemite ppc ppc4xx yosemite amcc
 yucca_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx yucca amcc
 zeus_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx zeus
 #########################################################################
 ## MPC8220 Systems
 #########################################################################
 Alaska8220_config	\
 Yukon8220_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8220 alaska
 sorcery_config:		unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8220 sorcery
 #########################################################################
 ## MPC824x Systems
 #########################################################################
 xtract_82xx = $(subst _BIGFLASH,,$(subst _ROMBOOT,,$(subst _L2,,$(subst _266MHz,,$(subst _300MHz,,$(subst _config,,$1))))))
 A3000_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc824x a3000
 barco_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc824x barco
 BMW_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc824x bmw
 CPC45_config	\
 CPC45_ROMBOOT_config:	unconfig
 	@$(MKCONFIG) $(call xtract_82xx,$@) ppc mpc824x cpc45
 	@cd $(obj)include ;				\
 	if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
 		echo "CONFIG_BOOT_ROM = y" >> config.mk ; \
 		$(XECHO) "... booting from 8-bit flash" ; \
 	else \
 		echo "CONFIG_BOOT_ROM = n" >> config.mk ; \
 		$(XECHO) "... booting from 64-bit flash" ; \
 	fi; \
 	echo "export CONFIG_BOOT_ROM" >> config.mk;
 CU824_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc824x cu824
 debris_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc824x debris etin
 eXalion_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc824x eXalion
 HIDDEN_DRAGON_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc824x hidden_dragon
 kvme080_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc824x kvme080 etin
 # HDLAN is broken ATM. Should be fixed as soon as hardware is available and as
 # time permits.
 #linkstation_HDLAN_config \
 # Remove this line when HDLAN is fixed
 linkstation_HGLAN_config: unconfig
 	@mkdir -p $(obj)include
 	@case $@ in \
 		*HGLAN*) echo "#define CONFIG_HGLAN 1" >$(obj)include/config.h; ;; \
 		*HDLAN*) echo "#define CONFIG_HLAN 1" >$(obj)include/config.h; ;; \
 	esac
 	@$(MKCONFIG) -n $@ -a linkstation ppc mpc824x linkstation
 MOUSSE_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc824x mousse
 MUSENKI_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc824x musenki
 MVBLUE_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc824x mvblue
 OXC_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc824x oxc
 PN62_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc824x pn62
 Sandpoint8240_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc824x sandpoint
 Sandpoint8245_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc824x sandpoint
 sbc8240_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc824x sbc8240
 SL8245_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc824x sl8245
 utx8245_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc824x utx8245
 #########################################################################
 ## MPC8260 Systems
 #########################################################################
 atc_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8260 atc
 cogent_mpc8260_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8260 cogent
 CPU86_config	\
 CPU86_ROMBOOT_config: unconfig
 	@$(MKCONFIG) $(call xtract_82xx,$@) ppc mpc8260 cpu86
 	@cd $(obj)include ;				\
 	if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
 		echo "CONFIG_BOOT_ROM = y" >> config.mk ; \
 		$(XECHO) "... booting from 8-bit flash" ; \
 	else \
 		echo "CONFIG_BOOT_ROM = n" >> config.mk ; \
 		$(XECHO) "... booting from 64-bit flash" ; \
 	fi; \
 	echo "export CONFIG_BOOT_ROM" >> config.mk;
 CPU87_config	\
 CPU87_ROMBOOT_config: unconfig
 	@$(MKCONFIG) $(call xtract_82xx,$@) ppc mpc8260 cpu87
 	@cd $(obj)include ;				\
 	if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
 		echo "CONFIG_BOOT_ROM = y" >> config.mk ; \
 		$(XECHO) "... booting from 8-bit flash" ; \
 	else \
 		echo "CONFIG_BOOT_ROM = n" >> config.mk ; \
 		$(XECHO) "... booting from 64-bit flash" ; \
 	fi; \
 	echo "export CONFIG_BOOT_ROM" >> config.mk;
 ep8248_config	\
 ep8248E_config	:	unconfig
 	@$(MKCONFIG) ep8248 ppc mpc8260 ep8248
 ep8260_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8260 ep8260
 ep82xxm_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8260 ep82xxm
 gw8260_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8260 gw8260
 hymod_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8260 hymod
 IDS8247_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8260 ids8247
 IPHASE4539_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8260 iphase4539
 ISPAN_config		\
 ISPAN_REVB_config:	unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring _REVB_,$@)" ] ; then \
 		echo "#define CONFIG_SYS_REV_B" > $(obj)include/config.h ; \
 	fi
 	@$(MKCONFIG) -a ISPAN ppc mpc8260 ispan
 mgcoge_config	:	unconfig
 	@$(MKCONFIG) mgcoge ppc mpc8260 mgcoge keymile
 MPC8260ADS_config	\
 MPC8260ADS_lowboot_config	\
 MPC8260ADS_33MHz_config	\
 MPC8260ADS_33MHz_lowboot_config	\
 MPC8260ADS_40MHz_config	\
 MPC8260ADS_40MHz_lowboot_config	\
 MPC8272ADS_config	\
 MPC8272ADS_lowboot_config	\
 PQ2FADS_config		\
 PQ2FADS_lowboot_config		\
 PQ2FADS-VR_config	\
 PQ2FADS-VR_lowboot_config	\
 PQ2FADS-ZU_config	\
 PQ2FADS-ZU_lowboot_config	\
 PQ2FADS-ZU_66MHz_config	\
 PQ2FADS-ZU_66MHz_lowboot_config	\
 	:		unconfig
 	@mkdir -p $(obj)include
 	@mkdir -p $(obj)board/freescale/mpc8260ads
 	$(if $(findstring PQ2FADS,$@), \
 	@echo "#define CONFIG_ADSTYPE CONFIG_SYS_PQ2FADS" > $(obj)include/config.h, \
 	@echo "#define CONFIG_ADSTYPE CONFIG_SYS_"$(subst MPC,,$(word 1,$(subst _, ,$@))) > $(obj)include/config.h)
 	$(if $(findstring MHz,$@), \
 	@echo "#define CONFIG_8260_CLKIN" $(subst MHz,,$(word 2,$(subst _, ,$@)))"000000" >> $(obj)include/config.h, \
 	$(if $(findstring VR,$@), \
 	@echo "#define CONFIG_8260_CLKIN 66000000" >> $(obj)include/config.h))
 	@[ -z "$(findstring lowboot_,$@)" ] || \
 		{ echo "TEXT_BASE = 0xFF800000" >$(obj)board/freescale/mpc8260ads/config.tmp ; \
 		  $(XECHO) "... with lowboot configuration" ; \
 		}
 	@$(MKCONFIG) -a MPC8260ADS ppc mpc8260 mpc8260ads freescale
 MPC8266ADS_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8260 mpc8266ads freescale
 muas3001_dev_config \
 muas3001_config	:	unconfig
 	@mkdir -p $(obj)include
 	@mkdir -p $(obj)board/muas3001
 	@if [ "$(findstring dev,$@)" ] ; then \
 		echo "#define CONFIG_MUAS_DEV_BOARD" > $(obj)include/config.h ; \
 	fi
 	@$(MKCONFIG) -a muas3001 ppc mpc8260 muas3001
 # PM825/PM826 default configuration:  small (= 8 MB) Flash / boot from 64-bit flash
 PM825_config	\
 PM825_ROMBOOT_config	\
 PM825_BIGFLASH_config	\
 PM825_ROMBOOT_BIGFLASH_config	\
 PM826_config	\
 PM826_ROMBOOT_config	\
 PM826_BIGFLASH_config	\
 PM826_ROMBOOT_BIGFLASH_config:	unconfig
 	@mkdir -p $(obj)include
 	@mkdir -p $(obj)board/pm826
 	@if [ "$(findstring PM825_,$@)" ] ; then \
 		echo "#define CONFIG_PCI"	>$(obj)include/config.h ; \
 	else \
 		>$(obj)include/config.h ; \
 	fi
 	@if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
 		$(XECHO) "... booting from 8-bit flash" ; \
 		echo "#define CONFIG_BOOT_ROM" >>$(obj)include/config.h ; \
 		echo "TEXT_BASE = 0xFF800000" >$(obj)board/pm826/config.tmp ; \
 		if [ "$(findstring _BIGFLASH_,$@)" ] ; then \
 			$(XECHO) "... with 32 MB Flash" ; \
 			echo "#define CONFIG_FLASH_32MB" >>$(obj)include/config.h ; \
 		fi; \
 	else \
 		$(XECHO) "... booting from 64-bit flash" ; \
 		if [ "$(findstring _BIGFLASH_,$@)" ] ; then \
 			$(XECHO) "... with 32 MB Flash" ; \
 			echo "#define CONFIG_FLASH_32MB" >>$(obj)include/config.h ; \
 			echo "TEXT_BASE = 0x40000000" >$(obj)board/pm826/config.tmp ; \
 		else \
 			echo "TEXT_BASE = 0xFF000000" >$(obj)board/pm826/config.tmp ; \
 		fi; \
 	fi
 	@$(MKCONFIG) -a PM826 ppc mpc8260 pm826
 PM828_config	\
 PM828_PCI_config	\
 PM828_ROMBOOT_config	\
 PM828_ROMBOOT_PCI_config:	unconfig
 	@mkdir -p $(obj)include
 	@mkdir -p $(obj)board/pm826
 	@if [ "$(findstring _PCI_,$@)" ] ; then \
 		echo "#define CONFIG_PCI"  >>$(obj)include/config.h ; \
 		$(XECHO) "... with PCI enabled" ; \
 	fi
 	@if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
 		$(XECHO) "... booting from 8-bit flash" ; \
 		echo "#define CONFIG_BOOT_ROM" >>$(obj)include/config.h ; \
 		echo "TEXT_BASE = 0xFF800000" >$(obj)board/pm826/config.tmp ; \
 	fi
 	@$(MKCONFIG) -a PM828 ppc mpc8260 pm828
 ppmc8260_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8260 ppmc8260
 Rattler8248_config	\
 Rattler_config:		unconfig
 	@mkdir -p $(obj)include
 	$(if $(findstring 8248,$@), \
 	@echo "#define CONFIG_MPC8248" > $(obj)include/config.h)
 	@$(MKCONFIG) -a Rattler ppc mpc8260 rattler
 RPXsuper_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8260 rpxsuper
 rsdproto_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8260 rsdproto
 sacsng_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8260 sacsng
 sbc8260_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8260 sbc8260
 SCM_config:		unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8260 SCM siemens
 TQM8255_AA_config \
 TQM8260_AA_config \
 TQM8260_AB_config \
 TQM8260_AC_config \
 TQM8260_AD_config \
 TQM8260_AE_config \
 TQM8260_AF_config \
 TQM8260_AG_config \
 TQM8260_AH_config \
 TQM8260_AI_config \
 TQM8265_AA_config:  unconfig
 	@mkdir -p $(obj)include
 	@case "$@" in \
 	TQM8255_AA_config) CTYPE=MPC8255; CFREQ=300; CACHE=no;	BMODE=8260;;  \
 	TQM8260_AA_config) CTYPE=MPC8260; CFREQ=200; CACHE=no;	BMODE=8260;; \
 	TQM8260_AB_config) CTYPE=MPC8260; CFREQ=200; CACHE=yes;	BMODE=60x;;  \
 	TQM8260_AC_config) CTYPE=MPC8260; CFREQ=200; CACHE=yes;	BMODE=60x;;  \
 	TQM8260_AD_config) CTYPE=MPC8260; CFREQ=300; CACHE=no;	BMODE=60x;;  \
 	TQM8260_AE_config) CTYPE=MPC8260; CFREQ=266; CACHE=no;	BMODE=8260;; \
 	TQM8260_AF_config) CTYPE=MPC8260; CFREQ=300; CACHE=no;	BMODE=60x;;  \
 	TQM8260_AG_config) CTYPE=MPC8260; CFREQ=300; CACHE=no;	BMODE=8260;; \
 	TQM8260_AH_config) CTYPE=MPC8260; CFREQ=300; CACHE=yes;	BMODE=60x;;  \
 	TQM8260_AI_config) CTYPE=MPC8260; CFREQ=300; CACHE=no;	BMODE=60x;;  \
 	TQM8265_AA_config) CTYPE=MPC8265; CFREQ=300; CACHE=no;	BMODE=60x;;  \
 	esac; \
 	if [ "$${CTYPE}" != "MPC8260" ] ; then \
 		echo "#define CONFIG_$${CTYPE}"	>>$(obj)include/config.h ; \
 	fi; \
 	echo "#define CONFIG_$${CFREQ}MHz"	>>$(obj)include/config.h ; \
 	echo "... with $${CFREQ}MHz system clock" ; \
 	if [ "$${CACHE}" = "yes" ] ; then \
 		echo "#define CONFIG_L2_CACHE"	>>$(obj)include/config.h ; \
 		$(XECHO) "... with L2 Cache support" ; \
 	else \
 		echo "#undef CONFIG_L2_CACHE"	>>$(obj)include/config.h ; \
 		$(XECHO) "... without L2 Cache support" ; \
 	fi; \
 	if [ "$${BMODE}" = "60x" ] ; then \
 		echo "#define CONFIG_BUSMODE_60x" >>$(obj)include/config.h ; \
 		$(XECHO) "... with 60x Bus Mode" ; \
 	else \
 		echo "#undef CONFIG_BUSMODE_60x"  >>$(obj)include/config.h ; \
 		$(XECHO) "... without 60x Bus Mode" ; \
 	fi
 	@$(MKCONFIG) -a TQM8260 ppc mpc8260 tqm8260 tqc
 TQM8272_config: unconfig
 	@$(MKCONFIG) TQM8272 ppc mpc8260 tqm8272 tqc
 VoVPN-GW_66MHz_config	\
 VoVPN-GW_100MHz_config:		unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_CLKIN_$(word 2,$(subst _, ,$@))" > $(obj)include/config.h
 	@$(MKCONFIG) -a VoVPN-GW ppc mpc8260 vovpn-gw funkwerk
 ZPC1900_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc8260 zpc1900
 #########################################################################
 ## Coldfire
 #########################################################################
 M52277EVB_config \
 M52277EVB_spansion_config \
 M52277EVB_stmicro_config :	unconfig
 	@case "$@" in \
 	M52277EVB_config)		FLASH=SPANSION;; \
 	M52277EVB_spansion_config)	FLASH=SPANSION;; \
 	M52277EVB_stmicro_config)	FLASH=STMICRO;; \
 	esac; \
 	if [ "$${FLASH}" = "SPANSION" ] ; then \
 		echo "#define CONFIG_SYS_SPANSION_BOOT"	>> $(obj)include/config.h ; \
 		echo "TEXT_BASE = 0x00000000" > $(obj)board/freescale/m52277evb/config.tmp ; \
 		cp $(obj)board/freescale/m52277evb/u-boot.spa $(obj)board/freescale/m52277evb/u-boot.lds ; \
 		$(XECHO) "... with SPANSION boot..." ; \
 	fi; \
 	if [ "$${FLASH}" = "STMICRO" ] ; then \
 		echo "#define CONFIG_CF_SBF"	>> $(obj)include/config.h ; \
 		echo "#define CONFIG_SYS_STMICRO_BOOT"	>> $(obj)include/config.h ; \
 		echo "TEXT_BASE = 0x43E00000" > $(obj)board/freescale/m52277evb/config.tmp ; \
 		cp $(obj)board/freescale/m52277evb/u-boot.stm $(obj)board/freescale/m52277evb/u-boot.lds ; \
 		$(XECHO) "... with ST Micro boot..." ; \
 	fi
 	@$(MKCONFIG) -a M52277EVB m68k mcf5227x m52277evb freescale
 M5235EVB_config \
 M5235EVB_Flash16_config \
 M5235EVB_Flash32_config:	unconfig
 	@case "$@" in \
 	M5235EVB_config)		FLASH=16;; \
 	M5235EVB_Flash16_config)	FLASH=16;; \
 	M5235EVB_Flash32_config)	FLASH=32;; \
 	esac; \
 	if [ "$${FLASH}" != "16" ] ; then \
 		echo "#define NORFLASH_PS32BIT	1" >> $(obj)include/config.h ; \
 		echo "TEXT_BASE = 0xFFC00000" > $(obj)board/freescale/m5235evb/config.tmp ; \
 		cp $(obj)board/freescale/m5235evb/u-boot.32 $(obj)board/freescale/m5235evb/u-boot.lds ; \
 	else \
 		echo "TEXT_BASE = 0xFFE00000" > $(obj)board/freescale/m5235evb/config.tmp ; \
 		cp $(obj)board/freescale/m5235evb/u-boot.16 $(obj)board/freescale/m5235evb/u-boot.lds ; \
 	fi
 	@$(MKCONFIG) -a M5235EVB m68k mcf523x m5235evb freescale
 M5249EVB_config :		unconfig
 	@$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5249evb freescale
 M5253DEMO_config :		unconfig
 	@$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5253demo freescale
 M5253EVBE_config :		unconfig
 	@$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5253evbe freescale
 cobra5272_config :		unconfig
 	@$(MKCONFIG) $(@:_config=) m68k mcf52x2 cobra5272
 EB+MCF-EV123_config :		unconfig
 	@mkdir -p $(obj)include
 	@mkdir -p $(obj)board/BuS/EB+MCF-EV123
 	@echo "TEXT_BASE = 0xFFE00000"|tee $(obj)board/BuS/EB+MCF-EV123/textbase.mk
 	@$(MKCONFIG) EB+MCF-EV123 m68k mcf52x2 EB+MCF-EV123 BuS
 EB+MCF-EV123_internal_config :	unconfig
 	@mkdir -p $(obj)include
 	@mkdir -p $(obj)board/BuS/EB+MCF-EV123
 	@echo "TEXT_BASE = 0xF0000000"|tee $(obj)board/BuS/EB+MCF-EV123/textbase.mk
 	@$(MKCONFIG) EB+MCF-EV123 m68k mcf52x2 EB+MCF-EV123 BuS
 idmr_config :			unconfig
 	@$(MKCONFIG) $(@:_config=) m68k mcf52x2 idmr
 M5271EVB_config :		unconfig
 	@$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5271evb freescale
 M5272C3_config :		unconfig
 	@$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5272c3 freescale
 M5275EVB_config :		unconfig
 	@$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5275evb freescale
 M5282EVB_config :		unconfig
 	@$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5282evb freescale
 M53017EVB_config :		unconfig
 	@$(MKCONFIG) $(@:_config=) m68k mcf532x m53017evb freescale
 M5329AFEE_config \
 M5329BFEE_config :	unconfig
 	@case "$@" in \
 	M5329AFEE_config)	NAND=0;; \
 	M5329BFEE_config)	NAND=16;; \
 	esac; \
 	if [ "$${NAND}" != "0" ] ; then \
 		echo "#define NANDFLASH_SIZE	$${NAND}" > $(obj)include/config.h ; \
 	fi
 	@$(MKCONFIG) -a M5329EVB m68k mcf532x m5329evb freescale
 M5373EVB_config :	unconfig
 	@case "$@" in \
 	M5373EVB_config)	NAND=16;; \
 	esac; \
 	if [ "$${NAND}" != "0" ] ; then \
 		echo "#define NANDFLASH_SIZE	$${NAND}" > $(obj)include/config.h ; \
 	fi
 	@$(MKCONFIG) -a M5373EVB m68k mcf532x m5373evb freescale
 M54451EVB_config \
 M54451EVB_spansion_config \
 M54451EVB_stmicro_config :	unconfig
 	@case "$@" in \
 	M54451EVB_config)		FLASH=SPANSION;; \
 	M54451EVB_spansion_config)	FLASH=SPANSION;; \
 	M54451EVB_stmicro_config)	FLASH=STMICRO;; \
 	esac; \
 	if [ "$${FLASH}" = "SPANSION" ] ; then \
 		echo "#define CONFIG_SYS_SPANSION_BOOT"	>> $(obj)include/config.h ; \
 		echo "TEXT_BASE = 0x00000000" > $(obj)board/freescale/m54451evb/config.tmp ; \
 		cp $(obj)board/freescale/m54451evb/u-boot.spa $(obj)board/freescale/m54451evb/u-boot.lds ; \
 		$(XECHO) "... with SPANSION boot..." ; \
 	fi; \
 	if [ "$${FLASH}" = "STMICRO" ] ; then \
 		echo "#define CONFIG_CF_SBF"	>> $(obj)include/config.h ; \
 		echo "#define CONFIG_SYS_STMICRO_BOOT"	>> $(obj)include/config.h ; \
 		echo "TEXT_BASE = 0x47E00000" > $(obj)board/freescale/m54451evb/config.tmp ; \
 		cp $(obj)board/freescale/m54451evb/u-boot.stm $(obj)board/freescale/m54451evb/u-boot.lds ; \
 		$(XECHO) "... with ST Micro boot..." ; \
 	fi; \
 	echo "#define CONFIG_SYS_INPUT_CLKSRC 24000000" >> $(obj)include/config.h ;
 	@$(MKCONFIG) -a M54451EVB m68k mcf5445x m54451evb freescale
 M54455EVB_config \
 M54455EVB_atmel_config \
 M54455EVB_intel_config \
 M54455EVB_a33_config \
 M54455EVB_a66_config \
 M54455EVB_i33_config \
 M54455EVB_i66_config \
 M54455EVB_stm33_config :	unconfig
 	@case "$@" in \
 	M54455EVB_config)		FLASH=ATMEL; FREQ=33333333;; \
 	M54455EVB_atmel_config)		FLASH=ATMEL; FREQ=33333333;; \
 	M54455EVB_intel_config)		FLASH=INTEL; FREQ=33333333;; \
 	M54455EVB_a33_config)		FLASH=ATMEL; FREQ=33333333;; \
 	M54455EVB_a66_config)		FLASH=ATMEL; FREQ=66666666;; \
 	M54455EVB_i33_config)		FLASH=INTEL; FREQ=33333333;; \
 	M54455EVB_i66_config)		FLASH=INTEL; FREQ=66666666;; \
 	M54455EVB_stm33_config)		FLASH=STMICRO; FREQ=33333333;; \
 	esac; \
 	if [ "$${FLASH}" = "INTEL" ] ; then \
 		echo "#define CONFIG_SYS_INTEL_BOOT" >> $(obj)include/config.h ; \
 		echo "TEXT_BASE = 0x00000000" > $(obj)board/freescale/m54455evb/config.tmp ; \
 		cp $(obj)board/freescale/m54455evb/u-boot.int $(obj)board/freescale/m54455evb/u-boot.lds ; \
 		$(XECHO) "... with INTEL boot..." ; \
 	fi; \
 	if [ "$${FLASH}" = "ATMEL" ] ; then \
 		echo "#define CONFIG_SYS_ATMEL_BOOT"	>> $(obj)include/config.h ; \
 		echo "TEXT_BASE = 0x04000000" > $(obj)board/freescale/m54455evb/config.tmp ; \
 		cp $(obj)board/freescale/m54455evb/u-boot.atm $(obj)board/freescale/m54455evb/u-boot.lds ; \
 		$(XECHO) "... with ATMEL boot..." ; \
 	fi; \
 	if [ "$${FLASH}" = "STMICRO" ] ; then \
 		echo "#define CONFIG_CF_SBF"	>> $(obj)include/config.h ; \
 		echo "#define CONFIG_SYS_STMICRO_BOOT"	>> $(obj)include/config.h ; \
 		echo "TEXT_BASE = 0x4FE00000" > $(obj)board/freescale/m54455evb/config.tmp ; \
 		cp $(obj)board/freescale/m54455evb/u-boot.stm $(obj)board/freescale/m54455evb/u-boot.lds ; \
 		$(XECHO) "... with ST Micro boot..." ; \
 	fi; \
 	echo "#define CONFIG_SYS_INPUT_CLKSRC $${FREQ}" >> $(obj)include/config.h ; \
 	$(XECHO) "... with $${FREQ}Hz input clock"
 	@$(MKCONFIG) -a M54455EVB m68k mcf5445x m54455evb freescale
 M5475AFE_config \
 M5475BFE_config \
 M5475CFE_config \
 M5475DFE_config \
 M5475EFE_config \
 M5475FFE_config \
 M5475GFE_config :	unconfig
 	@case "$@" in \
 	M5475AFE_config)	BOOT=2;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \
 	M5475BFE_config)	BOOT=2;CODE=16;VID=0;USB=0;RAM=64;RAM1=0;; \
 	M5475CFE_config)	BOOT=2;CODE=16;VID=1;USB=1;RAM=64;RAM1=0;; \
 	M5475DFE_config)	BOOT=2;CODE=0;VID=0;USB=1;RAM=64;RAM1=0;; \
 	M5475EFE_config)	BOOT=2;CODE=0;VID=1;USB=1;RAM=64;RAM1=0;; \
 	M5475FFE_config)	BOOT=2;CODE=32;VID=1;USB=1;RAM=64;RAM1=64;; \
 	M5475GFE_config)	BOOT=4;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \
 	esac; \
 	echo "#define CONFIG_SYS_BUSCLK	133333333" > $(obj)include/config.h ; \
 	echo "#define CONFIG_SYS_BOOTSZ	$${BOOT}" >> $(obj)include/config.h ; \
 	echo "#define CONFIG_SYS_DRAMSZ	$${RAM}" >> $(obj)include/config.h ; \
 	if [ "$${RAM1}" != "0" ] ; then \
 		echo "#define CONFIG_SYS_DRAMSZ1	$${RAM1}" >> $(obj)include/config.h ; \
 	fi; \
 	if [ "$${CODE}" != "0" ] ; then \
 		echo "#define CONFIG_SYS_NOR1SZ	$${CODE}" >> $(obj)include/config.h ; \
 	fi; \
 	if [ "$${VID}" == "1" ] ; then \
 		echo "#define CONFIG_SYS_VIDEO" >> $(obj)include/config.h ; \
 	fi; \
 	if [ "$${USB}" == "1" ] ; then \
 		echo "#define CONFIG_SYS_USBCTRL" >> $(obj)include/config.h ; \
 	fi
 	@$(MKCONFIG) -a M5475EVB m68k mcf547x_8x m547xevb freescale
 M5485AFE_config \
 M5485BFE_config \
 M5485CFE_config \
 M5485DFE_config \
 M5485EFE_config \
 M5485FFE_config \
 M5485GFE_config \
 M5485HFE_config :	unconfig
 	@case "$@" in \
 	M5485AFE_config)	BOOT=2;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \
 	M5485BFE_config)	BOOT=2;CODE=16;VID=0;USB=0;RAM=64;RAM1=0;; \
 	M5485CFE_config)	BOOT=2;CODE=16;VID=1;USB=1;RAM=64;RAM1=0;; \
 	M5485DFE_config)	BOOT=2;CODE=0;VID=0;USB=1;RAM=64;RAM1=0;; \
 	M5485EFE_config)	BOOT=2;CODE=0;VID=1;USB=1;RAM=64;RAM1=0;; \
 	M5485FFE_config)	BOOT=2;CODE=32;VID=1;USB=1;RAM=64;RAM1=64;; \
 	M5485GFE_config)	BOOT=4;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \
 	M5485HFE_config)	BOOT=2;CODE=16;VID=1;USB=0;RAM=64;RAM1=0;; \
 	esac; \
 	echo "#define CONFIG_SYS_BUSCLK	100000000" > $(obj)include/config.h ; \
 	echo "#define CONFIG_SYS_BOOTSZ	$${BOOT}" >> $(obj)include/config.h ; \
 	echo "#define CONFIG_SYS_DRAMSZ	$${RAM}" >> $(obj)include/config.h ; \
 	if [ "$${RAM1}" != "0" ] ; then \
 		echo "#define CONFIG_SYS_DRAMSZ1	$${RAM1}" >> $(obj)include/config.h ; \
 	fi; \
 	if [ "$${CODE}" != "0" ] ; then \
 		echo "#define CONFIG_SYS_NOR1SZ	$${CODE}" >> $(obj)include/config.h ; \
 	fi; \
 	if [ "$${VID}" == "1" ] ; then \
 		echo "#define CONFIG_SYS_VIDEO" >> $(obj)include/config.h ; \
 	fi; \
 	if [ "$${USB}" == "1" ] ; then \
 		echo "#define CONFIG_SYS_USBCTRL" >> $(obj)include/config.h ; \
 	fi
 	@$(MKCONFIG) -a M5485EVB m68k mcf547x_8x m548xevb freescale
 TASREG_config :		unconfig
 	@$(MKCONFIG) $(@:_config=) m68k mcf52x2 tasreg esd
 #########################################################################
 ## MPC83xx Systems
 #########################################################################
 kmeter1_config: unconfig
 	@$(MKCONFIG) kmeter1 ppc mpc83xx kmeter1 keymile
 MPC8313ERDB_33_config \
 MPC8313ERDB_66_config \
 MPC8313ERDB_NAND_33_config \
 MPC8313ERDB_NAND_66_config: unconfig
 	@mkdir -p $(obj)include
 	@mkdir -p $(obj)board/freescale/mpc8313erdb
 	@if [ "$(findstring _33_,$@)" ] ; then \
 		$(XECHO) -n "...33M ..." ; \
 		echo "#define CONFIG_SYS_33MHZ" >>$(obj)include/config.h ; \
 	fi ; \
 	if [ "$(findstring _66_,$@)" ] ; then \
 		$(XECHO) -n "...66M..." ; \
 		echo "#define CONFIG_SYS_66MHZ" >>$(obj)include/config.h ; \
 	fi ; \
 	if [ "$(findstring _NAND_,$@)" ] ; then \
 		$(XECHO) -n "...NAND..." ; \
 		echo "TEXT_BASE = 0x00100000" > $(obj)board/freescale/mpc8313erdb/config.tmp ; \
 		echo "#define CONFIG_NAND_U_BOOT" >>$(obj)include/config.h ; \
 	fi ;
 	@$(MKCONFIG) -a MPC8313ERDB ppc mpc83xx mpc8313erdb freescale
 	@if [ "$(findstring _NAND_,$@)" ] ; then \
 		echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk ; \
 	fi ;
 MPC8315ERDB_config: unconfig
 	@$(MKCONFIG) -a MPC8315ERDB ppc mpc83xx mpc8315erdb freescale
 MPC8323ERDB_config:	unconfig
 	@$(MKCONFIG) -a MPC8323ERDB ppc mpc83xx mpc8323erdb freescale
 MPC832XEMDS_config \
 MPC832XEMDS_HOST_33_config \
 MPC832XEMDS_HOST_66_config \
 MPC832XEMDS_SLAVE_config \
 MPC832XEMDS_ATM_config:	unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring _HOST_,$@)" ] ; then \
 		$(XECHO) -n "... PCI HOST " ; \
 		echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
 	fi ; \
 	if [ "$(findstring _SLAVE_,$@)" ] ; then \
 		$(XECHO) "...PCI SLAVE 66M"  ; \
 		echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
 		echo "#define CONFIG_PCISLAVE" >>$(obj)include/config.h ; \
 	fi ; \
 	if [ "$(findstring _33_,$@)" ] ; then \
 		$(XECHO) -n "...33M ..." ; \
 		echo "#define PCI_33M" >>$(obj)include/config.h ; \
 		echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
 	fi ; \
 	if [ "$(findstring _66_,$@)" ] ; then \
 		$(XECHO) -n "...66M..." ; \
 		echo "#define PCI_66M" >>$(obj)include/config.h ; \
 		echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
 	fi ; \
 	if [ "$(findstring _ATM_,$@)" ] ; then \
 		$(XECHO) -n "...ATM..." ; \
 		echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
 		echo "#define CONFIG_PQ_MDS_PIB_ATM	1" >>$(obj)include/config.h ; \
 	fi ;
 	@$(MKCONFIG) -a MPC832XEMDS ppc mpc83xx mpc832xemds freescale
 MPC8349EMDS_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc83xx mpc8349emds freescale
 MPC8349ITX_config \
 MPC8349ITX_LOWBOOT_config \
 MPC8349ITXGP_config:	unconfig
 	@mkdir -p $(obj)include
 	@mkdir -p $(obj)board/freescale/mpc8349itx
 	@echo "#define CONFIG_$(subst _LOWBOOT,,$(@:_config=))" >> $(obj)include/config.h
 	@if [ "$(findstring GP,$@)" ] ; then \
 		echo "TEXT_BASE = 0xFE000000" >$(obj)board/freescale/mpc8349itx/config.tmp ; \
 	fi
 	@if [ "$(findstring LOWBOOT,$@)" ] ; then \
 		echo "TEXT_BASE = 0xFE000000" >$(obj)board/freescale/mpc8349itx/config.tmp ; \
 	fi
 	@$(MKCONFIG) -a -n $(@:_config=) MPC8349ITX ppc mpc83xx mpc8349itx freescale
 MPC8360EMDS_config \
 MPC8360EMDS_HOST_33_config \
 MPC8360EMDS_HOST_66_config \
 MPC8360EMDS_SLAVE_config \
 MPC8360EMDS_ATM_config: unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring _HOST_,$@)" ] ; then \
 		$(XECHO) -n "... PCI HOST " ; \
 		echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
 	fi ; \
 	if [ "$(findstring _SLAVE_,$@)" ] ; then \
 		$(XECHO) "...PCI SLAVE 66M"  ; \
 		echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
 		echo "#define CONFIG_PCISLAVE" >>$(obj)include/config.h ; \
 	fi ; \
 	if [ "$(findstring _33_,$@)" ] ; then \
 		$(XECHO) -n "...33M ..." ; \
 		echo "#define PCI_33M" >>$(obj)include/config.h ; \
 		echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
 	fi ; \
 	if [ "$(findstring _66_,$@)" ] ; then \
 		$(XECHO) -n "...66M..." ; \
 		echo "#define PCI_66M" >>$(obj)include/config.h ; \
 		echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
 	fi ; \
 	if [ "$(findstring _ATM_,$@)" ] ; then \
 		$(XECHO) -n "...ATM..." ; \
 		echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
 		echo "#define CONFIG_PQ_MDS_PIB_ATM	1" >>$(obj)include/config.h ; \
 	fi ;
 	@$(MKCONFIG) -a MPC8360EMDS ppc mpc83xx mpc8360emds freescale
 MPC8360ERDK_33_config \
 MPC8360ERDK_66_config \
 MPC8360ERDK_config:	unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring _33_,$@)" ] ; then \
 		$(XECHO) -n "... CLKIN 33MHz " ; \
 		echo "#define CONFIG_CLKIN_33MHZ" >>$(obj)include/config.h ;\
 	fi ;
 	@$(MKCONFIG) -a MPC8360ERDK ppc mpc83xx mpc8360erdk freescale
 MPC837XEMDS_config \
 MPC837XEMDS_HOST_config:	unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring _HOST_,$@)" ] ; then \
 		$(XECHO) -n "... PCI HOST " ; \
 		echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
 	fi ;
 	@$(MKCONFIG) -a MPC837XEMDS ppc mpc83xx mpc837xemds freescale
 MPC837XERDB_config:	unconfig
 	@$(MKCONFIG) -a MPC837XERDB ppc mpc83xx mpc837xerdb freescale
 MVBLM7_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc83xx mvblm7 matrix_vision
 sbc8349_config:		unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc83xx sbc8349
 SIMPC8313_LP_config \
 SIMPC8313_SP_config: unconfig
 	@mkdir -p $(obj)include
 	@mkdir -p $(obj)board/sheldon/simpc8313
 	@if [ "$(findstring _LP_,$@)" ] ; then \
 		$(XECHO) -n "...Large Page NAND..." ; \
 		echo "#define CONFIG_NAND_LP" >> $(obj)include/config.h ; \
 	fi ; \
 	if [ "$(findstring _SP_,$@)" ] ; then \
 		$(XECHO) -n "...Small Page NAND..." ; \
 		echo "#define CONFIG_NAND_SP" >> $(obj)include/config.h ; \
 	fi ;
 	@$(MKCONFIG) -a SIMPC8313 ppc mpc83xx simpc8313 sheldon
 	@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
 TQM834x_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc83xx tqm834x tqc
 #########################################################################
 ## MPC85xx Systems
 #########################################################################
 ATUM8548_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc85xx atum8548
 MPC8536DS_config:       unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8536ds freescale
 MPC8540ADS_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8540ads freescale
 MPC8540EVAL_config \
 MPC8540EVAL_33_config \
 MPC8540EVAL_66_config \
 MPC8540EVAL_33_slave_config \
 MPC8540EVAL_66_slave_config:	  unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring _33_,$@)" ] ; then \
 		$(XECHO) "... 33 MHz PCI" ; \
 	else \
 		echo "#define CONFIG_SYSCLK_66M" >>$(obj)include/config.h ; \
 		$(XECHO) "... 66 MHz PCI" ; \
 	fi ; \
 	if [ "$(findstring _slave_,$@)" ] ; then \
 		echo "#define CONFIG_PCI_SLAVE" >>$(obj)include/config.h ; \
 		$(XECHO) " slave" ; \
 	else \
 		$(XECHO) " host" ; \
 	fi
 	@$(MKCONFIG) -a MPC8540EVAL ppc mpc85xx mpc8540eval
 MPC8560ADS_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8560ads freescale
 MPC8541CDS_legacy_config \
 MPC8541CDS_config:	unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring _legacy_,$@)" ] ; then \
 		echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \
 		$(XECHO) "... legacy" ; \
 	fi
 	@$(MKCONFIG) -a MPC8541CDS ppc mpc85xx mpc8541cds freescale
 MPC8544DS_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8544ds freescale
 MPC8548CDS_legacy_config \
 MPC8548CDS_config:	unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring _legacy_,$@)" ] ; then \
 		echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \
 		$(XECHO) "... legacy" ; \
 	fi
 	@$(MKCONFIG) -a MPC8548CDS ppc mpc85xx mpc8548cds freescale
 MPC8555CDS_legacy_config \
 MPC8555CDS_config:	unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring _legacy_,$@)" ] ; then \
 		echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \
 		$(XECHO) "... legacy" ; \
 	fi
 	@$(MKCONFIG) -a MPC8555CDS ppc mpc85xx mpc8555cds freescale
 MPC8568MDS_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8568mds freescale
 MPC8569MDS_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8569mds freescale
 MPC8572DS_36BIT_config \
 MPC8572DS_config:       unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring _36BIT_,$@)" ] ; then \
 		echo "#define CONFIG_PHYS_64BIT" >>$(obj)include/config.h ; \
 		$(XECHO) "... enabling 36-bit physical addressing." ; \
 	fi
 	@$(MKCONFIG) -a MPC8572DS ppc mpc85xx mpc8572ds freescale
 PM854_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc85xx pm854
 PM856_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc85xx pm856
 sbc8540_config \
 sbc8540_33_config \
 sbc8540_66_config:	unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring _66_,$@)" ] ; then \
 		echo "#define CONFIG_PCI_66"	>>$(obj)include/config.h ; \
 		$(XECHO) "... 66 MHz PCI" ; \
 	else \
 		$(XECHO) "... 33 MHz PCI" ; \
 	fi
 	@$(MKCONFIG) -a SBC8540 ppc mpc85xx sbc8560
 sbc8548_config:		unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc85xx sbc8548
 sbc8560_config \
 sbc8560_33_config \
 sbc8560_66_config:	unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring _66_,$@)" ] ; then \
 		echo "#define CONFIG_PCI_66"	>>$(obj)include/config.h ; \
 		$(XECHO) "... 66 MHz PCI" ; \
 	else \
 		$(XECHO) "... 33 MHz PCI" ; \
 	fi
 	@$(MKCONFIG) -a sbc8560 ppc mpc85xx sbc8560
 socrates_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc85xx socrates
 stxgp3_config:		unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc85xx stxgp3
 stxssa_config		\
 stxssa_4M_config:	unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring _4M_,$@)" ] ; then \
 		echo "#define CONFIG_STXSSA_4M" >>$(obj)include/config.h ; \
 		$(XECHO) "... with 4 MiB flash memory" ; \
 	fi
 	@$(MKCONFIG) -a stxssa ppc mpc85xx stxssa
 TQM8540_config		\
 TQM8541_config		\
 TQM8548_config		\
 TQM8548_AG_config	\
 TQM8548_BE_config	\
 TQM8555_config		\
 TQM8560_config:		unconfig
 	@mkdir -p $(obj)include
 	@BTYPE=$(@:_config=); \
 	CTYPE=$(subst TQM,,$(subst _AG,,$(subst _BE,,$(@:_config=)))); \
 	$(XECHO) "... "$${BTYPE}" (MPC"$${CTYPE}")"; \
 	echo "#define CONFIG_MPC$${CTYPE}">>$(obj)include/config.h; \
 	echo "#define CONFIG_$${BTYPE}">>$(obj)include/config.h; \
 	echo "#define CONFIG_HOSTNAME tqm$${CTYPE}">>$(obj)include/config.h; \
 	echo "#define CONFIG_BOARDNAME \"$${BTYPE}\"">>$(obj)include/config.h;
 	@$(MKCONFIG) -a TQM85xx ppc mpc85xx tqm85xx tqc
 	@echo "CONFIG_$(@:_config=) = y">>$(obj)include/config.mk;
 XPEDITE5200_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc85xx xpedite5200 xes
 XPEDITE5370_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc85xx xpedite5370 xes
 #########################################################################
 ## MPC86xx Systems
 #########################################################################
 MPC8610HPCD_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc86xx mpc8610hpcd freescale
 MPC8641HPCN_36BIT_config \
 MPC8641HPCN_config:    unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring _36BIT_,$@)" ] ; then \
 		echo "#define CONFIG_PHYS_64BIT" >>$(obj)include/config.h ; \
 		$(XECHO) "... enabling 36-bit physical addressing." ; \
 	fi
 	@$(MKCONFIG) -a MPC8641HPCN ppc mpc86xx mpc8641hpcn freescale
 sbc8641d_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc86xx sbc8641d
 #########################################################################
 ## 74xx/7xx Systems
 #########################################################################
 AmigaOneG3SE_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx AmigaOneG3SE MAI
 BAB7xx_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx bab7xx eltec
 CPCI750_config:	unconfig
 	@$(MKCONFIG) CPCI750 ppc 74xx_7xx cpci750 esd
 DB64360_config:	unconfig
 	@$(MKCONFIG) DB64360 ppc 74xx_7xx db64360 Marvell
 DB64460_config:	unconfig
 	@$(MKCONFIG) DB64460 ppc 74xx_7xx db64460 Marvell
 ELPPC_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx elppc eltec
 EVB64260_config	\
 EVB64260_750CX_config:	unconfig
 	@$(MKCONFIG) EVB64260 ppc 74xx_7xx evb64260
 mpc7448hpc2_config:  unconfig
 	@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx mpc7448hpc2 freescale
 P3G4_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx evb64260
 p3m750_config	\
 p3m7448_config:		unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring 750_,$@)" ] ; then \
 		echo "#define CONFIG_P3M750" >>$(obj)include/config.h ; \
 	else \
 		echo "#define CONFIG_P3M7448" >>$(obj)include/config.h ; \
 	fi
 	@$(MKCONFIG) -a p3mx ppc 74xx_7xx p3mx prodrive
 PCIPPC2_config \
 PCIPPC6_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx pcippc2
 ppmc7xx_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx ppmc7xx
 ZUMA_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx evb64260
 #========================================================================
 # ARM
 #========================================================================
 #########################################################################
 ## StrongARM Systems
 #########################################################################
 assabet_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm sa1100 assabet
 dnp1110_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm sa1100 dnp1110
 gcplus_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm sa1100 gcplus
 lart_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm sa1100 lart
 shannon_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm sa1100 shannon
 #########################################################################
 ## ARM92xT Systems
 #########################################################################
 #########################################################################
 ## Atmel AT91RM9200 Systems
 #########################################################################
 at91rm9200dk_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk atmel at91rm9200
 at91rm9200ek_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200ek atmel at91rm9200
 cmc_pu2_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t cmc_pu2 NULL at91rm9200
 csb637_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t csb637 NULL at91rm9200
 kb9202_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t kb9202 NULL at91rm9200
 m501sk_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t m501sk NULL at91rm9200
 mp2usb_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t mp2usb NULL at91rm9200
 #########################################################################
 ## Atmel ARM926EJ-S Systems
 #########################################################################
 afeb9260_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm926ejs afeb9260 NULL at91
 at91cap9adk_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm926ejs at91cap9adk atmel at91
 at91sam9260ek_nandflash_config \
 at91sam9260ek_dataflash_cs0_config \
 at91sam9260ek_dataflash_cs1_config \
 at91sam9260ek_config \
 at91sam9g20ek_nandflash_config \
 at91sam9g20ek_dataflash_cs0_config \
 at91sam9g20ek_dataflash_cs1_config \
 at91sam9g20ek_config	:	unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring 9g20,$@)" ] ; then \
 		echo "#define CONFIG_AT91SAM9G20EK 1"	>>$(obj)include/config.h ; \
 		$(XECHO) "... 9G20 Variant" ; \
 	else \
 		echo "#define CONFIG_AT91SAM9260EK 1"	>>$(obj)include/config.h ; \
 	fi;
 	@if [ "$(findstring _nandflash,$@)" ] ; then \
 		echo "#define CONFIG_SYS_USE_NANDFLASH 1"	>>$(obj)include/config.h ; \
 		$(XECHO) "... with environment variable in NAND FLASH" ; \
 	elif [ "$(findstring dataflash_cs0,$@)" ] ; then \
 		echo "#define CONFIG_SYS_USE_DATAFLASH_CS0 1"	>>$(obj)include/config.h ; \
 		$(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
 	else \
 		echo "#define CONFIG_SYS_USE_DATAFLASH_CS1 1"	>>$(obj)include/config.h ; \
 		$(XECHO) "... with environment variable in SPI DATAFLASH CS1" ; \
 	fi;
 	@$(MKCONFIG) -a at91sam9260ek arm arm926ejs at91sam9260ek atmel at91
 at91sam9xeek_nandflash_config \
 at91sam9xeek_dataflash_cs0_config \
 at91sam9xeek_dataflash_cs1_config \
 at91sam9xeek_config	:	unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring _nandflash,$@)" ] ; then \
 		echo "#define CONFIG_SYS_USE_NANDFLASH 1"	>>$(obj)include/config.h ; \
 		$(XECHO) "... with environment variable in NAND FLASH" ; \
 	elif [ "$(findstring dataflash_cs0,$@)" ] ; then \
 		echo "#define CONFIG_SYS_USE_DATAFLASH_CS0 1"	>>$(obj)include/config.h ; \
 		$(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
 	else \
 		echo "#define CONFIG_SYS_USE_DATAFLASH_CS1 1"	>>$(obj)include/config.h ; \
 		$(XECHO) "... with environment variable in SPI DATAFLASH CS1" ; \
 	fi;
 	@$(MKCONFIG) -n at91sam9xeek -a at91sam9260ek arm arm926ejs at91sam9260ek atmel at91
 at91sam9261ek_nandflash_config \
 at91sam9261ek_dataflash_cs0_config \
 at91sam9261ek_dataflash_cs3_config \
 at91sam9261ek_config	:	unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring _nandflash,$@)" ] ; then \
 		echo "#define CONFIG_SYS_USE_NANDFLASH 1"	>>$(obj)include/config.h ; \
 		$(XECHO) "... with environment variable in NAND FLASH" ; \
 	elif [ "$(findstring dataflash_cs3,$@)" ] ; then \
 		echo "#define CONFIG_SYS_USE_DATAFLASH_CS3 1"	>>$(obj)include/config.h ; \
 		$(XECHO) "... with environment variable in SPI DATAFLASH CS3" ; \
 	else \
 		echo "#define CONFIG_SYS_USE_DATAFLASH_CS0 1"	>>$(obj)include/config.h ; \
 		$(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
 	fi;
 	@$(MKCONFIG) -a at91sam9261ek arm arm926ejs at91sam9261ek atmel at91
 at91sam9263ek_nandflash_config \
 at91sam9263ek_dataflash_config \
 at91sam9263ek_dataflash_cs0_config \
 at91sam9263ek_config	:	unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring _nandflash,$@)" ] ; then \
 		echo "#define CONFIG_SYS_USE_NANDFLASH 1"	>>$(obj)include/config.h ; \
 		$(XECHO) "... with environment variable in NAND FLASH" ; \
 	else \
 		echo "#define CONFIG_SYS_USE_DATAFLASH 1"	>>$(obj)include/config.h ; \
 		$(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
 	fi;
 	@$(MKCONFIG) -a at91sam9263ek arm arm926ejs at91sam9263ek atmel at91
 at91sam9rlek_nandflash_config \
 at91sam9rlek_dataflash_config \
 at91sam9rlek_dataflash_cs0_config \
 at91sam9rlek_config	:	unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring _nandflash,$@)" ] ; then \
 		echo "#define CONFIG_SYS_USE_NANDFLASH 1"	>>$(obj)include/config.h ; \
 		$(XECHO) "... with environment variable in NAND FLASH" ; \
 	else \
 		echo "#define CONFIG_SYS_USE_DATAFLASH 1"	>>$(obj)include/config.h ; \
 		$(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
 	fi;
 	@$(MKCONFIG) -a at91sam9rlek arm arm926ejs at91sam9rlek atmel at91
 pm9263_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm926ejs pm9263 ronetix at91
 ########################################################################
 ## ARM Integrator boards - see doc/README-integrator for more info.
 integratorap_config	\
 ap_config		\
 ap966_config		\
 ap922_config		\
 ap922_XA10_config	\
 ap7_config		\
 ap720t_config		\
 ap920t_config		\
 ap926ejs_config		\
 ap946es_config: unconfig
 	@board/armltd/integratorap/split_by_variant.sh $@
 integratorcp_config	\
 cp_config		\
 cp920t_config		\
 cp926ejs_config		\
 cp946es_config		\
 cp1136_config		\
 cp966_config		\
 cp922_config		\
 cp922_XA10_config	\
 cp1026_config: unconfig
 	@board/armltd/integratorcp/split_by_variant.sh $@
 davinci_dvevm_config :	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm926ejs dvevm davinci davinci
 davinci_schmoogie_config :	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm926ejs schmoogie davinci davinci
 davinci_sffsdr_config :	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm926ejs sffsdr davinci davinci
 davinci_sonata_config :	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci
 lpd7a400_config \
 lpd7a404_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm lh7a40x lpd7a40x
 mx1ads_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t mx1ads NULL imx
 mx1fs2_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t mx1fs2 NULL imx
 netstar_config:		unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm925t netstar
 nmdk8815_config \
 nmdk8815_onenand_config:	unconfig
 	@mkdir -p $(obj)include
 	@ > $(obj)include/config.h
 	@if [ "$(findstring _onenand, $@)" ] ; then \
 		echo "#define CONFIG_BOOT_ONENAND" >> $(obj)include/config.h; \
 		$(XECHO) "... configured for OneNand Flash"; \
 	else \
 		$(XECHO) "... configured for Nand Flash"; \
 	fi
 	@$(MKCONFIG) -a nmdk8815 arm arm926ejs nmdk8815 st nomadik
 omap1510inn_config :	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm925t omap1510inn
 xtract_omap1610xxx = $(subst _cs0boot,,$(subst _cs3boot,,$(subst _cs_autoboot,,$(subst _config,,$1))))
 omap1610inn_config \
 omap1610inn_cs0boot_config \
 omap1610inn_cs3boot_config \
 omap1610inn_cs_autoboot_config \
 omap1610h2_config \
 omap1610h2_cs0boot_config \
 omap1610h2_cs3boot_config \
 omap1610h2_cs_autoboot_config:	unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring _cs0boot_, $@)" ] ; then \
 		echo "#define CONFIG_CS0_BOOT" >> .$(obj)include/config.h ; \
 		$(XECHO) "... configured for CS0 boot"; \
 	elif [ "$(findstring _cs_autoboot_, $@)" ] ; then \
 		echo "#define CONFIG_CS_AUTOBOOT" >> $(obj)include/config.h ; \
 		$(XECHO) "... configured for CS_AUTO boot"; \
 	else \
 		echo "#define CONFIG_CS3_BOOT" >> $(obj)include/config.h ; \
 		$(XECHO) "... configured for CS3 boot"; \
 	fi;
 	@$(MKCONFIG) -a $(call xtract_omap1610xxx,$@) arm arm926ejs omap1610inn NULL omap
 omap5912osk_config :	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm926ejs omap5912osk NULL omap
 xtract_omap730p2 = $(subst _cs0boot,,$(subst _cs3boot,, $(subst _config,,$1)))
 omap730p2_config \
 omap730p2_cs0boot_config \
 omap730p2_cs3boot_config :	unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring _cs0boot_, $@)" ] ; then \
 		echo "#define CONFIG_CS0_BOOT" >> $(obj)include/config.h ; \
 		$(XECHO) "... configured for CS0 boot"; \
 	else \
 		echo "#define CONFIG_CS3_BOOT" >> $(obj)include/config.h ; \
 		$(XECHO) "... configured for CS3 boot"; \
 	fi;
 	@$(MKCONFIG) -a $(call xtract_omap730p2,$@) arm arm926ejs omap730p2 NULL omap
 sbc2410x_config: unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t sbc2410x NULL s3c24x0
 scb9328_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t scb9328 NULL imx
 smdk2400_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t smdk2400 samsung s3c24x0
 smdk2410_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t smdk2410 samsung s3c24x0
 SX1_stdout_serial_config \
 SX1_config:		unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring _stdout_serial_, $@)" ] ; then \
 		echo "#undef CONFIG_STDOUT_USBTTY" >> $(obj)include/config.h ; \
 		$(XECHO) "... configured for stdout serial"; \
 	else \
 		echo "#define CONFIG_STDOUT_USBTTY" >> $(obj)include/config.h ; \
 		$(XECHO) "... configured for stdout usbtty"; \
 	fi;
 	@$(MKCONFIG) SX1 arm arm925t sx1
 # TRAB default configuration:	8 MB Flash, 32 MB RAM
 xtract_trab = $(subst _bigram,,$(subst _bigflash,,$(subst _old,,$(subst _config,,$1))))
 trab_config \
 trab_bigram_config \
 trab_bigflash_config \
 trab_old_config:	unconfig
 	@mkdir -p $(obj)include
 	@mkdir -p $(obj)board/trab
 	@[ -z "$(findstring _bigram,$@)" ] || \
 		{ echo "#define CONFIG_FLASH_8MB"  >>$(obj)include/config.h ; \
 		  echo "#define CONFIG_RAM_32MB"   >>$(obj)include/config.h ; \
 		  $(XECHO) "... with 8 MB Flash, 32 MB RAM" ; \
 		}
 	@[ -z "$(findstring _bigflash,$@)" ] || \
 		{ echo "#define CONFIG_FLASH_16MB" >>$(obj)include/config.h ; \
 		  echo "#define CONFIG_RAM_16MB"   >>$(obj)include/config.h ; \
 		  $(XECHO) "... with 16 MB Flash, 16 MB RAM" ; \
 		  echo "TEXT_BASE = 0x0CF40000" >$(obj)board/trab/config.tmp ; \
 		}
 	@[ -z "$(findstring _old,$@)" ] || \
 		{ echo "#define CONFIG_FLASH_8MB"  >>$(obj)include/config.h ; \
 		  echo "#define CONFIG_RAM_16MB"   >>$(obj)include/config.h ; \
 		  $(XECHO) "... with 8 MB Flash, 16 MB RAM" ; \
 		  echo "TEXT_BASE = 0x0CF40000" >$(obj)board/trab/config.tmp ; \
 		}
 	@$(MKCONFIG) -a $(call xtract_trab,$@) arm arm920t trab NULL s3c24x0
 VCMA9_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t vcma9 mpl s3c24x0
 #########################################################################
 # ARM supplied Versatile development boards
 #########################################################################
 cm4008_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t cm4008 NULL ks8695
 cm41xx_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t cm41xx NULL ks8695
 versatile_config	\
 versatileab_config	\
 versatilepb_config :	unconfig
 	@board/armltd/versatile/split_by_variant.sh $@
 voiceblue_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm925t voiceblue
 #########################################################################
 ## S3C44B0 Systems
 #########################################################################
 B2_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm s3c44b0 B2 dave
 #########################################################################
 ## ARM720T Systems
 #########################################################################
 armadillo_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm720t armadillo
 ep7312_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm720t ep7312
 impa7_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm720t impa7
 modnet50_config :	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm720t modnet50
 evb4510_config :	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm720t evb4510 NULL s3c4510b
 lpc2292sodimm_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm720t lpc2292sodimm NULL lpc2292
 SMN42_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm720t SMN42 siemens lpc2292
 #########################################################################
 ## ARM CORTEX Systems
 #########################################################################
 omap3_beagle_config :	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm_cortexa8 beagle omap3 omap3
 omap3_overo_config :	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm_cortexa8 overo omap3 omap3
 omap3_evm_config :	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm_cortexa8 evm omap3 omap3
 omap3_pandora_config :	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm_cortexa8 pandora omap3 omap3
 omap3_zoom1_config :	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm_cortexa8 zoom1 omap3 omap3
 #########################################################################
 ## XScale Systems
 #########################################################################
 actux1_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm ixp actux1
 actux2_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm ixp actux2
 actux3_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm ixp actux3
 actux4_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm ixp actux4
 cerf250_config :	unconfig
 	@$(MKCONFIG) $(@:_config=) arm pxa cerf250
 cradle_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm pxa cradle
 csb226_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm pxa csb226
 delta_config :	unconfig
 	@$(MKCONFIG) $(@:_config=) arm pxa delta
 innokom_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm pxa innokom
 ixdp425_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm ixp ixdp425
 ixdpg425_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm ixp ixdp425
 lubbock_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm pxa lubbock
 pleb2_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm pxa pleb2
 logodl_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm pxa logodl
 pdnb3_config \
 scpu_config:	unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring scpu_,$@)" ] ; then \
 		echo "#define CONFIG_SCPU"	>>$(obj)include/config.h ; \
 		$(XECHO) "... on SCPU board variant" ; \
 	fi
 	@$(MKCONFIG) -a pdnb3 arm ixp pdnb3 prodrive
 pxa255_idp_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm pxa pxa255_idp
 trizepsiv_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm pxa trizepsiv
 wepep250_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm pxa wepep250
 xaeniax_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm pxa xaeniax
 xm250_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm pxa xm250
 xsengine_config :	unconfig
 	@$(MKCONFIG) $(@:_config=) arm pxa xsengine
 zylonite_config :
 	@$(MKCONFIG) $(@:_config=) arm pxa zylonite
 #########################################################################
 ## ARM1136 Systems
 #########################################################################
 apollon_config		: unconfig
 	@mkdir -p $(obj)include
 	@mkdir -p $(obj)onenand_ipl/board/apollon
 	@echo "#define CONFIG_ONENAND_U_BOOT" > $(obj)include/config.h
 	@$(MKCONFIG) $(@:_config=) arm arm1136 apollon NULL omap24xx
 	@echo "CONFIG_ONENAND_U_BOOT = y" >> $(obj)include/config.mk
 imx31_litekit_config	: unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm1136 imx31_litekit NULL mx31
 imx31_phycore_eet_config \
 imx31_phycore_config	: unconfig
 	@mkdir -p $(obj)include
 	@if [ -n "$(findstring _eet_,$@)" ]; then			\
 		echo "#define CONFIG_IMX31_PHYCORE_EET" >> $(obj)include/config.h;	\
 	fi
 	@$(MKCONFIG) -a imx31_phycore arm arm1136 imx31_phycore NULL mx31
 mx31ads_config		: unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads freescale mx31
 omap2420h4_config	: unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
 qong_config		: unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm1136 qong davedenx mx31
 #########################################################################
 ## ARM1176 Systems
 #########################################################################
 smdk6400_noUSB_config	\
 smdk6400_config	:	unconfig
 	@mkdir -p $(obj)include $(obj)board/samsung/smdk6400
 	@mkdir -p $(obj)nand_spl/board/samsung/smdk6400
 	@echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
 	@if [ -z "$(findstring smdk6400_noUSB_config,$@)" ]; then			\
 		echo "RAM_TEXT = 0x57e00000" >> $(obj)board/samsung/smdk6400/config.tmp;\
 		$(MKCONFIG) $(@:_config=) arm arm1176 smdk6400 samsung s3c64xx;		\
 	else										\
 		echo "RAM_TEXT = 0xc7e00000" >> $(obj)board/samsung/smdk6400/config.tmp;\
 		$(MKCONFIG) $(@:_noUSB_config=) arm arm1176 smdk6400 samsung s3c64xx;	\
 	fi
 	@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
 #========================================================================
 # i386
 #========================================================================
 #########################################################################
 ## AMD SC520 CDP
 #########################################################################
 eNET_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) i386 i386 eNET NULL sc520
 sc520_cdp_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) i386 i386 sc520_cdp NULL sc520
 sc520_spunk_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) i386 i386 sc520_spunk NULL sc520
 sc520_spunk_rel_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) i386 i386 sc520_spunk NULL sc520
 #========================================================================
 # MIPS
 #========================================================================
 #########################################################################
 ## MIPS32 4Kc
 #########################################################################
 xtract_incaip = $(subst _100MHz,,$(subst _133MHz,,$(subst _150MHz,,$(subst _config,,$1))))
 incaip_100MHz_config	\
 incaip_133MHz_config	\
 incaip_150MHz_config	\
 incaip_config: unconfig
 	@mkdir -p $(obj)include
 	@[ -z "$(findstring _100MHz,$@)" ] || \
 		{ echo "#define CPU_CLOCK_RATE 100000000" >>$(obj)include/config.h ; \
 		  $(XECHO) "... with 100MHz system clock" ; \
 		}
 	@[ -z "$(findstring _133MHz,$@)" ] || \
 		{ echo "#define CPU_CLOCK_RATE 133000000" >>$(obj)include/config.h ; \
 		  $(XECHO) "... with 133MHz system clock" ; \
 		}
 	@[ -z "$(findstring _150MHz,$@)" ] || \
 		{ echo "#define CPU_CLOCK_RATE 150000000" >>$(obj)include/config.h ; \
 		  $(XECHO) "... with 150MHz system clock" ; \
 		}
 	@$(MKCONFIG) -a $(call xtract_incaip,$@) mips mips incaip
 tb0229_config: unconfig
 	@$(MKCONFIG) $(@:_config=) mips mips tb0229
 vct_premium_config		\
 vct_premium_small_config	\
 vct_premium_onenand_config	\
 vct_premium_onenand_small_config \
 vct_platinum_config		\
 vct_platinum_small_config	\
 vct_platinum_onenand_config	\
 vct_platinum_onenand_small_config \
 vct_platinumavc_config		\
 vct_platinumavc_small_config	\
 vct_platinumavc_onenand_config	\
 vct_platinumavc_onenand_small_config: unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring _premium,$@)" ] ; then \
 		echo "#define CONFIG_VCT_PREMIUM" > $(obj)include/config.h ; \
 		$(XECHO) "... on Premium board variant" ; \
 	fi
 	@if [ "$(findstring _platinum_,$@)" ] ; then \
 		echo "#define CONFIG_VCT_PLATINUM" > $(obj)include/config.h ; \
 		$(XECHO) "... on Platinum board variant" ; \
 	fi
 	@if [ "$(findstring _platinumavc,$@)" ] ; then \
 		echo "#define CONFIG_VCT_PLATINUMAVC" > $(obj)include/config.h ; \
 		$(XECHO) "... on PlatinumAVC board variant" ; \
 	fi
 	@if [ "$(findstring _onenand,$@)" ] ; then \
 		echo "#define CONFIG_VCT_ONENAND" >> $(obj)include/config.h ; \
 		$(XECHO) "... on OneNAND board variant" ; \
 	fi
 	@if [ "$(findstring _small,$@)" ] ; then \
 		echo "#define CONFIG_VCT_SMALL_IMAGE" >> $(obj)include/config.h ; \
 		$(XECHO) "... stripped down image variant" ; \
 	fi
 	@$(MKCONFIG) -a vct mips mips vct micronas
 #########################################################################
 ## MIPS32 AU1X00
 #########################################################################
 dbau1000_config		:	unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_DBAU1000 1" >$(obj)include/config.h
 	@$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
 dbau1100_config		:	unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_DBAU1100 1" >$(obj)include/config.h
 	@$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
 dbau1500_config		:	unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_DBAU1500 1" >$(obj)include/config.h
 	@$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
 dbau1550_config		:	unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_DBAU1550 1" >$(obj)include/config.h
 	@$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
 dbau1550_el_config	:	unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_DBAU1550 1" >$(obj)include/config.h
 	@$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
 gth2_config		:	unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_GTH2 1" >$(obj)include/config.h
 	@$(MKCONFIG) -a gth2 mips mips gth2
 pb1000_config		:	unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_PB1000 1" >$(obj)include/config.h
 	@$(MKCONFIG) -a pb1x00 mips mips pb1x00
 qemu_mips_config	: unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_QEMU_MIPS 1" >$(obj)include/config.h
 	@$(MKCONFIG) -a qemu-mips mips mips qemu-mips
 #########################################################################
 ## MIPS64 5Kc
 #########################################################################
 purple_config :		unconfig
 	@$(MKCONFIG) $(@:_config=) mips mips purple
 #========================================================================
 # Nios
 #========================================================================
 #########################################################################
 ## Nios32
 #########################################################################
 ADNPESC1_DNPEVA2_base_32_config	\
 ADNPESC1_base_32_config		\
 ADNPESC1_config: unconfig
 	@mkdir -p $(obj)include
 	@[ -z "$(findstring _DNPEVA2,$@)" ] || \
 		{ echo "#define CONFIG_DNPEVA2 1" >>$(obj)include/config.h ; \
 		  $(XECHO) "... DNP/EVA2 configuration" ; \
 		}
 	@[ -z "$(findstring _base_32,$@)" ] || \
 		{ echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \
 		  $(XECHO) "... NIOS 'base_32' configuration" ; \
 		}
 	@[ -z "$(findstring ADNPESC1_config,$@)" ] || \
 		{ echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \
 		  $(XECHO) "... NIOS 'base_32' configuration (DEFAULT)" ; \
 		}
 	@$(MKCONFIG) -a ADNPESC1 nios nios adnpesc1 ssv
 DK1C20_safe_32_config		\
 DK1C20_standard_32_config	\
 DK1C20_config:	unconfig
 	@mkdir -p $(obj)include
 	@[ -z "$(findstring _safe_32,$@)" ] || \
 		{ echo "#define CONFIG_NIOS_SAFE_32 1" >>$(obj)include/config.h ; \
 		  $(XECHO) "... NIOS 'safe_32' configuration" ; \
 		}
 	@[ -z "$(findstring _standard_32,$@)" ] || \
 		{ echo "#define CONFIG_NIOS_STANDARD_32 1" >>$(obj)include/config.h ; \
 		  $(XECHO) "... NIOS 'standard_32' configuration" ; \
 		}
 	@[ -z "$(findstring DK1C20_config,$@)" ] || \
 		{ echo "#define CONFIG_NIOS_STANDARD_32 1" >>$(obj)include/config.h ; \
 		  $(XECHO) "... NIOS 'standard_32' configuration (DEFAULT)" ; \
 		}
 	@$(MKCONFIG) -a DK1C20 nios nios dk1c20 altera
 DK1S10_safe_32_config		\
 DK1S10_standard_32_config	\
 DK1S10_mtx_ldk_20_config	\
 DK1S10_config:	unconfig
 	@mkdir -p $(obj)include
 	@[ -z "$(findstring _safe_32,$@)" ] || \
 		{ echo "#define CONFIG_NIOS_SAFE_32 1" >>$(obj)include/config.h ; \
 		  $(XECHO) "... NIOS 'safe_32' configuration" ; \
 		}
 	@[ -z "$(findstring _standard_32,$@)" ] || \
 		{ echo "#define CONFIG_NIOS_STANDARD_32 1" >>$(obj)include/config.h ; \
 		  $(XECHO) "... NIOS 'standard_32' configuration" ; \
 		}
 	@[ -z "$(findstring _mtx_ldk_20,$@)" ] || \
 		{ echo "#define CONFIG_NIOS_MTX_LDK_20 1" >>$(obj)include/config.h ; \
 		  $(XECHO) "... NIOS 'mtx_ldk_20' configuration" ; \
 		}
 	@[ -z "$(findstring DK1S10_config,$@)" ] || \
 		{ echo "#define CONFIG_NIOS_STANDARD_32 1" >>$(obj)include/config.h ; \
 		  $(XECHO) "... NIOS 'standard_32' configuration (DEFAULT)" ; \
 		}
 	@$(MKCONFIG) -a DK1S10 nios nios dk1s10 altera
 #########################################################################
 ## Nios-II
 #########################################################################
 EP1C20_config : unconfig
 	@$(MKCONFIG)  EP1C20 nios2 nios2 ep1c20 altera
 EP1S10_config : unconfig
 	@$(MKCONFIG)  EP1S10 nios2 nios2 ep1s10 altera
 EP1S40_config : unconfig
 	@$(MKCONFIG)  EP1S40 nios2 nios2 ep1s40 altera
 PK1C20_config : unconfig
 	@$(MKCONFIG)  PK1C20 nios2 nios2 pk1c20 psyent
 PCI5441_config : unconfig
 	@$(MKCONFIG)  PCI5441 nios2 nios2 pci5441 psyent
 #========================================================================
 ## Microblaze
 #========================================================================
 microblaze-generic_config:	unconfig
 	@mkdir -p $(obj)include
 	@$(MKCONFIG) -a $(@:_config=) microblaze microblaze microblaze-generic xilinx
 suzaku_config:	unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_SUZAKU 1" > $(obj)include/config.h
 	@$(MKCONFIG) -a $(@:_config=) microblaze microblaze suzaku AtmarkTechno
 #========================================================================
 # Blackfin
 #========================================================================
 # Analog Devices boards
 BFIN_BOARDS = bf518f-ezbrd bf526-ezbrd bf527-ezkit bf533-ezkit bf533-stamp \
 	bf537-stamp bf538f-ezkit bf548-ezkit bf561-ezkit
 $(BFIN_BOARDS:%=%_config)	: unconfig
 	@$(MKCONFIG) $(@:_config=) blackfin blackfin $(@:_config=)
 $(BFIN_BOARDS):
 	$(MAKE) $@_config
 	$(MAKE)
 #========================================================================
 # AVR32
 #========================================================================
 atngw100_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) avr32 at32ap atngw100 atmel at32ap700x
 atstk1002_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
 atstk1003_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
 atstk1004_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
 atstk1006_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
 favr-32-ezkit_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) avr32 at32ap favr-32-ezkit earthlcd at32ap700x
 hammerhead_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) avr32 at32ap hammerhead miromico at32ap700x
 mimc200_config		:	unconfig
 	@$(MKCONFIG) $(@:_config=) avr32 at32ap mimc200 mimc at32ap700x
 #========================================================================
 # SH3 (SuperH)
 #========================================================================
 #########################################################################
 ## sh2 (Renesas SuperH)
 #########################################################################
 rsk7203_config: unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_RSK7203 1" > $(obj)include/config.h
 	@$(MKCONFIG) -a $(@:_config=) sh sh2 rsk7203 renesas
 #########################################################################
 ## sh3 (Renesas SuperH)
 #########################################################################
 mpr2_config: unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_MPR2 1" > $(obj)include/config.h
 	@$(MKCONFIG) -a $(@:_config=) sh sh3 mpr2
 ms7720se_config: unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_MS7720SE 1" > $(obj)include/config.h
 	@$(MKCONFIG) -a $(@:_config=) sh sh3 ms7720se
 #########################################################################
 ## sh4 (Renesas SuperH)
 #########################################################################
 MigoR_config :       unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_MIGO_R 1" > $(obj)include/config.h
 	@$(MKCONFIG) -a $(@:_config=) sh sh4 MigoR renesas
 ms7750se_config: unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_MS7750SE 1" > $(obj)include/config.h
 	@$(MKCONFIG) -a $(@:_config=) sh sh4 ms7750se
 ms7722se_config :	unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_MS7722SE 1" > $(obj)include/config.h
 	@$(MKCONFIG) -a $(@:_config=) sh sh4 ms7722se
 r2dplus_config  :   unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_R2DPLUS 1" > $(obj)include/config.h
 	@$(MKCONFIG) -a $(@:_config=) sh sh4 r2dplus renesas
 r7780mp_config: unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_R7780MP 1" > $(obj)include/config.h
 	@$(MKCONFIG) -a $(@:_config=) sh sh4 r7780mp renesas
 sh7763rdp_config  :   unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_SH7763RDP 1" > $(obj)include/config.h
 	@$(MKCONFIG) -a $(@:_config=) sh sh4 sh7763rdp renesas
 xtract_sh7785lcr = $(subst _32bit,,$(subst _config,,$1))
 sh7785lcr_32bit_config \
 sh7785lcr_config  :   unconfig
 	@ >include/config.h
 	@echo "#define CONFIG_SH7785LCR 1" >> include/config.h
 	@if [ "$(findstring 32bit, $@)" ] ; then \
 		echo "#define CONFIG_SH_32BIT 1" >> $(obj)include/config.h ; \
 		cp $(obj)board/renesas/sh7785lcr/u-boot_32bit \
 			$(obj)board/renesas/sh7785lcr/u-boot.lds ; \
 		echo "TEXT_BASE = 0x8ff80000" > \
 			$(obj)board/renesas/sh7785lcr/config.tmp ; \
 		  $(XECHO) " ... enable 32-Bit Address Extended Mode" ; \
 	else \
 		cp $(obj)board/renesas/sh7785lcr/u-boot_29bit \
 			$(obj)board/renesas/sh7785lcr/u-boot.lds ; \
 	fi
 	@$(MKCONFIG) -a $(call xtract_sh7785lcr,$@) sh sh4 sh7785lcr renesas
 ap325rxa_config  :   unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_AP325RXA 1" > $(obj)include/config.h
 	@$(MKCONFIG) -a $(@:_config=) sh sh4 ap325rxa renesas
 #========================================================================
 # SPARC
 #========================================================================
 #########################################################################
 ## LEON3
 #########################################################################
 # Gaisler GR-XC3S-1500 board
 gr_xc3s_1500_config : unconfig
 	@$(MKCONFIG) $(@:_config=) sparc leon3 gr_xc3s_1500 gaisler
 # Gaisler GR-CPCI-AX2000 board, a General purpose FPGA-AX system
 gr_cpci_ax2000_config : unconfig
 	@$(MKCONFIG) $(@:_config=) sparc leon3 gr_cpci_ax2000 gaisler
 # Gaisler GRLIB template design (GPL SPARC/LEON3) for Altera NIOS
 # Development board Stratix II edition, FPGA Device EP2S60.
 gr_ep2s60_config: unconfig
 	@$(MKCONFIG) $(@:_config=) sparc leon3 gr_ep2s60 gaisler
 # Gaisler LEON3 GRSIM simulator
 grsim_config : unconfig
 	@$(MKCONFIG) $(@:_config=) sparc leon3 grsim gaisler
 #########################################################################
 ## LEON2
 #########################################################################
 # Gaisler LEON2 GRSIM simulator
 grsim_leon2_config : unconfig
 	@$(MKCONFIG) $(@:_config=) sparc leon2 grsim_leon2 gaisler
 #########################################################################
 #########################################################################
 #########################################################################
 clean:
 	@rm -f $(obj)examples/82559_eeprom $(obj)examples/eepro100_eeprom \
 	       $(obj)examples/hello_world  $(obj)examples/interrupt	  \
 	       $(obj)examples/mem_to_mem_idma2intr			  \
 	       $(obj)examples/sched	   $(obj)examples/smc91111_eeprom \
 	       $(obj)examples/test_burst   $(obj)examples/timer
 	@rm -f $(obj)tools/bmp_logo	   $(obj)tools/easylogo/easylogo  \
 	       $(obj)tools/env/{fw_printenv,fw_setenv}			  \
 	       $(obj)tools/envcrc					  \
 	       $(obj)tools/gdb/{astest,gdbcont,gdbsend}			  \
 	       $(obj)tools/gen_eth_addr    $(obj)tools/img2srec		  \
 	       $(obj)tools/mkimage	   $(obj)tools/mpc86x_clk	  \
 	       $(obj)tools/ncb		   $(obj)tools/ubsha1
 	@rm -f $(obj)board/cray/L1/{bootscript.c,bootscript.image}	  \
 	       $(obj)board/netstar/{eeprom,crcek,crcit,*.srec,*.bin}	  \
 	       $(obj)board/trab/trab_fkt   $(obj)board/voiceblue/eeprom   \
 	       $(obj)board/armltd/{integratorap,integratorcp}/u-boot.lds  \
 	       $(obj)board/bf5{18f,26,27,33,38f,48,61}-ez{brd,kit}/u-boot.lds \
 	       $(obj)board/bf5{33,37}-stamp/u-boot.lds			  \
 	       $(obj)cpu/blackfin/bootrom-asm-offsets.[chs]
 	@rm -f $(obj)include/bmp_logo.h
 	@rm -f $(obj)nand_spl/{u-boot-spl,u-boot-spl.map,System.map}
 	@rm -f $(obj)onenand_ipl/onenand-{ipl,ipl.bin,ipl-2k.bin,ipl-4k.bin,ipl.map}
 	@rm -f $(obj)api_examples/demo $(TIMESTAMP_FILE) $(VERSION_FILE)
 	@find $(OBJTREE) -type f \
 		\( -name 'core' -o -name '*.bak' -o -name '*~' \
 		-o -name '*.o'	-o -name '*.a' -o -name '*.exe'	\) -print \
 		| xargs rm -f
 clobber:	clean
 	@find $(OBJTREE) -type f \( -name .depend \
 		-o -name '*.srec' -o -name '*.bin' -o -name u-boot.img \) \
 		-print0 \
 		| xargs -0 rm -f
 	@rm -f $(OBJS) $(obj)*.bak $(obj)ctags $(obj)etags $(obj)TAGS \
 		$(obj)cscope.* $(obj)*.*~
 	@rm -f $(obj)u-boot $(obj)u-boot.map $(obj)u-boot.hex $(ALL)
 	@rm -f $(obj)tools/{env/crc32.c,inca-swap-bytes}
 	@rm -f $(obj)cpu/mpc824x/bedbug_603e.c
 	@rm -f $(obj)include/asm/proc $(obj)include/asm/arch $(obj)include/asm
 	@[ ! -d $(obj)nand_spl ] || find $(obj)nand_spl -name "*" -type l -print | xargs rm -f
 	@[ ! -d $(obj)onenand_ipl ] || find $(obj)onenand_ipl -name "*" -type l -print | xargs rm -f
 	@[ ! -d $(obj)api_examples ] || find $(obj)api_examples -name "*" -type l -print | xargs rm -f
 ifeq ($(OBJTREE),$(SRCTREE))
 mrproper \
 distclean:	clobber unconfig
 else
 mrproper \
 distclean:	clobber unconfig
 	rm -rf $(obj)*
 endif
 backup:
 	F=`basename $(TOPDIR)` ; cd .. ; \
 	gtar --force-local -zcvf `date "+$$F-%Y-%m-%d-%T.tar.gz"` $$F
 #########################################################################

board/amcc/sequoia/init.S

Diff comments View file @ d873133

 /*
  * (C) Copyright 2008
  * Stefan Roese, DENX Software Engineering, sr@denx.de.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
  * published by the Free Software Foundation; either version 2 of
  * the License, or (at your option) any later version.
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
  * GNU General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  * MA 02111-1307 USA
  */
 #include <ppc_asm.tmpl>
 #include <asm-ppc/mmu.h>
 #include <config.h>
 /*
  * TLB TABLE
  *
  * This table is used by the cpu boot code to setup the initial tlb
  * entries. Rather than make broad assumptions in the cpu source tree,
  * this table lets each board set things up however they like.
  *
  *  Pointer to the table is returned in r1
  */
     .section .bootpg,"ax"
     .globl tlbtab
 tlbtab:
 	tlbtab_start
 	/* vxWorks needs this as first entry for the Machine Check interrupt */
 	tlbentry( 0x40000000, SZ_256M, 0, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
+	/*
+	 * The RAM-boot version skips the SDRAM TLB (identified by EPN=0). This
+	 * entry is already configured for SDRAM via the JTAG debugger and mustn't
+	 * be re-initialized by this RAM-booting U-Boot version.
+	 */
+#ifndef CONFIG_SYS_RAMBOOT
 	/* TLB-entry for DDR SDRAM (Up to 2GB) */
 #ifdef CONFIG_4xx_DCACHE
 	tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G)
 #else
 	tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
 #endif
+#endif /* CONFIG_SYS_RAMBOOT */
 	/* TLB-entry for EBC */
 	tlbentry( CONFIG_SYS_BCSR_BASE, SZ_256M, CONFIG_SYS_BCSR_BASE, 1, AC_R|AC_W|AC_X|SA_G|SA_I )
 	/* BOOT_CS (FLASH) must be forth. Before relocation SA_I can be off to use the
 	 * speed up boot process. It is patched after relocation to enable SA_I
 	 */
 #ifndef CONFIG_NAND_SPL
 	tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, 1, AC_R|AC_W|AC_X|SA_G )
 #else
 	tlbentry( CONFIG_SYS_NAND_BOOT_SPL_SRC, SZ_4K, CONFIG_SYS_NAND_BOOT_SPL_SRC, 1, AC_R|AC_W|AC_X|SA_G )
 #endif
 #ifdef CONFIG_SYS_INIT_RAM_DCACHE
 	/* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
 	tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G )
 #endif
 	/* TLB-entry for PCI Memory */
 	tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 1, AC_R|AC_W|SA_G|SA_I )
 	tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 1, AC_R|AC_W|SA_G|SA_I )
 	tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 1, AC_R|AC_W|SA_G|SA_I )
 	tlbentry( CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 1, AC_R|AC_W|SA_G|SA_I )
 	/* TLB-entry for NAND */
 	tlbentry( CONFIG_SYS_NAND_ADDR, SZ_1K, CONFIG_SYS_NAND_ADDR, 1, AC_R|AC_W|AC_X|SA_G|SA_I )
 	/* TLB-entry for Internal Registers & OCM */
 	tlbentry( 0xe0000000, SZ_16M, 0xe0000000, 0,  AC_R|AC_W|AC_X|SA_I )
 	/*TLB-entry PCI registers*/
 	tlbentry( 0xEEC00000, SZ_1K, 0xEEC00000, 1,  AC_R|AC_W|AC_X|SA_G|SA_I )
 	/* TLB-entry for peripherals */
 	tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I)
 	/* TLB-entry PCI IO Space - from sr@denx.de */
 	tlbentry(0xE8000000, SZ_64K, 0xE8000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I)
 	tlbtab_end
 #if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
 	/*
 	 * For NAND booting the first TLB has to be reconfigured to full size
 	 * and with caching disabled after running from RAM!
 	 */
 #define TLB00	TLB0(CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M)
 #define TLB01	TLB1(CONFIG_SYS_BOOT_BASE_ADDR, 1)
 #define TLB02	TLB2(AC_R|AC_W|AC_X|SA_G|SA_I)
 	.globl	reconfig_tlb0
 reconfig_tlb0:
 	sync
 	isync
 	addi	r4,r0,CONFIG_SYS_TLB_FOR_BOOT_FLASH /* TLB entry # */
 	lis	r5,TLB00@h
 	ori	r5,r5,TLB00@l
 	tlbwe	r5,r4,0x0000		/* Save it out */
 	lis	r5,TLB01@h
 	ori	r5,r5,TLB01@l
 	tlbwe	r5,r4,0x0001		/* Save it out */
 	lis	r5,TLB02@h
 	ori	r5,r5,TLB02@l
 	tlbwe	r5,r4,0x0002		/* Save it out */
 	sync
 	isync
 	blr
 #endif

board/amcc/sequoia/sdram.c

Diff comments View file @ d873133

 /*
  * (C) Copyright 2006
  * Sylvie Gohl,             AMCC/IBM, gohl.sylvie@fr.ibm.com
  * Jacqueline Pira-Ferriol, AMCC/IBM, jpira-ferriol@fr.ibm.com
  * Thierry Roman,           AMCC/IBM, thierry_roman@fr.ibm.com
  * Alain Saurel,            AMCC/IBM, alain.saurel@fr.ibm.com
  * Robert Snyder,           AMCC/IBM, rob.snyder@fr.ibm.com
  *
  * (C) Copyright 2006-2007
  * Stefan Roese, DENX Software Engineering, sr@denx.de.
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
  * published by the Free Software Foundation; either version 2 of
  * the License, or (at your option) any later version.
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  * MA 02111-1307 USA
  */
 /* define DEBUG for debug output */
 #undef DEBUG
 #include <common.h>
 #include <asm/processor.h>
 #include <asm/io.h>
 #include <ppc440.h>
 /*-----------------------------------------------------------------------------+
  * Prototypes
  *-----------------------------------------------------------------------------*/
 extern int denali_wait_for_dlllock(void);
 extern void denali_core_search_data_eye(void);
 #if defined(CONFIG_NAND_SPL)
 /* Using cpu/ppc4xx/speed.c to calculate the bus frequency is too big
  * for the 4k NAND boot image so define bus_frequency to 133MHz here
  * which is save for the refresh counter setup.
  */
 #define get_bus_freq(val)	133333333
 #endif
 /*************************************************************************
  *
  * initdram -- 440EPx's DDR controller is a DENALI Core
  *
  ************************************************************************/
 phys_size_t initdram (int board_type)
 {
-#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
+#if !(defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_SYS_RAMBOOT)) || \
+    defined(CONFIG_NAND_SPL)
 	ulong speed = get_bus_freq(0);
 	mtsdram(DDR0_02, 0x00000000);
 	mtsdram(DDR0_00, 0x0000190A);
 	mtsdram(DDR0_01, 0x01000000);
 	mtsdram(DDR0_03, 0x02030602);
 	mtsdram(DDR0_04, 0x0A020200);
 	mtsdram(DDR0_05, 0x02020308);
 	mtsdram(DDR0_06, 0x0102C812);
 	mtsdram(DDR0_07, 0x000D0100);
 	mtsdram(DDR0_08, 0x02430001);
 	mtsdram(DDR0_09, 0x00011D5F);
 	mtsdram(DDR0_10, 0x00000100);
 	mtsdram(DDR0_11, 0x0027C800);
 	mtsdram(DDR0_12, 0x00000003);
 	mtsdram(DDR0_14, 0x00000000);
 	mtsdram(DDR0_17, 0x19000000);
 	mtsdram(DDR0_18, 0x19191919);
 	mtsdram(DDR0_19, 0x19191919);
 	mtsdram(DDR0_20, 0x0B0B0B0B);
 	mtsdram(DDR0_21, 0x0B0B0B0B);
 	mtsdram(DDR0_22, 0x00267F0B);
 	mtsdram(DDR0_23, 0x00000000);
 	mtsdram(DDR0_24, 0x01010002);
 	if (speed > 133333334)
 		mtsdram(DDR0_26, 0x5B26050C);
 	else
 		mtsdram(DDR0_26, 0x5B260408);
 	mtsdram(DDR0_27, 0x0000682B);
 	mtsdram(DDR0_28, 0x00000000);
 	mtsdram(DDR0_31, 0x00000000);
 	mtsdram(DDR0_42, 0x01000006);
 	mtsdram(DDR0_43, 0x030A0200);
 	mtsdram(DDR0_44, 0x00000003);
 	mtsdram(DDR0_02, 0x00000001);
 	denali_wait_for_dlllock();
 #endif /* #ifndef CONFIG_NAND_U_BOOT */
 #ifdef CONFIG_DDR_DATA_EYE
 	/* -----------------------------------------------------------+
 	 * Perform data eye search if requested.
 	 * ----------------------------------------------------------*/
 	denali_core_search_data_eye();
 #endif
 	/*
 	 * Clear possible errors resulting from data-eye-search.
 	 * If not done, then we could get an interrupt later on when
 	 * exceptions are enabled.
 	 */
 	set_mcsr(get_mcsr());
 	return (CONFIG_SYS_MBYTES_SDRAM << 20);
 }

board/amcc/sequoia/sequoia.c

Diff comments View file @ d873133

 /*
  * (C) Copyright 2006-2009
  * Stefan Roese, DENX Software Engineering, sr@denx.de.
  *
  * (C) Copyright 2006
  * Jacqueline Pira-Ferriol, AMCC/IBM, jpira-ferriol@fr.ibm.com
  * Alain Saurel,	    AMCC/IBM, alain.saurel@fr.ibm.com
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
  * published by the Free Software Foundation; either version 2 of
  * the License, or (at your option) any later version.
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  * MA 02111-1307 USA
  */
 #include <common.h>
 #include <libfdt.h>
 #include <fdt_support.h>
 #include <ppc4xx.h>
 #include <asm/gpio.h>
 #include <asm/processor.h>
 #include <asm/io.h>
 #include <asm/bitops.h>
 DECLARE_GLOBAL_DATA_PTR;
+#if !defined(CONFIG_SYS_NO_FLASH)
 extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
+#endif
 extern void __ft_board_setup(void *blob, bd_t *bd);
 ulong flash_get_size(ulong base, int banknum);
 int board_early_init_f(void)
 {
 	u32 sdr0_cust0;
 	u32 sdr0_pfc1, sdr0_pfc2;
 	u32 reg;
 	mtdcr(ebccfga, xbcfg);
 	mtdcr(ebccfgd, 0xb8400000);
 	/*
 	 * Setup the interrupt controller polarities, triggers, etc.
 	 */
 	mtdcr(uic0sr, 0xffffffff);	/* clear all */
 	mtdcr(uic0er, 0x00000000);	/* disable all */
 	mtdcr(uic0cr, 0x00000005);	/* ATI & UIC1 crit are critical */
 	mtdcr(uic0pr, 0xfffff7ff);	/* per ref-board manual */
 	mtdcr(uic0tr, 0x00000000);	/* per ref-board manual */
 	mtdcr(uic0vr, 0x00000000);	/* int31 highest, base=0x000 */
 	mtdcr(uic0sr, 0xffffffff);	/* clear all */
 	mtdcr(uic1sr, 0xffffffff);	/* clear all */
 	mtdcr(uic1er, 0x00000000);	/* disable all */
 	mtdcr(uic1cr, 0x00000000);	/* all non-critical */
 	mtdcr(uic1pr, 0xffffffff);	/* per ref-board manual */
 	mtdcr(uic1tr, 0x00000000);	/* per ref-board manual */
 	mtdcr(uic1vr, 0x00000000);	/* int31 highest, base=0x000 */
 	mtdcr(uic1sr, 0xffffffff);	/* clear all */
 	mtdcr(uic2sr, 0xffffffff);	/* clear all */
 	mtdcr(uic2er, 0x00000000);	/* disable all */
 	mtdcr(uic2cr, 0x00000000);	/* all non-critical */
 	mtdcr(uic2pr, 0xffffffff);	/* per ref-board manual */
 	mtdcr(uic2tr, 0x00000000);	/* per ref-board manual */
 	mtdcr(uic2vr, 0x00000000);	/* int31 highest, base=0x000 */
 	mtdcr(uic2sr, 0xffffffff);	/* clear all */
 	/* 50MHz tmrclk */
 	out_8((u8 *) CONFIG_SYS_BCSR_BASE + 0x04, 0x00);
 	/* clear write protects */
 	out_8((u8 *) CONFIG_SYS_BCSR_BASE + 0x07, 0x00);
 	/* enable Ethernet */
 	out_8((u8 *) CONFIG_SYS_BCSR_BASE + 0x08, 0x00);
 	/* enable USB device */
 	out_8((u8 *) CONFIG_SYS_BCSR_BASE + 0x09, 0x20);
 	/* select Ethernet (and optionally IIC1) pins */
 	mfsdr(SDR0_PFC1, sdr0_pfc1);
 	sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_SELECT_MASK) |
 		SDR0_PFC1_SELECT_CONFIG_4;
 #ifdef CONFIG_I2C_MULTI_BUS
 	sdr0_pfc1 |= ((sdr0_pfc1 & ~SDR0_PFC1_SIS_MASK) | SDR0_PFC1_SIS_IIC1_SEL);
 #endif
 	/* Two UARTs, so we need 4-pin mode.  Also, we want CTS/RTS mode. */
 	sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_U0IM_MASK) | SDR0_PFC1_U0IM_4PINS;
 	sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_U0ME_MASK) | SDR0_PFC1_U0ME_CTS_RTS;
 	sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_U1ME_MASK) | SDR0_PFC1_U1ME_CTS_RTS;
 	mfsdr(SDR0_PFC2, sdr0_pfc2);
 	sdr0_pfc2 = (sdr0_pfc2 & ~SDR0_PFC2_SELECT_MASK) |
 		SDR0_PFC2_SELECT_CONFIG_4;
 	mtsdr(SDR0_PFC2, sdr0_pfc2);
 	mtsdr(SDR0_PFC1, sdr0_pfc1);
 	/* PCI arbiter enabled */
 	mfsdr(sdr_pci0, reg);
 	mtsdr(sdr_pci0, 0x80000000 | reg);
 	/* setup NAND FLASH */
 	mfsdr(SDR0_CUST0, sdr0_cust0);
 	sdr0_cust0 = SDR0_CUST0_MUX_NDFC_SEL	|
 		SDR0_CUST0_NDFC_ENABLE		|
 		SDR0_CUST0_NDFC_BW_8_BIT	|
 		SDR0_CUST0_NDFC_ARE_MASK	|
 		(0x80000000 >> (28 + CONFIG_SYS_NAND_CS));
 	mtsdr(SDR0_CUST0, sdr0_cust0);
 	return 0;
 }
 int misc_init_r(void)
 {
+#if !defined(CONFIG_SYS_NO_FLASH)
 	uint pbcr;
 	int size_val = 0;
-	u32 reg;
+#endif
 #ifdef CONFIG_440EPX
 	unsigned long usb2d0cr = 0;
 	unsigned long usb2phy0cr, usb2h0cr = 0;
 	unsigned long sdr0_pfc1;
 	char *act = getenv("usbact");
 #endif
+	u32 reg;
+#if !defined(CONFIG_SYS_NO_FLASH)
 	/* Re-do flash sizing to get full correct info */
 	/* adjust flash start and offset */
 	gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
 	gd->bd->bi_flashoffset = 0;
 #if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
 	mtdcr(ebccfga, pb3cr);
 #else
 	mtdcr(ebccfga, pb0cr);
 #endif
 	pbcr = mfdcr(ebccfgd);
 	size_val = ffs(gd->bd->bi_flashsize) - 21;
 	pbcr = (pbcr & 0x0001ffff) | gd->bd->bi_flashstart | (size_val << 17);
 #if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
 	mtdcr(ebccfga, pb3cr);
 #else
 	mtdcr(ebccfga, pb0cr);
 #endif
 	mtdcr(ebccfgd, pbcr);
 	/*
 	 * Re-check to get correct base address
 	 */
 	flash_get_size(gd->bd->bi_flashstart, 0);
 #ifdef CONFIG_ENV_IS_IN_FLASH
 	/* Monitor protection ON by default */
 	(void)flash_protect(FLAG_PROTECT_SET,
 			    -CONFIG_SYS_MONITOR_LEN,
 			    0xffffffff,
 			    &flash_info[0]);
 	/* Env protection ON by default */
 	(void)flash_protect(FLAG_PROTECT_SET,
 			    CONFIG_ENV_ADDR_REDUND,
 			    CONFIG_ENV_ADDR_REDUND + 2*CONFIG_ENV_SECT_SIZE - 1,
 			    &flash_info[0]);
 #endif
+#endif /* CONFIG_SYS_NO_FLASH */
 	/*
 	 * USB suff...
 	 */
 #ifdef CONFIG_440EPX
 	if (act == NULL || strcmp(act, "hostdev") == 0) {
 		/* SDR Setting */
 		mfsdr(SDR0_PFC1, sdr0_pfc1);
 		mfsdr(SDR0_USB2D0CR, usb2d0cr);
 		mfsdr(SDR0_USB2PHY0CR, usb2phy0cr);
 		mfsdr(SDR0_USB2H0CR, usb2h0cr);
 		usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_XOCLK_MASK;
 		usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_XOCLK_EXTERNAL;
 		usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_WDINT_MASK;
 		usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_WDINT_16BIT_30MHZ;
 		usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DVBUS_MASK;
 		usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PURDIS;
 		usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DWNSTR_MASK;
 		usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_HOST;
 		usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_UTMICN_MASK;
 		usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_HOST;
 		/*
 		 * An 8-bit/60MHz interface is the only possible alternative
 		 * when connecting the Device to the PHY
 		 */
 		usb2h0cr   = usb2h0cr &~SDR0_USB2H0CR_WDINT_MASK;
 		usb2h0cr   = usb2h0cr | SDR0_USB2H0CR_WDINT_16BIT_30MHZ;
 		/*
 		 * To enable the USB 2.0 Device function
 		 * through the UTMI interface
 		 */
 		usb2d0cr = usb2d0cr &~SDR0_USB2D0CR_USB2DEV_EBC_SEL_MASK;
 		usb2d0cr = usb2d0cr | SDR0_USB2D0CR_USB2DEV_SELECTION;
 		sdr0_pfc1 = sdr0_pfc1 &~SDR0_PFC1_UES_MASK;
 		sdr0_pfc1 = sdr0_pfc1 | SDR0_PFC1_UES_USB2D_SEL;
 		mtsdr(SDR0_PFC1, sdr0_pfc1);
 		mtsdr(SDR0_USB2D0CR, usb2d0cr);
 		mtsdr(SDR0_USB2PHY0CR, usb2phy0cr);
 		mtsdr(SDR0_USB2H0CR, usb2h0cr);
 		/*clear resets*/
 		udelay (1000);
 		mtsdr(SDR0_SRST1, 0x00000000);
 		udelay (1000);
 		mtsdr(SDR0_SRST0, 0x00000000);
 		printf("USB:   Host(int phy) Device(ext phy)\n");
 	} else if (strcmp(act, "dev") == 0) {
 		/*-------------------PATCH-------------------------------*/
 		mfsdr(SDR0_USB2PHY0CR, usb2phy0cr);
 		usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_XOCLK_MASK;
 		usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_XOCLK_EXTERNAL;
 		usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DVBUS_MASK;
 		usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PURDIS;
 		usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DWNSTR_MASK;
 		usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_HOST;
 		usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_UTMICN_MASK;
 		usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_HOST;
 		mtsdr(SDR0_USB2PHY0CR, usb2phy0cr);
 		udelay (1000);
 		mtsdr(SDR0_SRST1, 0x672c6000);
 		udelay (1000);
 		mtsdr(SDR0_SRST0, 0x00000080);
 		udelay (1000);
 		mtsdr(SDR0_SRST1, 0x60206000);
 		*(unsigned int *)(0xe0000350) = 0x00000001;
 		udelay (1000);
 		mtsdr(SDR0_SRST1, 0x60306000);
 		/*-------------------PATCH-------------------------------*/
 		/* SDR Setting */
 		mfsdr(SDR0_USB2PHY0CR, usb2phy0cr);
 		mfsdr(SDR0_USB2H0CR, usb2h0cr);
 		mfsdr(SDR0_USB2D0CR, usb2d0cr);
 		mfsdr(SDR0_PFC1, sdr0_pfc1);
 		usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_XOCLK_MASK;
 		usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_XOCLK_EXTERNAL;
 		usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_WDINT_MASK;
 		usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_WDINT_8BIT_60MHZ;
 		usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DVBUS_MASK;
 		usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PUREN;
 		usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DWNSTR_MASK;
 		usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_DEV;
 		usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_UTMICN_MASK;
 		usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_DEV;
 		usb2h0cr   = usb2h0cr &~SDR0_USB2H0CR_WDINT_MASK;
 		usb2h0cr   = usb2h0cr | SDR0_USB2H0CR_WDINT_8BIT_60MHZ;
 		usb2d0cr = usb2d0cr &~SDR0_USB2D0CR_USB2DEV_EBC_SEL_MASK;
 		usb2d0cr = usb2d0cr | SDR0_USB2D0CR_EBC_SELECTION;
 		sdr0_pfc1 = sdr0_pfc1 &~SDR0_PFC1_UES_MASK;
 		sdr0_pfc1 = sdr0_pfc1 | SDR0_PFC1_UES_EBCHR_SEL;
 		mtsdr(SDR0_USB2H0CR, usb2h0cr);
 		mtsdr(SDR0_USB2PHY0CR, usb2phy0cr);
 		mtsdr(SDR0_USB2D0CR, usb2d0cr);
 		mtsdr(SDR0_PFC1, sdr0_pfc1);
 		/* clear resets */
 		udelay (1000);
 		mtsdr(SDR0_SRST1, 0x00000000);
 		udelay (1000);
 		mtsdr(SDR0_SRST0, 0x00000000);
 		printf("USB:   Device(int phy)\n");
 	}
 #endif /* CONFIG_440EPX */
 	mfsdr(SDR0_SRST1, reg);		/* enable security/kasumi engines */
 	reg &= ~(SDR0_SRST1_CRYP0 | SDR0_SRST1_KASU0);
 	mtsdr(SDR0_SRST1, reg);
 	/*
 	 * Clear PLB4A0_ACR[WRP]
 	 * This fix will make the MAL burst disabling patch for the Linux
 	 * EMAC driver obsolete.
 	 */
 	reg = mfdcr(plb4_acr) & ~PLB4_ACR_WRP;
 	mtdcr(plb4_acr, reg);
 	return 0;
 }
 int checkboard(void)
 {
 	char *s = getenv("serial#");
 	u8 rev;
 	u8 val;
 #ifdef CONFIG_440EPX
 	printf("Board: Sequoia - AMCC PPC440EPx Evaluation Board");
 #else
 	printf("Board: Rainier - AMCC PPC440GRx Evaluation Board");
 #endif
 	rev = in_8((void *)(CONFIG_SYS_BCSR_BASE + 0));
 	val = in_8((void *)(CONFIG_SYS_BCSR_BASE + 5)) & CONFIG_SYS_BCSR5_PCI66EN;
 	printf(", Rev. %X, PCI=%d MHz", rev, val ? 66 : 33);
 	if (s != NULL) {
 		puts(", serial# ");
 		puts(s);
 	}
 	putc('\n');
 	return (0);
 }
 #if defined(CONFIG_PCI) && defined(CONFIG_PCI_PNP)
 /*
  * Assign interrupts to PCI devices.
  */
 void sequoia_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
 {
 	pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, VECNUM_EIRQ2);
 }
 #endif
 /*
  * pci_pre_init
  *
  * This routine is called just prior to registering the hose and gives
  * the board the opportunity to check things. Returning a value of zero
  * indicates that things are bad & PCI initialization should be aborted.
  *
  * Different boards may wish to customize the pci controller structure
  * (add regions, override default access routines, etc) or perform
  * certain pre-initialization actions.
  */
 #if defined(CONFIG_PCI)
 int pci_pre_init(struct pci_controller *hose)
 {
 	unsigned long addr;
 	/*
 	 * Set priority for all PLB3 devices to 0.
 	 * Set PLB3 arbiter to fair mode.
 	 */
 	mfsdr(sdr_amp1, addr);
 	mtsdr(sdr_amp1, (addr & 0x000000FF) | 0x0000FF00);
 	addr = mfdcr(plb3_acr);
 	mtdcr(plb3_acr, addr | 0x80000000);
 	/*
 	 * Set priority for all PLB4 devices to 0.
 	 */
 	mfsdr(sdr_amp0, addr);
 	mtsdr(sdr_amp0, (addr & 0x000000FF) | 0x0000FF00);
 	addr = mfdcr(plb4_acr) | 0xa0000000;	/* Was 0x8---- */
 	mtdcr(plb4_acr, addr);
 	/*
 	 * Set Nebula PLB4 arbiter to fair mode.
 	 */
 	/* Segment0 */
 	addr = (mfdcr(plb0_acr) & ~plb0_acr_ppm_mask) | plb0_acr_ppm_fair;
 	addr = (addr & ~plb0_acr_hbu_mask) | plb0_acr_hbu_enabled;
 	addr = (addr & ~plb0_acr_rdp_mask) | plb0_acr_rdp_4deep;
 	addr = (addr & ~plb0_acr_wrp_mask) | plb0_acr_wrp_2deep;
 	mtdcr(plb0_acr, addr);
 	/* Segment1 */
 	addr = (mfdcr(plb1_acr) & ~plb1_acr_ppm_mask) | plb1_acr_ppm_fair;
 	addr = (addr & ~plb1_acr_hbu_mask) | plb1_acr_hbu_enabled;
 	addr = (addr & ~plb1_acr_rdp_mask) | plb1_acr_rdp_4deep;
 	addr = (addr & ~plb1_acr_wrp_mask) | plb1_acr_wrp_2deep;
 	mtdcr(plb1_acr, addr);
 #ifdef CONFIG_PCI_PNP
 	hose->fixup_irq = sequoia_pci_fixup_irq;
 #endif
 	return 1;
 }
 #endif /* defined(CONFIG_PCI) */
 /*
  * pci_target_init
  *
  * The bootstrap configuration provides default settings for the pci
  * inbound map (PIM). But the bootstrap config choices are limited and
  * may not be sufficient for a given board.
  */
 #if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
 void pci_target_init(struct pci_controller *hose)
 {
 	/*
 	 * Set up Direct MMIO registers
 	 */
 	/*
 	 * PowerPC440EPX PCI Master configuration.
 	 * Map one 1Gig range of PLB/processor addresses to PCI memory space.
 	 * PLB address 0xA0000000-0xDFFFFFFF
 	 *     ==> PCI address 0xA0000000-0xDFFFFFFF
 	 * Use byte reversed out routines to handle endianess.
 	 * Make this region non-prefetchable.
 	 */
 	out32r(PCIX0_PMM0MA, 0x00000000);	/* PMM0 Mask/Attribute */
 						/* - disabled b4 setting */
 	out32r(PCIX0_PMM0LA, CONFIG_SYS_PCI_MEMBASE);	/* PMM0 Local Address */
 	out32r(PCIX0_PMM0PCILA, CONFIG_SYS_PCI_MEMBASE); /* PMM0 PCI Low Address */
 	out32r(PCIX0_PMM0PCIHA, 0x00000000);	/* PMM0 PCI High Address */
 	out32r(PCIX0_PMM0MA, 0xE0000001);	/* 512M + No prefetching, */
 						/* and enable region */
 	out32r(PCIX0_PMM1MA, 0x00000000);	/* PMM0 Mask/Attribute */
 						/* - disabled b4 setting */
 	out32r(PCIX0_PMM1LA, CONFIG_SYS_PCI_MEMBASE2); /* PMM0 Local Address */
 	out32r(PCIX0_PMM1PCILA, CONFIG_SYS_PCI_MEMBASE2); /* PMM0 PCI Low Address */
 	out32r(PCIX0_PMM1PCIHA, 0x00000000);	/* PMM0 PCI High Address */
 	out32r(PCIX0_PMM1MA, 0xE0000001);	/* 512M + No prefetching, */
 						/* and enable region */
 	out32r(PCIX0_PTM1MS, 0x00000001);	/* Memory Size/Attribute */
 	out32r(PCIX0_PTM1LA, 0);		/* Local Addr. Reg */
 	out32r(PCIX0_PTM2MS, 0);		/* Memory Size/Attribute */
 	out32r(PCIX0_PTM2LA, 0);		/* Local Addr. Reg */
 	/*
 	 * Set up Configuration registers
 	 */
 	/* Program the board's subsystem id/vendor id */
 	pci_write_config_word(0, PCI_SUBSYSTEM_VENDOR_ID,
 			      CONFIG_SYS_PCI_SUBSYS_VENDORID);
 	pci_write_config_word(0, PCI_SUBSYSTEM_ID, CONFIG_SYS_PCI_SUBSYS_ID);
 	/* Configure command register as bus master */
 	pci_write_config_word(0, PCI_COMMAND, PCI_COMMAND_MASTER);
 	/* 240nS PCI clock */
 	pci_write_config_word(0, PCI_LATENCY_TIMER, 1);
 	/* No error reporting */
 	pci_write_config_word(0, PCI_ERREN, 0);
 	pci_write_config_dword(0, PCI_BRDGOPT2, 0x00000101);
 }
 #endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
 #if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT)
 void pci_master_init(struct pci_controller *hose)
 {
 	unsigned short temp_short;
 	/*
 	 * Write the PowerPC440 EP PCI Configuration regs.
 	 * Enable PowerPC440 EP to be a master on the PCI bus (PMM).
 	 * Enable PowerPC440 EP to act as a PCI memory target (PTM).
 	 */
 	pci_read_config_word(0, PCI_COMMAND, &temp_short);
 	pci_write_config_word(0, PCI_COMMAND,
 			      temp_short | PCI_COMMAND_MASTER |
 			      PCI_COMMAND_MEMORY);
 }
 #endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT) */
 /*
  * is_pci_host
  *
  * This routine is called to determine if a pci scan should be
  * performed. With various hardware environments (especially cPCI and
  * PPMC) it's insufficient to depend on the state of the arbiter enable
  * bit in the strap register, or generic host/adapter assumptions.
  *
  * Rather than hard-code a bad assumption in the general 440 code, the
  * 440 pci code requires the board to decide at runtime.
  *
  * Return 0 for adapter mode, non-zero for host (monarch) mode.
  */
 #if defined(CONFIG_PCI)
 int is_pci_host(struct pci_controller *hose)
 {
 	/* Cactus is always configured as host. */
 	return (1);
 }
 #endif /* defined(CONFIG_PCI) */
 #if defined(CONFIG_POST)
 /*
  * Returns 1 if keys pressed to start the power-on long-running tests
  * Called from board_init_f().
  */
 int post_hotkeys_pressed(void)
 {
 	return 0;	/* No hotkeys supported */
 }
 #endif /* CONFIG_POST */
-#if defined(CONFIG_NAND_U_BOOT)
+#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_SYS_RAMBOOT)
 /*
  * On NAND-booting sequoia, we need to patch the chips select numbers
  * in the dtb (CS0 - NAND, CS3 - NOR)
  */
 void ft_board_setup(void *blob, bd_t *bd)
 {
 	int rc;
 	int len;
 	int nodeoffset;
 	struct fdt_property *prop;
 	u32 *reg;
 	char path[32];
 	/* First do common fdt setup */
 	__ft_board_setup(blob, bd);
 	/* And now configure NOR chip select to 3 instead of 0 */
 	strcpy(path, "/plb/opb/ebc/nor_flash@0,0");
 	nodeoffset = fdt_path_offset(blob, path);
 	prop = fdt_get_property_w(blob, nodeoffset, "reg", &len);
 	if (prop == NULL) {
 		printf("Unable to update NOR chip select for NAND booting\n");
 		return;
 	}
 	reg = (u32 *)&prop->data[0];
 	reg[0] = 3;
 	rc = fdt_find_and_setprop(blob, path, "reg", reg, 3 * sizeof(u32), 1);
 	if (rc) {
 		printf("Unable to update property NOR mappings, err=%s\n",
 		       fdt_strerror(rc));
 		return;
 	}
 	/* And now configure NAND chip select to 0 instead of 3 */
 	strcpy(path, "/plb/opb/ebc/ndfc@3,0");
 	nodeoffset = fdt_path_offset(blob, path);
 	prop = fdt_get_property_w(blob, nodeoffset, "reg", &len);
 	if (prop == NULL) {
 		printf("Unable to update NDFC chip select for NAND booting\n");
 		return;
 	}
 	reg = (u32 *)&prop->data[0];
 	reg[0] = 0;
 	rc = fdt_find_and_setprop(blob, path, "reg", reg, 3 * sizeof(u32), 1);
 	if (rc) {
 		printf("Unable to update property NDFC mappings, err=%s\n",
 		       fdt_strerror(rc));
 		return;
 	}
 }
 #endif /* CONFIG_NAND_U_BOOT */

board/amcc/sequoia/u-boot-ram.lds

Diff comments View file @ d873133

File was created	1	/*
	2	* (C) Copyright 2009
	3	* Stefan Roese, DENX Software Engineering, sr@denx.de.
	4	*
	5	* See file CREDITS for list of people who contributed to this
	6	* project.
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License as
	10	* published by the Free Software Foundation; either version 2 of
	11	* the License, or (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	* MA 02111-1307 USA
	22	*/
	23
	24	OUTPUT_ARCH(powerpc)
	25	SECTIONS
	26	{
	27	/* Read-only sections, merged into text segment: */
	28	. = + SIZEOF_HEADERS;
	29	.interp : { *(.interp) }
	30	.hash : { *(.hash) }
	31	.dynsym : { *(.dynsym) }
	32	.dynstr : { *(.dynstr) }
	33	.rel.text : { *(.rel.text) }
	34	.rela.text : { *(.rela.text) }
	35	.rel.data : { *(.rel.data) }
	36	.rela.data : { *(.rela.data) }
	37	.rel.rodata : { *(.rel.rodata) }
	38	.rela.rodata : { *(.rela.rodata) }
	39	.rel.got : { *(.rel.got) }
	40	.rela.got : { *(.rela.got) }
	41	.rel.ctors : { *(.rel.ctors) }
	42	.rela.ctors : { *(.rela.ctors) }
	43	.rel.dtors : { *(.rel.dtors) }
	44	.rela.dtors : { *(.rela.dtors) }
	45	.rel.bss : { *(.rel.bss) }
	46	.rela.bss : { *(.rela.bss) }
	47	.rel.plt : { *(.rel.plt) }
	48	.rela.plt : { *(.rela.plt) }
	49	.init : { *(.init) }
	50	.plt : { *(.plt) }
	51	.text :
	52	{
	53	cpu/ppc4xx/start.o (.text)
	54
	55	*(.text)
	56	*(.fixup)
	57	*(.got1)
	58	}
	59	_etext = .;
	60	PROVIDE (etext = .);
	61	.rodata :
	62	{
	63	(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata)))
	64	}
	65	.fini : { *(.fini) } =0
	66	.ctors : { *(.ctors) }
	67	.dtors : { *(.dtors) }
	68
	69	/* Read-write section, merged into data segment: */
	70	. = (. + 0x00FF) & 0xFFFFFF00;
	71	_erotext = .;
	72	PROVIDE (erotext = .);
	73	.reloc :
	74	{
	75	*(.got)
	76	_GOT2_TABLE_ = .;
	77	*(.got2)
	78	_FIXUP_TABLE_ = .;
	79	*(.fixup)
	80	}
	81	__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
	82	__fixup_entries = (. - _FIXUP_TABLE_)>>2;
	83
	84	.data :
	85	{
	86	*(.data)
	87	*(.data1)
	88	*(.sdata)
	89	*(.sdata2)
	90	*(.dynamic)
	91	CONSTRUCTORS
	92	}
	93	_edata = .;
	94	PROVIDE (edata = .);
	95
	96	. = .;
	97	__u_boot_cmd_start = .;
	98	.u_boot_cmd : { *(.u_boot_cmd) }
	99	__u_boot_cmd_end = .;
	100
	101
	102	. = .;
	103	__start___ex_table = .;
	104	__ex_table : { *(__ex_table) }
	105	__stop___ex_table = .;
	106
	107	. = ALIGN(256);
	108	__init_begin = .;
	109	.text.init : { *(.text.init) }
	110	.data.init : { *(.data.init) }
	111	. = ALIGN(256);
	112	__init_end = .;
	113
	114	__bss_start = .;
	115	.bss (NOLOAD) :
	116	{
	117	(.sbss) (.scommon)
	118	*(.dynbss)
	119	*(.bss)
	120	*(COMMON)
	121	. = ALIGN(4);
	122	}
	123
	124	_end = . ;
	125	PROVIDE (end = .);
	126	}
	127

cpu/ppc4xx/start.S

Diff comments View file @ d873133

 /*
  *  Copyright (C) 1998	Dan Malek <dmalek@jlc.net>
  *  Copyright (C) 1999	Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
  *  Copyright (C) 2000,2001,2002 Wolfgang Denk <wd@denx.de>
  *  Copyright (C) 2007 Stefan Roese <sr@denx.de>, DENX Software Engineering
  *  Copyright (c) 2008 Nuovation System Designs, LLC
  *    Grant Erickson <gerickson@nuovations.com>
  *
  * See file CREDITS for list of people who contributed to this
  * project.
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
  * published by the Free Software Foundation; either version 2 of
  * the License, or (at your option) any later version.
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
  * GNU General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  * MA 02111-1307 USA
  */
 /*------------------------------------------------------------------------------+
  *
  *	 This source code has been made available to you by IBM on an AS-IS
  *	 basis.	 Anyone receiving this source is licensed under IBM
  *	 copyrights to use it in any way he or she deems fit, including
  *	 copying it, modifying it, compiling it, and redistributing it either
  *	 with or without modifications.	 No license under IBM patents or
  *	 patent applications is to be implied by the copyright license.
  *
  *	 Any user of this software should understand that IBM cannot provide
  *	 technical support for this software and will not be responsible for
  *	 any consequences resulting from the use of this software.
  *
  *	 Any person who transfers this source code or any derivative work
  *	 must include the IBM copyright notice, this paragraph, and the
  *	 preceding two paragraphs in the transferred software.
  *
  *	 COPYRIGHT   I B M   CORPORATION 1995
  *	 LICENSED MATERIAL  -  PROGRAM PROPERTY OF I B M
  *-------------------------------------------------------------------------------
  */
 /*  U-Boot - Startup Code for AMCC 4xx PowerPC based Embedded Boards
  *
  *
  *  The processor starts at 0xfffffffc and the code is executed
  *  from flash/rom.
  *  in memory, but as long we don't jump around before relocating.
  *  board_init lies at a quite high address and when the cpu has
  *  jumped there, everything is ok.
  *  This works because the cpu gives the FLASH (CS0) the whole
  *  address space at startup, and board_init lies as a echo of
  *  the flash somewhere up there in the memorymap.
  *
  *  board_init will change CS0 to be positioned at the correct
  *  address and (s)dram will be positioned at address 0
  */
 #include <config.h>
 #include <ppc4xx.h>
 #include <timestamp.h>
 #include <version.h>
 #define _LINUX_CONFIG_H 1	/* avoid reading Linux autoconf.h file	*/
 #include <ppc_asm.tmpl>
 #include <ppc_defs.h>
 #include <asm/cache.h>
 #include <asm/mmu.h>
 #include <asm/ppc4xx-isram.h>
 #ifndef	 CONFIG_IDENT_STRING
 #define	 CONFIG_IDENT_STRING ""
 #endif
 #ifdef CONFIG_SYS_INIT_DCACHE_CS
 # if (CONFIG_SYS_INIT_DCACHE_CS == 0)
 #  define PBxAP pb0ap
 #  define PBxCR pb0cr
 #  if (defined(CONFIG_SYS_EBC_PB0AP) && defined(CONFIG_SYS_EBC_PB0CR))
 #   define PBxAP_VAL CONFIG_SYS_EBC_PB0AP
 #   define PBxCR_VAL CONFIG_SYS_EBC_PB0CR
 #  endif
 # endif
 # if (CONFIG_SYS_INIT_DCACHE_CS == 1)
 #  define PBxAP pb1ap
 #  define PBxCR pb1cr
 #  if (defined(CONFIG_SYS_EBC_PB1AP) && defined(CONFIG_SYS_EBC_PB1CR))
 #   define PBxAP_VAL CONFIG_SYS_EBC_PB1AP
 #   define PBxCR_VAL CONFIG_SYS_EBC_PB1CR
 #  endif
 # endif
 # if (CONFIG_SYS_INIT_DCACHE_CS == 2)
 #  define PBxAP pb2ap
 #  define PBxCR pb2cr
 #  if (defined(CONFIG_SYS_EBC_PB2AP) && defined(CONFIG_SYS_EBC_PB2CR))
 #   define PBxAP_VAL CONFIG_SYS_EBC_PB2AP
 #   define PBxCR_VAL CONFIG_SYS_EBC_PB2CR
 #  endif
 # endif
 # if (CONFIG_SYS_INIT_DCACHE_CS == 3)
 #  define PBxAP pb3ap
 #  define PBxCR pb3cr
 #  if (defined(CONFIG_SYS_EBC_PB3AP) && defined(CONFIG_SYS_EBC_PB3CR))
 #   define PBxAP_VAL CONFIG_SYS_EBC_PB3AP
 #   define PBxCR_VAL CONFIG_SYS_EBC_PB3CR
 #  endif
 # endif
 # if (CONFIG_SYS_INIT_DCACHE_CS == 4)
 #  define PBxAP pb4ap
 #  define PBxCR pb4cr
 #  if (defined(CONFIG_SYS_EBC_PB4AP) && defined(CONFIG_SYS_EBC_PB4CR))
 #   define PBxAP_VAL CONFIG_SYS_EBC_PB4AP
 #   define PBxCR_VAL CONFIG_SYS_EBC_PB4CR
 #  endif
 # endif
 # if (CONFIG_SYS_INIT_DCACHE_CS == 5)
 #  define PBxAP pb5ap
 #  define PBxCR pb5cr
 #  if (defined(CONFIG_SYS_EBC_PB5AP) && defined(CONFIG_SYS_EBC_PB5CR))
 #   define PBxAP_VAL CONFIG_SYS_EBC_PB5AP
 #   define PBxCR_VAL CONFIG_SYS_EBC_PB5CR
 #  endif
 # endif
 # if (CONFIG_SYS_INIT_DCACHE_CS == 6)
 #  define PBxAP pb6ap
 #  define PBxCR pb6cr
 #  if (defined(CONFIG_SYS_EBC_PB6AP) && defined(CONFIG_SYS_EBC_PB6CR))
 #   define PBxAP_VAL CONFIG_SYS_EBC_PB6AP
 #   define PBxCR_VAL CONFIG_SYS_EBC_PB6CR
 #  endif
 # endif
 # if (CONFIG_SYS_INIT_DCACHE_CS == 7)
 #  define PBxAP pb7ap
 #  define PBxCR pb7cr
 #  if (defined(CONFIG_SYS_EBC_PB7AP) && defined(CONFIG_SYS_EBC_PB7CR))
 #   define PBxAP_VAL CONFIG_SYS_EBC_PB7AP
 #   define PBxCR_VAL CONFIG_SYS_EBC_PB7CR
 #  endif
 # endif
 # ifndef PBxAP_VAL
 #  define PBxAP_VAL	0
 # endif
 # ifndef PBxCR_VAL
 #  define PBxCR_VAL	0
 # endif
 /*
  * Memory Bank x (nothingness) initialization CONFIG_SYS_INIT_RAM_ADDR + 64 MiB
  * used as temporary stack pointer for the primordial stack
  */
 # ifndef CONFIG_SYS_INIT_DCACHE_PBxAR
 #  define CONFIG_SYS_INIT_DCACHE_PBxAR	(EBC_BXAP_BME_DISABLED			| \
 				 EBC_BXAP_TWT_ENCODE(7)			| \
 				 EBC_BXAP_BCE_DISABLE			| \
 				 EBC_BXAP_BCT_2TRANS			| \
 				 EBC_BXAP_CSN_ENCODE(0)			| \
 				 EBC_BXAP_OEN_ENCODE(0)			| \
 				 EBC_BXAP_WBN_ENCODE(0)			| \
 				 EBC_BXAP_WBF_ENCODE(0)			| \
 				 EBC_BXAP_TH_ENCODE(2)			| \
 				 EBC_BXAP_RE_DISABLED			| \
 				 EBC_BXAP_SOR_NONDELAYED		| \
 				 EBC_BXAP_BEM_WRITEONLY			| \
 				 EBC_BXAP_PEN_DISABLED)
 # endif /* CONFIG_SYS_INIT_DCACHE_PBxAR */
 # ifndef CONFIG_SYS_INIT_DCACHE_PBxCR
 #  define CONFIG_SYS_INIT_DCACHE_PBxCR	(EBC_BXCR_BAS_ENCODE(CONFIG_SYS_INIT_RAM_ADDR)	| \
 				 EBC_BXCR_BS_64MB			| \
 				 EBC_BXCR_BU_RW				| \
 				 EBC_BXCR_BW_16BIT)
 # endif /* CONFIG_SYS_INIT_DCACHE_PBxCR */
 # ifndef CONFIG_SYS_INIT_RAM_PATTERN
 #  define CONFIG_SYS_INIT_RAM_PATTERN	0xDEADDEAD
 # endif
 #endif /* CONFIG_SYS_INIT_DCACHE_CS */
 #if (defined(CONFIG_SYS_INIT_RAM_DCACHE) && (CONFIG_SYS_INIT_RAM_END > (4 << 10)))
 #error Only 4k of init-ram is supported - please adjust CONFIG_SYS_INIT_RAM_END!
 #endif
 /*
  * Unless otherwise overriden, enable two 128MB cachable instruction regions
  * at CONFIG_SYS_SDRAM_BASE and another 128MB cacheable instruction region covering
  * NOR flash at CONFIG_SYS_FLASH_BASE. Disable all cacheable data regions.
  */
 #if !defined(CONFIG_SYS_FLASH_BASE)
 /* If not already defined, set it to the "last" 128MByte region */
 # define CONFIG_SYS_FLASH_BASE		0xf8000000
 #endif
 #if !defined(CONFIG_SYS_ICACHE_SACR_VALUE)
 # define CONFIG_SYS_ICACHE_SACR_VALUE		\
 		(PPC_128MB_SACR_VALUE(CONFIG_SYS_SDRAM_BASE + (  0 << 20)) | \
 		 PPC_128MB_SACR_VALUE(CONFIG_SYS_SDRAM_BASE + (128 << 20)) | \
 		 PPC_128MB_SACR_VALUE(CONFIG_SYS_FLASH_BASE))
 #endif /* !defined(CONFIG_SYS_ICACHE_SACR_VALUE) */
 #if !defined(CONFIG_SYS_DCACHE_SACR_VALUE)
 # define CONFIG_SYS_DCACHE_SACR_VALUE		\
 		(0x00000000)
 #endif /* !defined(CONFIG_SYS_DCACHE_SACR_VALUE) */
 #define function_prolog(func_name)	.text; \
 					.align 2; \
 					.globl func_name; \
 					func_name:
 #define function_epilog(func_name)	.type func_name,@function; \
 					.size func_name,.-func_name
 /* We don't want the  MMU yet.
 */
 #undef	MSR_KERNEL
 #define MSR_KERNEL ( MSR_ME  )	/* Machine Check */
 	.extern ext_bus_cntlr_init
 #ifdef CONFIG_NAND_U_BOOT
 	.extern reconfig_tlb0
 #endif
 /*
  * Set up GOT: Global Offset Table
  *
  * Use r14 to access the GOT
  */
 #if !defined(CONFIG_NAND_SPL)
 	START_GOT
 	GOT_ENTRY(_GOT2_TABLE_)
 	GOT_ENTRY(_FIXUP_TABLE_)
 	GOT_ENTRY(_start)
 	GOT_ENTRY(_start_of_vectors)
 	GOT_ENTRY(_end_of_vectors)
 	GOT_ENTRY(transfer_to_handler)
 	GOT_ENTRY(__init_end)
 	GOT_ENTRY(_end)
 	GOT_ENTRY(__bss_start)
 	END_GOT
 #endif /* CONFIG_NAND_SPL */
 #if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
 	/*
 	 * NAND U-Boot image is started from offset 0
 	 */
 	.text
 #if defined(CONFIG_440)
 	bl	reconfig_tlb0
 #endif
 	GET_GOT
 	bl	cpu_init_f	/* run low-level CPU init code	   (from Flash) */
 	bl	board_init_f
 #endif
+#if defined(CONFIG_SYS_RAMBOOT)
+	/*
+	 * 4xx RAM-booting U-Boot image is started from offset 0
+	 */
+	.text
+	bl	_start_440
+#endif
 /*
  * 440 Startup -- on reset only the top 4k of the effective
  * address space is mapped in by an entry in the instruction
  * and data shadow TLB. The .bootpg section is located in the
  * top 4k & does only what's necessary to map in the the rest
  * of the boot rom. Once the boot rom is mapped in we can
  * proceed with normal startup.
  *
  * NOTE: CS0 only covers the top 2MB of the effective address
  * space after reset.
  */
 #if defined(CONFIG_440)
 #if !defined(CONFIG_NAND_SPL)
     .section .bootpg,"ax"
 #endif
     .globl _start_440
 /**************************************************************************/
 _start_440:
 	/*--------------------------------------------------------------------+
 	| 440EPX BUP Change - Hardware team request
 	+--------------------------------------------------------------------*/
 #if defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
 	sync
 	nop
 	nop
 #endif
 	/*----------------------------------------------------------------+
 	| Core bug fix.  Clear the esr
 	+-----------------------------------------------------------------*/
 	li	r0,0
 	mtspr	esr,r0
 	/*----------------------------------------------------------------*/
 	/* Clear and set up some registers. */
 	/*----------------------------------------------------------------*/
 	iccci	r0,r0		/* NOTE: operands not used for 440 */
 	dccci	r0,r0		/* NOTE: operands not used for 440 */
 	sync
 	li	r0,0
 	mtspr	srr0,r0
 	mtspr	srr1,r0
 	mtspr	csrr0,r0
 	mtspr	csrr1,r0
 	/* NOTE: 440GX adds machine check status regs */
 #if defined(CONFIG_440) && !defined(CONFIG_440GP)
 	mtspr	mcsrr0,r0
 	mtspr	mcsrr1,r0
 	mfspr	r1,mcsr
 	mtspr	mcsr,r1
 #endif
 	/*----------------------------------------------------------------*/
 	/* CCR0 init */
 	/*----------------------------------------------------------------*/
 	/* Disable store gathering & broadcast, guarantee inst/data
 	* cache block touch, force load/store alignment
 	* (see errata 1.12: 440_33)
 	*/
 	lis	r1,0x0030	/* store gathering & broadcast disable */
 	ori	r1,r1,0x6000	/* cache touch */
 	mtspr	ccr0,r1
 	/*----------------------------------------------------------------*/
 	/* Initialize debug */
 	/*----------------------------------------------------------------*/
 	mfspr	r1,dbcr0
 	andis.	r1, r1, 0x8000	/* test DBCR0[EDM] bit			*/
 	bne	skip_debug_init	/* if set, don't clear debug register	*/
 	mtspr	dbcr0,r0
 	mtspr	dbcr1,r0
 	mtspr	dbcr2,r0
 	mtspr	iac1,r0
 	mtspr	iac2,r0
 	mtspr	iac3,r0
 	mtspr	dac1,r0
 	mtspr	dac2,r0
 	mtspr	dvc1,r0
 	mtspr	dvc2,r0
 	mfspr	r1,dbsr
 	mtspr	dbsr,r1		/* Clear all valid bits */
 skip_debug_init:
 #if defined (CONFIG_440SPE)
 	/*----------------------------------------------------------------+
 	| Initialize Core Configuration Reg1.
 	| a. ICDPEI: Record even parity. Normal operation.
 	| b. ICTPEI: Record even parity. Normal operation.
 	| c. DCTPEI: Record even parity. Normal operation.
 	| d. DCDPEI: Record even parity. Normal operation.
 	| e. DCUPEI: Record even parity. Normal operation.
 	| f. DCMPEI: Record even parity. Normal operation.
 	| g. FCOM:   Normal operation
 	| h. MMUPEI: Record even parity. Normal operation.
 	| i. FFF:    Flush only as much data as necessary.
 	| j. TCS:    Timebase increments from CPU clock.
 	+-----------------------------------------------------------------*/
 	li	r0,0
 	mtspr	ccr1, r0
 	/*----------------------------------------------------------------+
 	| Reset the timebase.
 	| The previous write to CCR1 sets the timebase source.
 	+-----------------------------------------------------------------*/
 	mtspr	tbl, r0
 	mtspr	tbu, r0
 #endif
 	/*----------------------------------------------------------------*/
 	/* Setup interrupt vectors */
 	/*----------------------------------------------------------------*/
 	mtspr	ivpr,r0		/* Vectors start at 0x0000_0000 */
 	li	r1,0x0100
 	mtspr	ivor0,r1	/* Critical input */
 	li	r1,0x0200
 	mtspr	ivor1,r1	/* Machine check */
 	li	r1,0x0300
 	mtspr	ivor2,r1	/* Data storage */
 	li	r1,0x0400
 	mtspr	ivor3,r1	/* Instruction storage */
 	li	r1,0x0500
 	mtspr	ivor4,r1	/* External interrupt */
 	li	r1,0x0600
 	mtspr	ivor5,r1	/* Alignment */
 	li	r1,0x0700
 	mtspr	ivor6,r1	/* Program check */
 	li	r1,0x0800
 	mtspr	ivor7,r1	/* Floating point unavailable */
 	li	r1,0x0c00
 	mtspr	ivor8,r1	/* System call */
 	li	r1,0x0a00
 	mtspr	ivor9,r1	/* Auxiliary Processor unavailable */
 	li	r1,0x0900
 	mtspr	ivor10,r1	/* Decrementer */
 	li	r1,0x1300
 	mtspr	ivor13,r1	/* Data TLB error */
 	li	r1,0x1400
 	mtspr	ivor14,r1	/* Instr TLB error */
 	li	r1,0x2000
 	mtspr	ivor15,r1	/* Debug */
 	/*----------------------------------------------------------------*/
 	/* Configure cache regions  */
 	/*----------------------------------------------------------------*/
 	mtspr	inv0,r0
 	mtspr	inv1,r0
 	mtspr	inv2,r0
 	mtspr	inv3,r0
 	mtspr	dnv0,r0
 	mtspr	dnv1,r0
 	mtspr	dnv2,r0
 	mtspr	dnv3,r0
 	mtspr	itv0,r0
 	mtspr	itv1,r0
 	mtspr	itv2,r0
 	mtspr	itv3,r0
 	mtspr	dtv0,r0
 	mtspr	dtv1,r0
 	mtspr	dtv2,r0
 	mtspr	dtv3,r0
 	/*----------------------------------------------------------------*/
 	/* Cache victim limits */
 	/*----------------------------------------------------------------*/
 	/* floors 0, ceiling max to use the entire cache -- nothing locked
 	*/
 	lis	r1,0x0001
 	ori	r1,r1,0xf800
 	mtspr	ivlim,r1
 	mtspr	dvlim,r1
 	/*----------------------------------------------------------------+
 	|Initialize MMUCR[STID] = 0.
 	+-----------------------------------------------------------------*/
 	mfspr	r0,mmucr
 	addis	r1,0,0xFFFF
 	ori	r1,r1,0xFF00
 	and	r0,r0,r1
 	mtspr	mmucr,r0
 	/*----------------------------------------------------------------*/
 	/* Clear all TLB entries -- TID = 0, TS = 0 */
 	/*----------------------------------------------------------------*/
 	addis	r0,0,0x0000
 	li	r1,0x003f	/* 64 TLB entries */
 	mtctr	r1
-rsttlb:	tlbwe	r0,r1,0x0000	/* Invalidate all entries (V=0)*/
+	li	r4,0		/* Start with TLB #0 */
-	tlbwe	r0,r1,0x0001
+rsttlb:
-	tlbwe	r0,r1,0x0002
+#ifdef CONFIG_SYS_RAMBOOT
-	subi	r1,r1,0x0001
+	tlbre	r3,r4,0		/* Read contents from TLB word #0 to get EPN */
+	rlwinm.	r3,r3,0,0xfffffc00	/* Mask EPN */
+	beq	tlbnxt		/* Skip EPN=0 TLB, this is the SDRAM TLB */
+#endif
+	tlbwe	r0,r4,0		/* Invalidate all entries (V=0)*/
+	tlbwe	r0,r4,1
+	tlbwe	r0,r4,2
+tlbnxt:	addi	r4,r4,1		/* Next TLB */
 	bdnz	rsttlb
 	/*----------------------------------------------------------------*/
 	/* TLB entry setup -- step thru tlbtab */
 	/*----------------------------------------------------------------*/
 #if defined(CONFIG_440SPE)
 	/*----------------------------------------------------------------*/
 	/* We have different TLB tables for revA and rev B of 440SPe */
 	/*----------------------------------------------------------------*/
 	mfspr	r1, PVR
 	lis	r0,0x5342
 	ori	r0,r0,0x1891
 	cmpw	r7,r1,r0
 	bne	r7,..revA
 	bl	tlbtabB
 	b	..goon
 ..revA:
 	bl	tlbtabA
 ..goon:
 #else
 	bl	tlbtab		/* Get tlbtab pointer */
 #endif
 	mr	r5,r0
 	li	r1,0x003f	/* 64 TLB entries max */
 	mtctr	r1
 	li	r4,0		/* TLB # */
 	addi	r5,r5,-4
-1:	lwzu	r0,4(r5)
+1:
+#ifdef CONFIG_SYS_RAMBOOT
+	tlbre	r3,r4,0		/* Read contents from TLB word #0 */
+	rlwinm.	r3,r3,0,0x00000200	/* Mask V (valid) bit */
+	bne	tlbnx2		/* Skip V=1 TLB, this is the SDRAM TLB */
+#endif
+	lwzu	r0,4(r5)
 	cmpwi	r0,0
 	beq	2f		/* 0 marks end */
 	lwzu	r1,4(r5)
 	lwzu	r2,4(r5)
 	tlbwe	r0,r4,0		/* TLB Word 0 */
 	tlbwe	r1,r4,1		/* TLB Word 1 */
 	tlbwe	r2,r4,2		/* TLB Word 2 */
-	addi	r4,r4,1		/* Next TLB */
+tlbnx2:	addi	r4,r4,1		/* Next TLB */
 	bdnz	1b
 	/*----------------------------------------------------------------*/
 	/* Continue from 'normal' start */
 	/*----------------------------------------------------------------*/
 2:
 	bl	3f
 	b	_start
 3:	li	r0,0
 	mtspr	srr1,r0		/* Keep things disabled for now */
 	mflr	r1
 	mtspr	srr0,r1
 	rfi
 #endif /* CONFIG_440 */
 /*
  * r3 - 1st arg to board_init(): IMMP pointer
  * r4 - 2nd arg to board_init(): boot flag
  */
 #ifndef CONFIG_NAND_SPL
 	.text
 	.long	0x27051956		/* U-Boot Magic Number			*/
 	.globl	version_string
 version_string:
 	.ascii U_BOOT_VERSION
 	.ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
 	.ascii CONFIG_IDENT_STRING, "\0"
 	. = EXC_OFF_SYS_RESET
 	.globl	_start_of_vectors
 _start_of_vectors:
 /* Critical input. */
 	CRIT_EXCEPTION(0x100, CritcalInput, UnknownException)
 #ifdef CONFIG_440
 /* Machine check */
 	MCK_EXCEPTION(0x200, MachineCheck, MachineCheckException)
 #else
 	CRIT_EXCEPTION(0x200, MachineCheck, MachineCheckException)
 #endif /* CONFIG_440 */
 /* Data Storage exception. */
 	STD_EXCEPTION(0x300, DataStorage, UnknownException)
 /* Instruction Storage exception. */
 	STD_EXCEPTION(0x400, InstStorage, UnknownException)
 /* External Interrupt exception. */
 	STD_EXCEPTION(0x500, ExtInterrupt, external_interrupt)
 /* Alignment exception. */
 	. = 0x600
 Alignment:
 	EXCEPTION_PROLOG(SRR0, SRR1)
 	mfspr	r4,DAR
 	stw	r4,_DAR(r21)
 	mfspr	r5,DSISR
 	stw	r5,_DSISR(r21)
 	addi	r3,r1,STACK_FRAME_OVERHEAD
 	li	r20,MSR_KERNEL
 	rlwimi	r20,r23,0,16,16		/* copy EE bit from saved MSR */
 	lwz	r6,GOT(transfer_to_handler)
 	mtlr	r6
 	blrl
 .L_Alignment:
 	.long	AlignmentException - _start + _START_OFFSET
 	.long	int_return - _start + _START_OFFSET
 /* Program check exception */
 	. = 0x700
 ProgramCheck:
 	EXCEPTION_PROLOG(SRR0, SRR1)
 	addi	r3,r1,STACK_FRAME_OVERHEAD
 	li	r20,MSR_KERNEL
 	rlwimi	r20,r23,0,16,16		/* copy EE bit from saved MSR */
 	lwz	r6,GOT(transfer_to_handler)
 	mtlr	r6
 	blrl
 .L_ProgramCheck:
 	.long	ProgramCheckException - _start + _START_OFFSET
 	.long	int_return - _start + _START_OFFSET
 #ifdef CONFIG_440
 	STD_EXCEPTION(0x800, FPUnavailable, UnknownException)
 	STD_EXCEPTION(0x900, Decrementer, DecrementerPITException)
 	STD_EXCEPTION(0xa00, APU, UnknownException)
 #endif
 	STD_EXCEPTION(0xc00, SystemCall, UnknownException)
 #ifdef CONFIG_440
 	STD_EXCEPTION(0x1300, DataTLBError, UnknownException)
 	STD_EXCEPTION(0x1400, InstructionTLBError, UnknownException)
 #else
 	STD_EXCEPTION(0x1000, PIT, DecrementerPITException)
 	STD_EXCEPTION(0x1100, InstructionTLBMiss, UnknownException)
 	STD_EXCEPTION(0x1200, DataTLBMiss, UnknownException)
 #endif
 	CRIT_EXCEPTION(0x2000, DebugBreakpoint, DebugException )
 	.globl	_end_of_vectors
 _end_of_vectors:
 	. = _START_OFFSET
 #endif
 	.globl	_start
 _start:
 /*****************************************************************************/
 #if defined(CONFIG_440)
 	/*----------------------------------------------------------------*/
 	/* Clear and set up some registers. */
 	/*----------------------------------------------------------------*/
 	li	r0,0x0000
 	lis	r1,0xffff
 	mtspr	dec,r0			/* prevent dec exceptions */
 	mtspr	tbl,r0			/* prevent fit & wdt exceptions */
 	mtspr	tbu,r0
 	mtspr	tsr,r1			/* clear all timer exception status */
 	mtspr	tcr,r0			/* disable all */
 	mtspr	esr,r0			/* clear exception syndrome register */
 	mtxer	r0			/* clear integer exception register */
 	/*----------------------------------------------------------------*/
 	/* Debug setup -- some (not very good) ice's need an event*/
 	/* to establish control :-( Define CONFIG_SYS_INIT_DBCR to the dbsr */
 	/* value you need in this case 0x8cff 0000 should do the trick */
 	/*----------------------------------------------------------------*/
 #if defined(CONFIG_SYS_INIT_DBCR)
 	lis	r1,0xffff
 	ori	r1,r1,0xffff
 	mtspr	dbsr,r1			/* Clear all status bits */
 	lis	r0,CONFIG_SYS_INIT_DBCR@h
 	ori	r0,r0,CONFIG_SYS_INIT_DBCR@l
 	mtspr	dbcr0,r0
 	isync
 #endif
 	/*----------------------------------------------------------------*/
 	/* Setup the internal SRAM */
 	/*----------------------------------------------------------------*/
 	li	r0,0
 #ifdef CONFIG_SYS_INIT_RAM_DCACHE
 	/* Clear Dcache to use as RAM */
 	addis	r3,r0,CONFIG_SYS_INIT_RAM_ADDR@h
 	ori	r3,r3,CONFIG_SYS_INIT_RAM_ADDR@l
 	addis	r4,r0,CONFIG_SYS_INIT_RAM_END@h
 	ori	r4,r4,CONFIG_SYS_INIT_RAM_END@l
 	rlwinm. r5,r4,0,27,31
 	rlwinm	r5,r4,27,5,31
 	beq	..d_ran
 	addi	r5,r5,0x0001
 ..d_ran:
 	mtctr	r5
 ..d_ag:
 	dcbz	r0,r3
 	addi	r3,r3,32
 	bdnz	..d_ag
 	/*
 	 * Lock the init-ram/stack in d-cache, so that other regions
 	 * may use d-cache as well
 	 * Note, that this current implementation locks exactly 4k
 	 * of d-cache, so please make sure that you don't define a
 	 * bigger init-ram area. Take a look at the lwmon5 440EPx
 	 * implementation as a reference.
 	 */
 	msync
 	isync
 	/* 8. set TFLOOR/NFLOOR to 8 (-> 8*16*32 bytes locked -> 4k) */
 	lis	r1,0x0201
 	ori	r1,r1,0xf808
 	mtspr	dvlim,r1
 	lis	r1,0x0808
 	ori	r1,r1,0x0808
 	mtspr	dnv0,r1
 	mtspr	dnv1,r1
 	mtspr	dnv2,r1
 	mtspr	dnv3,r1
 	mtspr	dtv0,r1
 	mtspr	dtv1,r1
 	mtspr	dtv2,r1
 	mtspr	dtv3,r1
 	msync
 	isync
 #endif /* CONFIG_SYS_INIT_RAM_DCACHE */
 	/* 440EP & 440GR are only 440er PPC's without internal SRAM */
 #if !defined(CONFIG_440EP) && !defined(CONFIG_440GR)
 	/* not all PPC's have internal SRAM usable as L2-cache */
 #if defined(CONFIG_440GX) || \
     defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
     defined(CONFIG_460SX)
 	mtdcr	L2_CACHE_CFG,r0		/* Ensure L2 Cache is off */
 #elif defined(CONFIG_460EX) || defined(CONFIG_460GT)
 	lis	r1, 0x0000
 	ori	r1,r1,0x0008		/* Set L2_CACHE_CFG[RDBW]=1 */
 	mtdcr	L2_CACHE_CFG,r1
 #endif
 	lis	r2,0x7fff
 	ori	r2,r2,0xffff
 	mfdcr	r1,ISRAM0_DPC
 	and	r1,r1,r2		/* Disable parity check */
 	mtdcr	ISRAM0_DPC,r1
 	mfdcr	r1,ISRAM0_PMEG
 	and	r1,r1,r2		/* Disable pwr mgmt */
 	mtdcr	ISRAM0_PMEG,r1
 	lis	r1,0x8000		/* BAS = 8000_0000 */
 #if defined(CONFIG_440GX) || defined(CONFIG_440SP)
 	ori	r1,r1,0x0980		/* first 64k */
 	mtdcr	ISRAM0_SB0CR,r1
 	lis	r1,0x8001
 	ori	r1,r1,0x0980		/* second 64k */
 	mtdcr	ISRAM0_SB1CR,r1
 	lis	r1, 0x8002
 	ori	r1,r1, 0x0980		/* third 64k */
 	mtdcr	ISRAM0_SB2CR,r1
 	lis	r1, 0x8003
 	ori	r1,r1, 0x0980		/* fourth 64k */
 	mtdcr	ISRAM0_SB3CR,r1
 #elif defined(CONFIG_440SPE) || defined(CONFIG_460EX) || defined(CONFIG_460GT)
 	lis	r1,0x0000		/* BAS = X_0000_0000 */
 	ori	r1,r1,0x0984		/* first 64k */
 	mtdcr	ISRAM0_SB0CR,r1
 	lis	r1,0x0001
 	ori	r1,r1,0x0984		/* second 64k */
 	mtdcr	ISRAM0_SB1CR,r1
 	lis	r1, 0x0002
 	ori	r1,r1, 0x0984		/* third 64k */
 	mtdcr	ISRAM0_SB2CR,r1
 	lis	r1, 0x0003
 	ori	r1,r1, 0x0984		/* fourth 64k */
 	mtdcr	ISRAM0_SB3CR,r1
 #if defined(CONFIG_460EX) || defined(CONFIG_460GT)
 	lis	r2,0x7fff
 	ori	r2,r2,0xffff
 	mfdcr	r1,ISRAM1_DPC
 	and	r1,r1,r2		/* Disable parity check */
 	mtdcr	ISRAM1_DPC,r1
 	mfdcr	r1,ISRAM1_PMEG
 	and	r1,r1,r2		/* Disable pwr mgmt */
 	mtdcr	ISRAM1_PMEG,r1
 	lis	r1,0x0004		/* BAS = 4_0004_0000 */
 	ori	r1,r1,0x0984		/* 64k */
 	mtdcr	ISRAM1_SB0CR,r1
 #endif
 #elif defined(CONFIG_460SX)
 	lis     r1,0x0000               /* BAS = 0000_0000 */
 	ori     r1,r1,0x0B84            /* first 128k */
 	mtdcr   ISRAM0_SB0CR,r1
 	lis     r1,0x0001
 	ori     r1,r1,0x0B84            /* second 128k */
 	mtdcr   ISRAM0_SB1CR,r1
 	lis     r1, 0x0002
 	ori     r1,r1, 0x0B84           /* third 128k */
 	mtdcr   ISRAM0_SB2CR,r1
 	lis     r1, 0x0003
 	ori     r1,r1, 0x0B84           /* fourth 128k */
 	mtdcr   ISRAM0_SB3CR,r1
 #elif defined(CONFIG_440GP)
 	ori	r1,r1,0x0380		/* 8k rw */
 	mtdcr	ISRAM0_SB0CR,r1
 	mtdcr	ISRAM0_SB1CR,r0		/* Disable bank 1 */
 #endif
 #endif /* #if !defined(CONFIG_440EP) && !defined(CONFIG_440GR) */
 	/*----------------------------------------------------------------*/
 	/* Setup the stack in internal SRAM */
 	/*----------------------------------------------------------------*/
 	lis	r1,CONFIG_SYS_INIT_RAM_ADDR@h
 	ori	r1,r1,CONFIG_SYS_INIT_SP_OFFSET@l
 	li	r0,0
 	stwu	r0,-4(r1)
 	stwu	r0,-4(r1)		/* Terminate call chain */
 	stwu	r1,-8(r1)		/* Save back chain and move SP */
 	lis	r0,RESET_VECTOR@h	/* Address of reset vector */
 	ori	r0,r0, RESET_VECTOR@l
 	stwu	r1,-8(r1)		/* Save back chain and move SP */
 	stw	r0,+12(r1)		/* Save return addr (underflow vect) */
 #ifdef CONFIG_NAND_SPL
 	bl	nand_boot_common	/* will not return */
 #else
 	GET_GOT
 	bl	cpu_init_f	/* run low-level CPU init code	   (from Flash) */
 	bl	board_init_f
 #endif
 #endif /* CONFIG_440 */
 /*****************************************************************************/
 #ifdef CONFIG_IOP480
 	/*----------------------------------------------------------------------- */
 	/* Set up some machine state registers. */
 	/*----------------------------------------------------------------------- */
 	addi	r0,r0,0x0000		/* initialize r0 to zero */
 	mtspr	esr,r0			/* clear Exception Syndrome Reg */
 	mttcr	r0			/* timer control register */
 	mtexier r0			/* disable all interrupts */
 	addis	r4,r0,0xFFFF		/* set r4 to 0xFFFFFFFF (status in the */
 	ori	r4,r4,0xFFFF		/* dbsr is cleared by setting bits to 1) */
 	mtdbsr	r4			/* clear/reset the dbsr */
 	mtexisr r4			/* clear all pending interrupts */
 	addis	r4,r0,0x8000
 	mtexier r4			/* enable critical exceptions */
 	addis	r4,r0,0x0000		/* assume 403GCX - enable core clk */
 	ori	r4,r4,0x4020		/* dbling (no harm done on GA and GC */
 	mtiocr	r4			/* since bit not used) & DRC to latch */
 					/* data bus on rising edge of CAS */
 	/*----------------------------------------------------------------------- */
 	/* Clear XER. */
 	/*----------------------------------------------------------------------- */
 	mtxer	r0
 	/*----------------------------------------------------------------------- */
 	/* Invalidate i-cache and d-cache TAG arrays. */
 	/*----------------------------------------------------------------------- */
 	addi	r3,0,1024		/* 1/4 of I-cache size, half of D-cache */
 	addi	r4,0,1024		/* 1/4 of I-cache */
 ..cloop:
 	iccci	0,r3
 	iccci	r4,r3
 	dccci	0,r3
 	addic.	r3,r3,-16		/* move back one cache line */
 	bne	..cloop			/* loop back to do rest until r3 = 0 */
 	/* */
 	/* initialize IOP480 so it can read 1 MB code area for SRAM spaces */
 	/* this requires enabling MA[17..0], by default only MA[12..0] are enabled. */
 	/* */
 	/* first copy IOP480 register base address into r3 */
 	addis	r3,0,0x5000		/* IOP480 register base address hi */
 /*	ori	r3,r3,0x0000		/  IOP480 register base address lo */
 #ifdef CONFIG_ADCIOP
 	/* use r4 as the working variable */
 	/* turn on CS3 (LOCCTL.7) */
 	lwz	r4,0x84(r3)		/* LOCTL is at offset 0x84 */
 	andi.	r4,r4,0xff7f		/* make bit 7 = 0 -- CS3 mode */
 	stw	r4,0x84(r3)		/* LOCTL is at offset 0x84 */
 #endif
 #ifdef CONFIG_DASA_SIM
 	/* use r4 as the working variable */
 	/* turn on MA17 (LOCCTL.7) */
 	lwz	r4,0x84(r3)		/* LOCTL is at offset 0x84 */
 	ori	r4,r4,0x80		/* make bit 7 = 1 -- MA17 mode */
 	stw	r4,0x84(r3)		/* LOCTL is at offset 0x84 */
 #endif
 	/* turn on MA16..13 (LCS0BRD.12 = 0) */
 	lwz	r4,0x100(r3)		/* LCS0BRD is at offset 0x100 */
 	andi.	r4,r4,0xefff		/* make bit 12 = 0 */
 	stw	r4,0x100(r3)		/* LCS0BRD is at offset 0x100 */
 	/* make sure above stores all comlete before going on */
 	sync
 	/* last thing, set local init status done bit (DEVINIT.31) */
 	lwz	r4,0x80(r3)		/* DEVINIT is at offset 0x80 */
 	oris	r4,r4,0x8000		/* make bit 31 = 1 */
 	stw	r4,0x80(r3)		/* DEVINIT is at offset 0x80 */
 	/* clear all pending interrupts and disable all interrupts */
 	li	r4,-1			/* set p1 to 0xffffffff */
 	stw	r4,0x1b0(r3)		/* clear all pending interrupts */
 	stw	r4,0x1b8(r3)		/* clear all pending interrupts */
 	li	r4,0			/* set r4 to 0 */
 	stw	r4,0x1b4(r3)		/* disable all interrupts */
 	stw	r4,0x1bc(r3)		/* disable all interrupts */
 	/* make sure above stores all comlete before going on */
 	sync
 	/* Set-up icache cacheability. */
 	lis	r1, CONFIG_SYS_ICACHE_SACR_VALUE@h
 	ori	r1, r1, CONFIG_SYS_ICACHE_SACR_VALUE@l
 	mticcr	r1
 	isync
 	/* Set-up dcache cacheability. */
 	lis	r1, CONFIG_SYS_DCACHE_SACR_VALUE@h
 	ori	r1, r1, CONFIG_SYS_DCACHE_SACR_VALUE@l
 	mtdccr	r1
 	addis	r1,r0,CONFIG_SYS_INIT_RAM_ADDR@h
 	ori	r1,r1,CONFIG_SYS_INIT_SP_OFFSET /* set up the stack to SDRAM */
 	li	r0, 0			/* Make room for stack frame header and */
 	stwu	r0, -4(r1)		/* clear final stack frame so that	*/
 	stwu	r0, -4(r1)		/* stack backtraces terminate cleanly	*/
 	GET_GOT			/* initialize GOT access			*/
 	bl	board_init_f	/* run first part of init code (from Flash)	*/
 #endif	/* CONFIG_IOP480 */
 /*****************************************************************************/
 #if defined(CONFIG_405GP) || defined(CONFIG_405CR) || \
     defined(CONFIG_405EP) || defined(CONFIG_405EZ) || \
     defined(CONFIG_405EX) || defined(CONFIG_405)
 	/*----------------------------------------------------------------------- */
 	/* Clear and set up some registers. */
 	/*----------------------------------------------------------------------- */
 	addi	r4,r0,0x0000
 #if !defined(CONFIG_405EX)
 	mtspr	sgr,r4
 #else
 	/*
 	 * On 405EX, completely clearing the SGR leads to PPC hangup
 	 * upon PCIe configuration access. The PCIe memory regions
 	 * need to be guarded!
 	 */
 	lis	r3,0x0000
 	ori	r3,r3,0x7FFC
 	mtspr	sgr,r3
 #endif
 	mtspr	dcwr,r4
 	mtesr	r4			/* clear Exception Syndrome Reg */
 	mttcr	r4			/* clear Timer Control Reg */
 	mtxer	r4			/* clear Fixed-Point Exception Reg */
 	mtevpr	r4			/* clear Exception Vector Prefix Reg */
 	addi	r4,r0,(0xFFFF-0x10000)		/* set r4 to 0xFFFFFFFF (status in the */
 					/* dbsr is cleared by setting bits to 1) */
 	mtdbsr	r4			/* clear/reset the dbsr */
 	/* Invalidate the i- and d-caches. */
 	bl	invalidate_icache
 	bl	invalidate_dcache
 	/* Set-up icache cacheability. */
 	lis	r4, CONFIG_SYS_ICACHE_SACR_VALUE@h
 	ori	r4, r4, CONFIG_SYS_ICACHE_SACR_VALUE@l
 	mticcr	r4
 	isync
 	/* Set-up dcache cacheability. */
 	lis	r4, CONFIG_SYS_DCACHE_SACR_VALUE@h
 	ori	r4, r4, CONFIG_SYS_DCACHE_SACR_VALUE@l
 	mtdccr	r4
 #if !(defined(CONFIG_SYS_EBC_PB0AP) && defined(CONFIG_SYS_EBC_PB0CR))\
 				&& !defined (CONFIG_XILINX_405)
 	/*----------------------------------------------------------------------- */
 	/* Tune the speed and size for flash CS0  */
 	/*----------------------------------------------------------------------- */
 	bl	ext_bus_cntlr_init
 #endif
 #if !(defined(CONFIG_SYS_INIT_DCACHE_CS) || defined(CONFIG_SYS_TEMP_STACK_OCM))
 	/*
 	 * For boards that don't have OCM and can't use the data cache
 	 * for their primordial stack, setup stack here directly after the
 	 * SDRAM is initialized in ext_bus_cntlr_init.
 	 */
 	lis	r1, CONFIG_SYS_INIT_RAM_ADDR@h
 	ori	r1,r1,CONFIG_SYS_INIT_SP_OFFSET /* set up the stack in SDRAM */
 	li	r0, 0			/* Make room for stack frame header and */
 	stwu	r0, -4(r1)		/* clear final stack frame so that	*/
 	stwu	r0, -4(r1)		/* stack backtraces terminate cleanly	*/
 	/*
 	 * Set up a dummy frame to store reset vector as return address.
 	 * this causes stack underflow to reset board.
 	 */
 	stwu	r1, -8(r1)		/* Save back chain and move SP */
 	lis	r0, RESET_VECTOR@h	/* Address of reset vector */
 	ori	r0, r0, RESET_VECTOR@l
 	stwu	r1, -8(r1)		/* Save back chain and move SP */
 	stw	r0, +12(r1)		/* Save return addr (underflow vect) */
 #endif /* !(CONFIG_SYS_INIT_DCACHE_CS	|| !CONFIG_SYS_TEM_STACK_OCM) */
 #if defined(CONFIG_405EP)
 	/*----------------------------------------------------------------------- */
 	/* DMA Status, clear to come up clean */
 	/*----------------------------------------------------------------------- */
 	addis	r3,r0, 0xFFFF		/* Clear all existing DMA status */
 	ori	r3,r3, 0xFFFF
 	mtdcr	dmasr, r3
 	bl	ppc405ep_init		/* do ppc405ep specific init */
 #endif /* CONFIG_405EP */
 #if defined(CONFIG_SYS_OCM_DATA_ADDR) && defined(CONFIG_SYS_OCM_DATA_SIZE)
 #if defined(CONFIG_405EZ)
 	/********************************************************************
 	 * Setup OCM - On Chip Memory - PPC405EZ uses OCM Controller V2
 	 *******************************************************************/
 	/*
 	 * We can map the OCM on the PLB3, so map it at
 	 * CONFIG_SYS_OCM_DATA_ADDR + 0x8000
 	 */
 	lis	r3,CONFIG_SYS_OCM_DATA_ADDR@h	/* OCM location */
 	ori	r3,r3,CONFIG_SYS_OCM_DATA_ADDR@l
 	ori	r3,r3,0x0270		/* 16K for Bank 1, R/W/Enable */
 	mtdcr	ocmplb3cr1,r3		/* Set PLB Access */
 	ori	r3,r3,0x4000		/* Add 0x4000 for bank 2 */
 	mtdcr	ocmplb3cr2,r3		/* Set PLB Access */
 	isync
 	lis	r3,CONFIG_SYS_OCM_DATA_ADDR@h	/* OCM location */
 	ori	r3,r3,CONFIG_SYS_OCM_DATA_ADDR@l
 	ori	r3,r3,0x0270		/* 16K for Bank 1, R/W/Enable */
 	mtdcr	ocmdscr1, r3		/* Set Data Side */
 	mtdcr	ocmiscr1, r3		/* Set Instruction Side */
 	ori	r3,r3,0x4000		/* Add 0x4000 for bank 2 */
 	mtdcr	ocmdscr2, r3		/* Set Data Side */
 	mtdcr	ocmiscr2, r3		/* Set Instruction Side */
 	addis	r3,0,0x0800		/* OCM Data Parity Disable - 1 Wait State */
 	mtdcr	ocmdsisdpc,r3
 	isync
 #else /* CONFIG_405EZ */
 	/********************************************************************
 	 * Setup OCM - On Chip Memory
 	 *******************************************************************/
 	/* Setup OCM */
 	lis	r0, 0x7FFF
 	ori	r0, r0, 0xFFFF
 	mfdcr	r3, ocmiscntl		/* get instr-side IRAM config */
 	mfdcr	r4, ocmdscntl		/* get data-side IRAM config */
 	and	r3, r3, r0		/* disable data-side IRAM */
 	and	r4, r4, r0		/* disable data-side IRAM */
 	mtdcr	ocmiscntl, r3		/* set instr-side IRAM config */
 	mtdcr	ocmdscntl, r4		/* set data-side IRAM config */
 	isync
 	lis	r3,CONFIG_SYS_OCM_DATA_ADDR@h	/* OCM location */
 	ori	r3,r3,CONFIG_SYS_OCM_DATA_ADDR@l
 	mtdcr	ocmdsarc, r3
 	addis	r4, 0, 0xC000		/* OCM data area enabled */
 	mtdcr	ocmdscntl, r4
 	isync
 #endif /* CONFIG_405EZ */
 #endif
 	/*----------------------------------------------------------------------- */
 	/* Setup temporary stack in DCACHE or OCM if needed for SDRAM SPD. */
 	/*----------------------------------------------------------------------- */
 #ifdef CONFIG_SYS_INIT_DCACHE_CS
 	li	r4, PBxAP
 	mtdcr	ebccfga, r4
 	lis	r4, CONFIG_SYS_INIT_DCACHE_PBxAR@h
 	ori	r4, r4, CONFIG_SYS_INIT_DCACHE_PBxAR@l
 	mtdcr	ebccfgd, r4
 	addi	r4, 0, PBxCR
 	mtdcr	ebccfga, r4
 	lis	r4, CONFIG_SYS_INIT_DCACHE_PBxCR@h
 	ori	r4, r4, CONFIG_SYS_INIT_DCACHE_PBxCR@l
 	mtdcr	ebccfgd, r4
 	/*
 	 * Enable the data cache for the 128MB storage access control region
 	 * at CONFIG_SYS_INIT_RAM_ADDR.
 	 */
 	mfdccr	r4
 	oris	r4, r4, PPC_128MB_SACR_VALUE(CONFIG_SYS_INIT_RAM_ADDR)@h
 	ori	r4, r4, PPC_128MB_SACR_VALUE(CONFIG_SYS_INIT_RAM_ADDR)@l
 	mtdccr	r4
 	/*
 	 * Preallocate data cache lines to be used to avoid a subsequent
 	 * cache miss and an ensuing machine check exception when exceptions
 	 * are enabled.
 	 */
 	li	r0, 0
 	lis	r3, CONFIG_SYS_INIT_RAM_ADDR@h
 	ori	r3, r3, CONFIG_SYS_INIT_RAM_ADDR@l
 	lis	r4, CONFIG_SYS_INIT_RAM_END@h
 	ori	r4, r4, CONFIG_SYS_INIT_RAM_END@l
 	/*
 	 * Convert the size, in bytes, to the number of cache lines/blocks
 	 * to preallocate.
 	 */
 	clrlwi. r5, r4, (32 - L1_CACHE_SHIFT)
 	srwi	r5, r4, L1_CACHE_SHIFT
 	beq	..load_counter
 	addi	r5, r5, 0x0001
 ..load_counter:
 	mtctr	r5
 	/* Preallocate the computed number of cache blocks. */
 ..alloc_dcache_block:
 	dcba	r0, r3
 	addi	r3, r3, L1_CACHE_BYTES
 	bdnz	..alloc_dcache_block
 	sync
 	/*
 	 * Load the initial stack pointer and data area and convert the size,
 	 * in bytes, to the number of words to initialize to a known value.
 	 */
 	lis	r1, CONFIG_SYS_INIT_RAM_ADDR@h
 	ori	r1, r1, CONFIG_SYS_INIT_SP_OFFSET@l
 	lis	r4, (CONFIG_SYS_INIT_RAM_END >> 2)@h
 	ori	r4, r4, (CONFIG_SYS_INIT_RAM_END >> 2)@l
 	mtctr	r4
 	lis	r2, CONFIG_SYS_INIT_RAM_ADDR@h
 	ori	r2, r2, CONFIG_SYS_INIT_RAM_END@l
 	lis	r4, CONFIG_SYS_INIT_RAM_PATTERN@h
 	ori	r4, r4, CONFIG_SYS_INIT_RAM_PATTERN@l
 ..stackloop:
 	stwu	r4, -4(r2)
 	bdnz	..stackloop
 	/*
 	 * Make room for stack frame header and clear final stack frame so
 	 * that stack backtraces terminate cleanly.
 	 */
 	stwu	r0, -4(r1)
 	stwu	r0, -4(r1)
 	/*
 	 * Set up a dummy frame to store reset vector as return address.
 	 * this causes stack underflow to reset board.
 	 */
 	stwu	r1, -8(r1)		/* Save back chain and move SP */
 	addis	r0, 0, RESET_VECTOR@h	/* Address of reset vector */
 	ori	r0, r0, RESET_VECTOR@l
 	stwu	r1, -8(r1)		/* Save back chain and move SP */
 	stw	r0, +12(r1)		/* Save return addr (underflow vect) */
 #elif defined(CONFIG_SYS_TEMP_STACK_OCM) && \
 	(defined(CONFIG_SYS_OCM_DATA_ADDR) && defined(CONFIG_SYS_OCM_DATA_SIZE))
 	/*
 	 * Stack in OCM.
 	 */
 	/* Set up Stack at top of OCM */
 	lis	r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)@h
 	ori	r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)@l
 	/* Set up a zeroized stack frame so that backtrace works right */
 	li	r0, 0
 	stwu	r0, -4(r1)
 	stwu	r0, -4(r1)
 	/*
 	 * Set up a dummy frame to store reset vector as return address.
 	 * this causes stack underflow to reset board.
 	 */
 	stwu	r1, -8(r1)		/* Save back chain and move SP */
 	lis	r0, RESET_VECTOR@h	/* Address of reset vector */
 	ori	r0, r0, RESET_VECTOR@l
 	stwu	r1, -8(r1)		/* Save back chain and move SP */
 	stw	r0, +12(r1)		/* Save return addr (underflow vect) */
 #endif /* CONFIG_SYS_INIT_DCACHE_CS */
 #ifdef CONFIG_NAND_SPL
 	bl	nand_boot_common	/* will not return */
 #else
 	GET_GOT			/* initialize GOT access			*/
 	bl	cpu_init_f	/* run low-level CPU init code	   (from Flash) */
 	/* NEVER RETURNS! */
 	bl	board_init_f	/* run first part of init code (from Flash)	*/
 #endif /* CONFIG_NAND_SPL */
 #endif	/* CONFIG_405GP || CONFIG_405CR || CONFIG_405 || CONFIG_405EP */
 	/*----------------------------------------------------------------------- */
 #ifndef CONFIG_NAND_SPL
 /*
  * This code finishes saving the registers to the exception frame
  * and jumps to the appropriate handler for the exception.
  * Register r21 is pointer into trap frame, r1 has new stack pointer.
  */
 	.globl	transfer_to_handler
 transfer_to_handler:
 	stw	r22,_NIP(r21)
 	lis	r22,MSR_POW@h
 	andc	r23,r23,r22
 	stw	r23,_MSR(r21)
 	SAVE_GPR(7, r21)
 	SAVE_4GPRS(8, r21)
 	SAVE_8GPRS(12, r21)
 	SAVE_8GPRS(24, r21)
 	mflr	r23
 	andi.	r24,r23,0x3f00		/* get vector offset */
 	stw	r24,TRAP(r21)
 	li	r22,0
 	stw	r22,RESULT(r21)
 	mtspr	SPRG2,r22		/* r1 is now kernel sp */
 	lwz	r24,0(r23)		/* virtual address of handler */
 	lwz	r23,4(r23)		/* where to go when done */
 	mtspr	SRR0,r24
 	mtspr	SRR1,r20
 	mtlr	r23
 	SYNC
 	rfi				/* jump to handler, enable MMU */
 int_return:
 	mfmsr	r28		/* Disable interrupts */
 	li	r4,0
 	ori	r4,r4,MSR_EE
 	andc	r28,r28,r4
 	SYNC			/* Some chip revs need this... */
 	mtmsr	r28
 	SYNC
 	lwz	r2,_CTR(r1)
 	lwz	r0,_LINK(r1)
 	mtctr	r2
 	mtlr	r0
 	lwz	r2,_XER(r1)
 	lwz	r0,_CCR(r1)
 	mtspr	XER,r2
 	mtcrf	0xFF,r0
 	REST_10GPRS(3, r1)
 	REST_10GPRS(13, r1)
 	REST_8GPRS(23, r1)
 	REST_GPR(31, r1)
 	lwz	r2,_NIP(r1)	/* Restore environment */
 	lwz	r0,_MSR(r1)
 	mtspr	SRR0,r2
 	mtspr	SRR1,r0
 	lwz	r0,GPR0(r1)
 	lwz	r2,GPR2(r1)
 	lwz	r1,GPR1(r1)
 	SYNC
 	rfi
 crit_return:
 	mfmsr	r28		/* Disable interrupts */
 	li	r4,0
 	ori	r4,r4,MSR_EE
 	andc	r28,r28,r4
 	SYNC			/* Some chip revs need this... */
 	mtmsr	r28
 	SYNC
 	lwz	r2,_CTR(r1)
 	lwz	r0,_LINK(r1)
 	mtctr	r2
 	mtlr	r0
 	lwz	r2,_XER(r1)
 	lwz	r0,_CCR(r1)
 	mtspr	XER,r2
 	mtcrf	0xFF,r0
 	REST_10GPRS(3, r1)
 	REST_10GPRS(13, r1)
 	REST_8GPRS(23, r1)
 	REST_GPR(31, r1)
 	lwz	r2,_NIP(r1)	/* Restore environment */
 	lwz	r0,_MSR(r1)
 	mtspr	csrr0,r2
 	mtspr	csrr1,r0
 	lwz	r0,GPR0(r1)
 	lwz	r2,GPR2(r1)
 	lwz	r1,GPR1(r1)
 	SYNC
 	rfci
 #ifdef CONFIG_440
 mck_return:
 	mfmsr	r28		/* Disable interrupts */
 	li	r4,0
 	ori	r4,r4,MSR_EE
 	andc	r28,r28,r4
 	SYNC			/* Some chip revs need this... */
 	mtmsr	r28
 	SYNC
 	lwz	r2,_CTR(r1)
 	lwz	r0,_LINK(r1)
 	mtctr	r2
 	mtlr	r0
 	lwz	r2,_XER(r1)
 	lwz	r0,_CCR(r1)
 	mtspr	XER,r2
 	mtcrf	0xFF,r0
 	REST_10GPRS(3, r1)
 	REST_10GPRS(13, r1)
 	REST_8GPRS(23, r1)
 	REST_GPR(31, r1)
 	lwz	r2,_NIP(r1)	/* Restore environment */
 	lwz	r0,_MSR(r1)
 	mtspr	mcsrr0,r2
 	mtspr	mcsrr1,r0
 	lwz	r0,GPR0(r1)
 	lwz	r2,GPR2(r1)
 	lwz	r1,GPR1(r1)
 	SYNC
 	rfmci
 #endif /* CONFIG_440 */
 	.globl get_pvr
 get_pvr:
 	mfspr	r3, PVR
 	blr
 /*------------------------------------------------------------------------------- */
 /* Function:	 out16 */
 /* Description:	 Output 16 bits */
 /*------------------------------------------------------------------------------- */
 	.globl	out16
 out16:
 	sth	r4,0x0000(r3)
 	blr
 /*------------------------------------------------------------------------------- */
 /* Function:	 out16r */
 /* Description:	 Byte reverse and output 16 bits */
 /*------------------------------------------------------------------------------- */
 	.globl	out16r
 out16r:
 	sthbrx	r4,r0,r3
 	blr
 /*------------------------------------------------------------------------------- */
 /* Function:	 out32r */
 /* Description:	 Byte reverse and output 32 bits */
 /*------------------------------------------------------------------------------- */
 	.globl	out32r
 out32r:
 	stwbrx	r4,r0,r3
 	blr
 /*------------------------------------------------------------------------------- */
 /* Function:	 in16 */
 /* Description:	 Input 16 bits */
 /*------------------------------------------------------------------------------- */
 	.globl	in16
 in16:
 	lhz	r3,0x0000(r3)
 	blr
 /*------------------------------------------------------------------------------- */
 /* Function:	 in16r */
 /* Description:	 Input 16 bits and byte reverse */
 /*------------------------------------------------------------------------------- */
 	.globl	in16r
 in16r:
 	lhbrx	r3,r0,r3
 	blr
 /*------------------------------------------------------------------------------- */
 /* Function:	 in32r */
 /* Description:	 Input 32 bits and byte reverse */
 /*------------------------------------------------------------------------------- */
 	.globl	in32r
 in32r:
 	lwbrx	r3,r0,r3
 	blr
 /*
  * void relocate_code (addr_sp, gd, addr_moni)
  *
  * This "function" does not return, instead it continues in RAM
  * after relocating the monitor code.
  *
  * r3 = Relocated stack pointer
  * r4 = Relocated global data pointer
  * r5 = Relocated text pointer
  */
 	.globl	relocate_code
 relocate_code:
 #if defined(CONFIG_4xx_DCACHE) || defined(CONFIG_SYS_INIT_DCACHE_CS)
 	/*
 	 * We need to flush the initial global data (gd_t) before the dcache
 	 * will be invalidated.
 	 */
 	/* Save registers */
 	mr	r9, r3
 	mr	r10, r4
 	mr	r11, r5
 	/* Flush initial global data range */
 	mr	r3, r4
 	addi	r4, r4, CONFIG_SYS_GBL_DATA_SIZE@l
 	bl	flush_dcache_range
 #if defined(CONFIG_SYS_INIT_DCACHE_CS)
 	/*
 	 * Undo the earlier data cache set-up for the primordial stack and
 	 * data area. First, invalidate the data cache and then disable data
 	 * cacheability for that area. Finally, restore the EBC values, if
 	 * any.
 	 */
 	/* Invalidate the primordial stack and data area in cache */
 	lis	r3, CONFIG_SYS_INIT_RAM_ADDR@h
 	ori	r3, r3, CONFIG_SYS_INIT_RAM_ADDR@l
 	lis	r4, CONFIG_SYS_INIT_RAM_END@h
 	ori	r4, r4, CONFIG_SYS_INIT_RAM_END@l
 	add	r4, r4, r3
 	bl	invalidate_dcache_range
 	/* Disable cacheability for the region */
 	mfdccr	r3
 	lis     r4, ~PPC_128MB_SACR_VALUE(CONFIG_SYS_INIT_RAM_ADDR)@h
 	ori     r4, r4, ~PPC_128MB_SACR_VALUE(CONFIG_SYS_INIT_RAM_ADDR)@l
 	and     r3, r3, r4
 	mtdccr  r3
 	/* Restore the EBC parameters */
 	li	r3, PBxAP
 	mtdcr	ebccfga, r3
 	lis	r3, PBxAP_VAL@h
 	ori	r3, r3, PBxAP_VAL@l
 	mtdcr	ebccfgd, r3
 	li	r3, PBxCR
 	mtdcr	ebccfga, r3
 	lis	r3, PBxCR_VAL@h
 	ori	r3, r3, PBxCR_VAL@l
 	mtdcr	ebccfgd, r3
 #endif /* defined(CONFIG_SYS_INIT_DCACHE_CS) */
 	/* Restore registers */
 	mr	r3, r9
 	mr	r4, r10
 	mr	r5, r11
 #endif /* defined(CONFIG_4xx_DCACHE) || defined(CONFIG_SYS_INIT_DCACHE_CS) */
 #ifdef CONFIG_SYS_INIT_RAM_DCACHE
 	/*
 	 * Unlock the previously locked d-cache
 	 */
 	msync
 	isync
 	/* set TFLOOR/NFLOOR to 0 again */
 	lis	r6,0x0001
 	ori	r6,r6,0xf800
 	mtspr	dvlim,r6
 	lis	r6,0x0000
 	ori	r6,r6,0x0000
 	mtspr	dnv0,r6
 	mtspr	dnv1,r6
 	mtspr	dnv2,r6
 	mtspr	dnv3,r6
 	mtspr	dtv0,r6
 	mtspr	dtv1,r6
 	mtspr	dtv2,r6
 	mtspr	dtv3,r6
 	msync
 	isync
 #endif /* CONFIG_SYS_INIT_RAM_DCACHE */
 #if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
     defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
     defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
     defined(CONFIG_460EX) || defined(CONFIG_460GT) || \
     defined(CONFIG_460SX)
 	/*
 	 * On some 440er platforms the cache is enabled in the first TLB (Boot-CS)
 	 * to speed up the boot process. Now this cache needs to be disabled.
 	 */
 	iccci	0,0			/* Invalidate inst cache */
 	dccci	0,0			/* Invalidate data cache, now no longer our stack */
 	sync
 	isync
 	/* Clear all potential pending exceptions */
 	mfspr	r1,mcsr
 	mtspr	mcsr,r1
 #ifdef CONFIG_SYS_TLB_FOR_BOOT_FLASH
 	addi	r1,r0,CONFIG_SYS_TLB_FOR_BOOT_FLASH	/* Use defined TLB */
 #else
 	addi	r1,r0,0x0000		/* Default TLB entry is #0 */
 #endif /* CONFIG_SYS_TLB_FOR_BOOT_FLASH */
 	tlbre	r0,r1,0x0002		/* Read contents */
 	ori	r0,r0,0x0c00		/* Or in the inhibit, write through bit */
 	tlbwe	r0,r1,0x0002		/* Save it out */
 	sync
 	isync
 #endif /* defined(CONFIG_440EP) || ... || defined(CONFIG_460GT) */
 	mr	r1,  r3		/* Set new stack pointer		*/
 	mr	r9,  r4		/* Save copy of Init Data pointer	*/
 	mr	r10, r5		/* Save copy of Destination Address	*/
 	mr	r3,  r5				/* Destination Address	*/
 	lis	r4, CONFIG_SYS_MONITOR_BASE@h		/* Source      Address	*/
 	ori	r4, r4, CONFIG_SYS_MONITOR_BASE@l
 	lwz	r5, GOT(__init_end)
 	sub	r5, r5, r4
 	li	r6, L1_CACHE_BYTES		/* Cache Line Size	*/
 	/*
 	 * Fix GOT pointer:
 	 *
 	 * New GOT-PTR = (old GOT-PTR - CONFIG_SYS_MONITOR_BASE) + Destination Address
 	 *
 	 * Offset:
 	 */
 	sub	r15, r10, r4
 	/* First our own GOT */
 	add	r14, r14, r15
 	/* then the one used by the C code */
 	add	r30, r30, r15
 	/*
 	 * Now relocate code
 	 */
 	cmplw	cr1,r3,r4
 	addi	r0,r5,3
 	srwi.	r0,r0,2
 	beq	cr1,4f		/* In place copy is not necessary	*/
 	beq	7f		/* Protect against 0 count		*/
 	mtctr	r0
 	bge	cr1,2f
 	la	r8,-4(r4)
 	la	r7,-4(r3)
 1:	lwzu	r0,4(r8)
 	stwu	r0,4(r7)
 	bdnz	1b
 	b	4f
 2:	slwi	r0,r0,2
 	add	r8,r4,r0
 	add	r7,r3,r0
 3:	lwzu	r0,-4(r8)
 	stwu	r0,-4(r7)
 	bdnz	3b
 /*
  * Now flush the cache: note that we must start from a cache aligned
  * address. Otherwise we might miss one cache line.
  */
 4:	cmpwi	r6,0
 	add	r5,r3,r5
 	beq	7f		/* Always flush prefetch queue in any case */
 	subi	r0,r6,1
 	andc	r3,r3,r0
 	mr	r4,r3
 5:	dcbst	0,r4
 	add	r4,r4,r6
 	cmplw	r4,r5
 	blt	5b
 	sync			/* Wait for all dcbst to complete on bus */
 	mr	r4,r3
 6:	icbi	0,r4
 	add	r4,r4,r6
 	cmplw	r4,r5
 	blt	6b
 7:	sync			/* Wait for all icbi to complete on bus */
 	isync
 /*
  * We are done. Do not return, instead branch to second part of board
  * initialization, now running from RAM.
  */
 	addi	r0, r10, in_ram - _start + _START_OFFSET
 	mtlr	r0
 	blr				/* NEVER RETURNS! */
 in_ram:
 	/*
 	 * Relocation Function, r14 point to got2+0x8000
 	 *
 	 * Adjust got2 pointers, no need to check for 0, this code
 	 * already puts a few entries in the table.
 	 */
 	li	r0,__got2_entries@sectoff@l
 	la	r3,GOT(_GOT2_TABLE_)
 	lwz	r11,GOT(_GOT2_TABLE_)
 	mtctr	r0
 	sub	r11,r3,r11
 	addi	r3,r3,-4
 1:	lwzu	r0,4(r3)
 	add	r0,r0,r11
 	stw	r0,0(r3)
 	bdnz	1b
 	/*
 	 * Now adjust the fixups and the pointers to the fixups
 	 * in case we need to move ourselves again.
 	 */
 2:	li	r0,__fixup_entries@sectoff@l
 	lwz	r3,GOT(_FIXUP_TABLE_)
 	cmpwi	r0,0
 	mtctr	r0
 	addi	r3,r3,-4
 	beq	4f
 3:	lwzu	r4,4(r3)
 	lwzux	r0,r4,r11
 	add	r0,r0,r11
 	stw	r10,0(r3)
 	stw	r0,0(r4)
 	bdnz	3b
 4:
 clear_bss:
 	/*
 	 * Now clear BSS segment
 	 */
 	lwz	r3,GOT(__bss_start)
 	lwz	r4,GOT(_end)
 	cmplw	0, r3, r4
 	beq	7f
 	li	r0, 0
 	andi.	r5, r4, 3
 	beq	6f
 	sub	r4, r4, r5
 	mtctr	r5
 	mr	r5, r4
 5:	stb	r0, 0(r5)
 	addi	r5, r5, 1
 	bdnz	5b
 6:
 	stw	r0, 0(r3)
 	addi	r3, r3, 4
 	cmplw	0, r3, r4
 	bne	6b
 7:
 	mr	r3, r9		/* Init Data pointer		*/
 	mr	r4, r10		/* Destination Address		*/
 	bl	board_init_r
 	/*
 	 * Copy exception vector code to low memory
 	 *
 	 * r3: dest_addr
 	 * r7: source address, r8: end address, r9: target address
 	 */
 	.globl	trap_init
 trap_init:
 	lwz	r7, GOT(_start_of_vectors)
 	lwz	r8, GOT(_end_of_vectors)
 	li	r9, 0x100		/* reset vector always at 0x100 */
 	cmplw	0, r7, r8
 	bgelr				/* return if r7>=r8 - just in case */
 	mflr	r4			/* save link register		*/
 1:
 	lwz	r0, 0(r7)
 	stw	r0, 0(r9)
 	addi	r7, r7, 4
 	addi	r9, r9, 4
 	cmplw	0, r7, r8
 	bne	1b
 	/*
 	 * relocate `hdlr' and `int_return' entries
 	 */
 	li	r7, .L_MachineCheck - _start + _START_OFFSET
 	li	r8, Alignment - _start + _START_OFFSET
 2:
 	bl	trap_reloc
 	addi	r7, r7, 0x100		/* next exception vector */
 	cmplw	0, r7, r8
 	blt	2b
 	li	r7, .L_Alignment - _start + _START_OFFSET
 	bl	trap_reloc
 	li	r7, .L_ProgramCheck - _start + _START_OFFSET
 	bl	trap_reloc
 #ifdef CONFIG_440
 	li	r7, .L_FPUnavailable - _start + _START_OFFSET
 	bl	trap_reloc
 	li	r7, .L_Decrementer - _start + _START_OFFSET
 	bl	trap_reloc
 	li	r7, .L_APU - _start + _START_OFFSET
 	bl	trap_reloc
 	li	r7, .L_InstructionTLBError - _start + _START_OFFSET
 	bl	trap_reloc
 	li	r7, .L_DataTLBError - _start + _START_OFFSET
 	bl	trap_reloc
 #else /* CONFIG_440 */
 	li	r7, .L_PIT - _start + _START_OFFSET
 	bl	trap_reloc
 	li	r7, .L_InstructionTLBMiss - _start + _START_OFFSET
 	bl	trap_reloc
 	li	r7, .L_DataTLBMiss - _start + _START_OFFSET
 	bl	trap_reloc
 #endif /* CONFIG_440 */
 	li	r7, .L_DebugBreakpoint - _start + _START_OFFSET
 	bl	trap_reloc
 #if !defined(CONFIG_440)
 	addi	r7,r0,0x1000		/* set ME bit (Machine Exceptions) */
 	oris	r7,r7,0x0002		/* set CE bit (Critical Exceptions) */
 	mtmsr	r7			/* change MSR */
 #else
 	bl	__440_msr_set
 	b	__440_msr_continue
 __440_msr_set:
 	addi	r7,r0,0x1000		/* set ME bit (Machine Exceptions) */
 	oris	r7,r7,0x0002		/* set CE bit (Critical Exceptions) */
 	mtspr	srr1,r7
 	mflr	r7
 	mtspr	srr0,r7
 	rfi
 __440_msr_continue:
 #endif
 	mtlr	r4			/* restore link register	*/
 	blr
 	/*
 	 * Function: relocate entries for one exception vector
 	 */
 trap_reloc:
 	lwz	r0, 0(r7)		/* hdlr ...			*/
 	add	r0, r0, r3		/*  ... += dest_addr		*/
 	stw	r0, 0(r7)
 	lwz	r0, 4(r7)		/* int_return ...		*/
 	add	r0, r0, r3		/*  ... += dest_addr		*/
 	stw	r0, 4(r7)
 	blr
 #if defined(CONFIG_440)
 /*----------------------------------------------------------------------------+
 | dcbz_area.
 +----------------------------------------------------------------------------*/
 	function_prolog(dcbz_area)
 	rlwinm. r5,r4,0,27,31
 	rlwinm	r5,r4,27,5,31
 	beq	..d_ra2
 	addi	r5,r5,0x0001
 ..d_ra2:mtctr	r5
 ..d_ag2:dcbz	r0,r3
 	addi	r3,r3,32
 	bdnz	..d_ag2
 	sync
 	blr
 	function_epilog(dcbz_area)
 #endif /* CONFIG_440 */
 #endif /* CONFIG_NAND_SPL */
 /*------------------------------------------------------------------------------- */
 /* Function:	 in8 */
 /* Description:	 Input 8 bits */
 /*------------------------------------------------------------------------------- */
 	.globl	in8
 in8:
 	lbz	r3,0x0000(r3)
 	blr
 /*------------------------------------------------------------------------------- */
 /* Function:	 out8 */
 /* Description:	 Output 8 bits */
 /*------------------------------------------------------------------------------- */
 	.globl	out8
 out8:
 	stb	r4,0x0000(r3)
 	blr
 /*------------------------------------------------------------------------------- */
 /* Function:	 out32 */
 /* Description:	 Output 32 bits */
 /*------------------------------------------------------------------------------- */
 	.globl	out32
 out32:
 	stw	r4,0x0000(r3)
 	blr
 /*------------------------------------------------------------------------------- */
 /* Function:	 in32 */
 /* Description:	 Input 32 bits */
 /*------------------------------------------------------------------------------- */
 	.globl	in32
 in32:
 	lwz	3,0x0000(3)
 	blr
 /**************************************************************************/
 /* PPC405EP specific stuff						  */
 /**************************************************************************/
 #ifdef CONFIG_405EP
 ppc405ep_init:
 #ifdef CONFIG_BUBINGA
 	/*
 	 * Initialize EBC chip selects 1 & 4 and GPIO pins (for alternate
 	 * function) to support FPGA and NVRAM accesses below.
 	 */
 	lis	r3,GPIO0_OSRH@h		/* config GPIO output select */
 	ori	r3,r3,GPIO0_OSRH@l
 	lis	r4,CONFIG_SYS_GPIO0_OSRH@h
 	ori	r4,r4,CONFIG_SYS_GPIO0_OSRH@l
 	stw	r4,0(r3)
 	lis	r3,GPIO0_OSRL@h
 	ori	r3,r3,GPIO0_OSRL@l
 	lis	r4,CONFIG_SYS_GPIO0_OSRL@h
 	ori	r4,r4,CONFIG_SYS_GPIO0_OSRL@l
 	stw	r4,0(r3)
 	lis	r3,GPIO0_ISR1H@h	/* config GPIO input select */
 	ori	r3,r3,GPIO0_ISR1H@l
 	lis	r4,CONFIG_SYS_GPIO0_ISR1H@h
 	ori	r4,r4,CONFIG_SYS_GPIO0_ISR1H@l
 	stw	r4,0(r3)
 	lis	r3,GPIO0_ISR1L@h
 	ori	r3,r3,GPIO0_ISR1L@l
 	lis	r4,CONFIG_SYS_GPIO0_ISR1L@h
 	ori	r4,r4,CONFIG_SYS_GPIO0_ISR1L@l
 	stw	r4,0(r3)
 	lis	r3,GPIO0_TSRH@h		/* config GPIO three-state select */
 	ori	r3,r3,GPIO0_TSRH@l
 	lis	r4,CONFIG_SYS_GPIO0_TSRH@h
 	ori	r4,r4,CONFIG_SYS_GPIO0_TSRH@l
 	stw	r4,0(r3)
 	lis	r3,GPIO0_TSRL@h
 	ori	r3,r3,GPIO0_TSRL@l
 	lis	r4,CONFIG_SYS_GPIO0_TSRL@h
 	ori	r4,r4,CONFIG_SYS_GPIO0_TSRL@l
 	stw	r4,0(r3)
 	lis	r3,GPIO0_TCR@h		/* config GPIO driver output enables */
 	ori	r3,r3,GPIO0_TCR@l
 	lis	r4,CONFIG_SYS_GPIO0_TCR@h
 	ori	r4,r4,CONFIG_SYS_GPIO0_TCR@l
 	stw	r4,0(r3)
 	li	r3,pb1ap		/* program EBC bank 1 for RTC access */
 	mtdcr	ebccfga,r3
 	lis	r3,CONFIG_SYS_EBC_PB1AP@h
 	ori	r3,r3,CONFIG_SYS_EBC_PB1AP@l
 	mtdcr	ebccfgd,r3
 	li	r3,pb1cr
 	mtdcr	ebccfga,r3
 	lis	r3,CONFIG_SYS_EBC_PB1CR@h
 	ori	r3,r3,CONFIG_SYS_EBC_PB1CR@l
 	mtdcr	ebccfgd,r3
 	li	r3,pb1ap		/* program EBC bank 1 for RTC access */
 	mtdcr	ebccfga,r3
 	lis	r3,CONFIG_SYS_EBC_PB1AP@h
 	ori	r3,r3,CONFIG_SYS_EBC_PB1AP@l
 	mtdcr	ebccfgd,r3
 	li	r3,pb1cr
 	mtdcr	ebccfga,r3
 	lis	r3,CONFIG_SYS_EBC_PB1CR@h
 	ori	r3,r3,CONFIG_SYS_EBC_PB1CR@l
 	mtdcr	ebccfgd,r3
 	li	r3,pb4ap		/* program EBC bank 4 for FPGA access */
 	mtdcr	ebccfga,r3
 	lis	r3,CONFIG_SYS_EBC_PB4AP@h
 	ori	r3,r3,CONFIG_SYS_EBC_PB4AP@l
 	mtdcr	ebccfgd,r3
 	li	r3,pb4cr
 	mtdcr	ebccfga,r3
 	lis	r3,CONFIG_SYS_EBC_PB4CR@h
 	ori	r3,r3,CONFIG_SYS_EBC_PB4CR@l
 	mtdcr	ebccfgd,r3
 #endif
 	/*
 	!-----------------------------------------------------------------------
 	! Check to see if chip is in bypass mode.
 	! If so, write stored CPC0_PLLMR0 and CPC0_PLLMR1 values and perform a
 	! CPU reset   Otherwise, skip this step and keep going.
 	! Note:	 Running BIOS in bypass mode is not supported since PLB speed
 	!	 will not be fast enough for the SDRAM (min 66MHz)
 	!-----------------------------------------------------------------------
 	*/
 	mfdcr	r5, CPC0_PLLMR1
 	rlwinm	r4,r5,1,0x1		/* get system clock source (SSCS) */
 	cmpi	cr0,0,r4,0x1
 	beq    pll_done			/* if SSCS =b'1' then PLL has */
 					/* already been set */
 					/* and CPU has been reset */
 					/* so skip to next section */
 #ifdef CONFIG_BUBINGA
 	/*
 	!-----------------------------------------------------------------------
 	! Read NVRAM to get value to write in PLLMR.
 	! If value has not been correctly saved, write default value
 	! Default config values (assuming on-board 33MHz SYS_CLK) are above.
 	! See CPU_DEFAULT_200 and CPU_DEFAULT_266 above.
 	!
 	! WARNING:  This code assumes the first three words in the nvram_t
 	!	    structure in openbios.h.  Changing the beginning of
 	!	    the structure will break this code.
 	!
 	!-----------------------------------------------------------------------
 	*/
 	addis	r3,0,NVRAM_BASE@h
 	addi	r3,r3,NVRAM_BASE@l
 	lwz	r4, 0(r3)
 	addis	r5,0,NVRVFY1@h
 	addi	r5,r5,NVRVFY1@l
 	cmp	cr0,0,r4,r5		/* Compare 1st NVRAM Magic number*/
 	bne	..no_pllset
 	addi	r3,r3,4
 	lwz	r4, 0(r3)
 	addis	r5,0,NVRVFY2@h
 	addi	r5,r5,NVRVFY2@l
 	cmp	cr0,0,r4,r5		/* Compare 2 NVRAM Magic number */
 	bne	..no_pllset
 	addi	r3,r3,8			/* Skip over conf_size */
 	lwz	r4, 4(r3)		/* Load PLLMR1 value from NVRAM */
 	lwz	r3, 0(r3)		/* Load PLLMR0 value from NVRAM */
 	rlwinm	r5,r4,1,0x1		/* get system clock source (SSCS) */
 	cmpi	 cr0,0,r5,1		/* See if PLL is locked */
 	beq	pll_write
 ..no_pllset:
 #endif /* CONFIG_BUBINGA */
 #ifdef CONFIG_TAIHU
 	mfdcr	r4, CPC0_BOOT
 	andi.	r5, r4, CPC0_BOOT_SEP@l
 	bne	strap_1			/* serial eeprom present */
 	addis	r5,0,CPLD_REG0_ADDR@h
 	ori	r5,r5,CPLD_REG0_ADDR@l
 	andi.	r5, r5, 0x10
 	bne	_pci_66mhz
 #endif /* CONFIG_TAIHU */
 #if defined(CONFIG_ZEUS)
 	mfdcr	r4, CPC0_BOOT
 	andi.	r5, r4, CPC0_BOOT_SEP@l
 	bne	strap_1			/* serial eeprom present */
 	lis	r3,0x0000
 	addi	r3,r3,0x3030
 	lis	r4,0x8042
 	addi	r4,r4,0x223e
 	b	1f
 strap_1:
 	mfdcr	r3, CPC0_PLLMR0
 	mfdcr	r4, CPC0_PLLMR1
 	b	1f
 #endif
 	addis	r3,0,PLLMR0_DEFAULT@h	/* PLLMR0 default value */
 	ori	r3,r3,PLLMR0_DEFAULT@l	/* */
 	addis	r4,0,PLLMR1_DEFAULT@h	/* PLLMR1 default value */
 	ori	r4,r4,PLLMR1_DEFAULT@l	/* */
 #ifdef CONFIG_TAIHU
 	b	1f
 _pci_66mhz:
 	addis	r3,0,PLLMR0_DEFAULT_PCI66@h
 	ori	r3,r3,PLLMR0_DEFAULT_PCI66@l
 	addis	r4,0,PLLMR1_DEFAULT_PCI66@h
 	ori	r4,r4,PLLMR1_DEFAULT_PCI66@l
 	b	1f
 strap_1:
 	mfdcr	r3, CPC0_PLLMR0
 	mfdcr	r4, CPC0_PLLMR1
 #endif /* CONFIG_TAIHU */
 1:
 	b	pll_write		/* Write the CPC0_PLLMR with new value */
 pll_done:
 	/*
 	!-----------------------------------------------------------------------
 	! Clear Soft Reset Register
 	! This is needed to enable PCI if not booting from serial EPROM
 	!-----------------------------------------------------------------------
 		*/
 	addi	r3, 0, 0x0
 	mtdcr	CPC0_SRR, r3
 	addis	 r3,0,0x0010
 	mtctr	r3
 pci_wait:
 	bdnz	pci_wait
 	blr				/* return to main code */
 /*
 !-----------------------------------------------------------------------------
 ! Function:	pll_write
 ! Description:	Updates the value of the CPC0_PLLMR according to CMOS27E documentation
 !		That is:
 !			  1.  Pll is first disabled (de-activated by putting in bypass mode)
 !			  2.  PLL is reset
 !			  3.  Clock dividers are set while PLL is held in reset and bypassed
 !			  4.  PLL Reset is cleared
 !			  5.  Wait 100us for PLL to lock
 !			  6.  A core reset is performed
 ! Input: r3 = Value to write to CPC0_PLLMR0
 ! Input: r4 = Value to write to CPC0_PLLMR1
 ! Output r3 = none
 !-----------------------------------------------------------------------------
 */
 pll_write:
 	mfdcr  r5, CPC0_UCR
 	andis. r5,r5,0xFFFF
 	ori    r5,r5,0x0101		/* Stop the UART clocks */
 	mtdcr  CPC0_UCR,r5		/* Before changing PLL */
 	mfdcr  r5, CPC0_PLLMR1
 	rlwinm r5,r5,0,0x7FFFFFFF	/* Disable PLL */
 	mtdcr	CPC0_PLLMR1,r5
 	oris   r5,r5,0x4000		/* Set PLL Reset */
 	mtdcr	CPC0_PLLMR1,r5
 	mtdcr	CPC0_PLLMR0,r3		/* Set clock dividers */
 	rlwinm r5,r4,0,0x3FFFFFFF	/* Reset & Bypass new PLL dividers */
 	oris   r5,r5,0x4000		/* Set PLL Reset */
 	mtdcr	CPC0_PLLMR1,r5		/* Set clock dividers */
 	rlwinm r5,r5,0,0xBFFFFFFF	/* Clear PLL Reset */
 	mtdcr	CPC0_PLLMR1,r5
 		/*
 	! Wait min of 100us for PLL to lock.
 	! See CMOS 27E databook for more info.
 	! At 200MHz, that means waiting 20,000 instructions
 		 */
 	addi	r3,0,20000		/* 2000 = 0x4e20 */
 	mtctr	r3
 pll_wait:
 	bdnz	pll_wait
 	oris   r5,r5,0x8000		/* Enable PLL */
 	mtdcr	CPC0_PLLMR1,r5		/* Engage */
 	/*
 	 * Reset CPU to guarantee timings are OK
 	 * Not sure if this is needed...
 	 */
 	addis r3,0,0x1000
 	mtspr dbcr0,r3			/* This will cause a CPU core reset, and */
 					/* execution will continue from the poweron */
 					/* vector of 0xfffffffc */
 #endif /* CONFIG_405EP */
 #if defined(CONFIG_440)
 /*----------------------------------------------------------------------------+
 | mttlb3.
 +----------------------------------------------------------------------------*/
 	function_prolog(mttlb3)
 	TLBWE(4,3,2)
 	blr
 	function_epilog(mttlb3)
 /*----------------------------------------------------------------------------+
 | mftlb3.
 +----------------------------------------------------------------------------*/
 	function_prolog(mftlb3)
 	TLBRE(3,3,2)
 	blr
 	function_epilog(mftlb3)
 /*----------------------------------------------------------------------------+
 | mttlb2.
 +----------------------------------------------------------------------------*/
 	function_prolog(mttlb2)
 	TLBWE(4,3,1)
 	blr
 	function_epilog(mttlb2)
 /*----------------------------------------------------------------------------+
 | mftlb2.
 +----------------------------------------------------------------------------*/
 	function_prolog(mftlb2)
 	TLBRE(3,3,1)
 	blr
 	function_epilog(mftlb2)
 /*----------------------------------------------------------------------------+
 | mttlb1.
 +----------------------------------------------------------------------------*/
 	function_prolog(mttlb1)
 	TLBWE(4,3,0)
 	blr
 	function_epilog(mttlb1)
 /*----------------------------------------------------------------------------+
 | mftlb1.
 +----------------------------------------------------------------------------*/
 	function_prolog(mftlb1)
 	TLBRE(3,3,0)
 	blr
 	function_epilog(mftlb1)
 #endif /* CONFIG_440 */
 #if defined(CONFIG_NAND_SPL)
 /*
  * void nand_boot_relocate(dst, src, bytes)
  *
  * r3 = Destination address to copy code to (in SDRAM)
  * r4 = Source address to copy code from
  * r5 = size to copy in bytes
  */
 nand_boot_relocate:
 	mr	r6,r3
 	mr	r7,r4
 	mflr	r8
 	/*
 	 * Copy SPL from icache into SDRAM
 	 */
 	subi	r3,r3,4
 	subi	r4,r4,4
 	srwi	r5,r5,2
 	mtctr	r5
 ..spl_loop:
 	lwzu	r0,4(r4)
 	stwu	r0,4(r3)
 	bdnz	..spl_loop
 	/*
 	 * Calculate "corrected" link register, so that we "continue"
 	 * in execution in destination range
 	 */
 	sub	r3,r7,r6	/* r3 = src - dst */
 	sub	r8,r8,r3	/* r8 = link-reg - (src - dst) */
 	mtlr	r8
 	blr
 nand_boot_common:
 	/*
 	 * First initialize SDRAM. It has to be available *before* calling
 	 * nand_boot().
 	 */
 	lis	r3,CONFIG_SYS_SDRAM_BASE@h
 	ori	r3,r3,CONFIG_SYS_SDRAM_BASE@l
 	bl	initdram
 	/*
 	 * Now copy the 4k SPL code into SDRAM and continue execution
 	 * from there.
 	 */
 	lis	r3,CONFIG_SYS_NAND_BOOT_SPL_DST@h
 	ori	r3,r3,CONFIG_SYS_NAND_BOOT_SPL_DST@l
 	lis	r4,CONFIG_SYS_NAND_BOOT_SPL_SRC@h
 	ori	r4,r4,CONFIG_SYS_NAND_BOOT_SPL_SRC@l
 	lis	r5,CONFIG_SYS_NAND_BOOT_SPL_SIZE@h
 	ori	r5,r5,CONFIG_SYS_NAND_BOOT_SPL_SIZE@l
 	bl	nand_boot_relocate
 	/*
 	 * We're running from SDRAM now!!!
 	 *
 	 * It is necessary for 4xx systems to relocate from running at
 	 * the original location (0xfffffxxx) to somewhere else (SDRAM
 	 * preferably). This is because CS0 needs to be reconfigured for
 	 * NAND access. And we can't reconfigure this CS when currently
 	 * "running" from it.
 	 */
 	/*
 	 * Finally call nand_boot() to load main NAND U-Boot image from
 	 * NAND and jump to it.
 	 */
 	bl	nand_boot		/* will not return */
 #endif /* CONFIG_NAND_SPL */

include/configs/amcc-common.h

Diff comments View file @ d873133

 /*
  * (C) Copyright 2008
  * Stefan Roese, DENX Software Engineering, sr@denx.de.
  *
  * Common configuration options for all AMCC boards
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
  * published by the Free Software Foundation; either version 2 of
  * the License, or (at your option) any later version.
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  * MA 02111-1307 USA
  */
 #ifndef __AMCC_COMMON_H
 #define __AMCC_COMMON_H
 #define CONFIG_SYS_SDRAM_BASE		0x00000000	/* _must_ be 0		*/
 #define CONFIG_SYS_MONITOR_BASE	TEXT_BASE	/* Start of U-Boot	*/
 #define CONFIG_SYS_MONITOR_LEN		(0xFFFFFFFF - CONFIG_SYS_MONITOR_BASE + 1)
 #define CONFIG_SYS_MALLOC_LEN		(1 << 20)	/* Reserved for malloc	*/
 /*
  * UART
  */
 #define CONFIG_BAUDRATE		115200
 #define CONFIG_SERIAL_MULTI
 #define CONFIG_SYS_BAUDRATE_TABLE  \
     {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
 /*
  * I2C
  */
 #define CONFIG_HARD_I2C			/* I2C with hardware support	*/
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 /*
  * Ethernet/EMAC/PHY
  */
 #define CONFIG_PPC4xx_EMAC
 #define CONFIG_MII			/* MII PHY management		*/
 #define CONFIG_NET_MULTI
 #define CONFIG_NETCONSOLE		/* include NetConsole support	*/
 #if defined(CONFIG_440)
 #define CONFIG_SYS_RX_ETH_BUFFER	32	/* number of eth rx buffers	*/
 #else
 #define CONFIG_SYS_RX_ETH_BUFFER	16	/* number of eth rx buffers	*/
 #endif
 /*
  * Commands
  */
 #include <config_cmd_default.h>
 #define CONFIG_CMD_ASKENV
 #if defined(CONFIG_440)
 #define CONFIG_CMD_CACHE
 #endif
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_DIAG
 #define CONFIG_CMD_EEPROM
 #define CONFIG_CMD_ELF
 #define CONFIG_CMD_I2C
 #define CONFIG_CMD_IRQ
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_NET
 #define CONFIG_CMD_NFS
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_REGINFO
+#if defined(CONFIG_SYS_RAMBOOT)
+/*
+ * Disable NOR FLASH commands on RAM-booting version. One main reason for this
+ * RAM-booting version is boards with NAND and without NOR. This image can
+ * be used for initial NAND programming.
+ */
+#define CONFIG_SYS_NO_FLASH
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_IMLS
+#endif
 /*
  * Miscellaneous configurable options
  */
 #define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds	*/
 #define CONFIG_SYS_LONGHELP			/* undef to save memory		*/
 #define CONFIG_SYS_PROMPT		"=> "	/* Monitor Command Prompt	*/
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size	*/
 #else
 #define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size	*/
 #endif
 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 #define CONFIG_SYS_MAXARGS		16	/* max number of command args	*/
 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size	*/
 #define CONFIG_SYS_MEMTEST_START	0x0400000 /* memtest works on		*/
 #define CONFIG_SYS_MEMTEST_END		0x0C00000 /* 4 ... 12 MB in DRAM	*/
 #define CONFIG_SYS_LOAD_ADDR		0x100000  /* default load address	*/
 #define CONFIG_SYS_EXTBDINFO			/* To use extended board_into (bd_t) */
 #define CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks	*/
 #define CONFIG_CMDLINE_EDITING		/* add command line history	*/
 #define CONFIG_AUTO_COMPLETE		/* add autocompletion support	*/
 #define CONFIG_LOOPW			/* enable loopw command         */
 #define CONFIG_MX_CYCLIC		/* enable mdc/mwc commands      */
 #define CONFIG_ZERO_BOOTDELAY_CHECK	/* check for keypress on bootdelay==0 */
 #define CONFIG_VERSION_VARIABLE 	/* include version env variable */
 #define CONFIG_SYS_CONSOLE_INFO_QUIET		/* don't print console @ startup*/
 #define CONFIG_SYS_HUSH_PARSER			/* Use the HUSH parser		*/
 #ifdef	CONFIG_SYS_HUSH_PARSER
 #define	CONFIG_SYS_PROMPT_HUSH_PS2	"> "
 #endif
 #define CONFIG_LOADS_ECHO		/* echo on for serial download	*/
 #define CONFIG_SYS_LOADS_BAUD_CHANGE		/* allow baudrate change	*/
 /*
  * BOOTP options
  */
 #define CONFIG_BOOTP_BOOTFILESIZE
 #define CONFIG_BOOTP_BOOTPATH
 #define CONFIG_BOOTP_GATEWAY
 #define CONFIG_BOOTP_HOSTNAME
 #define CONFIG_BOOTP_SUBNETMASK
 /*
  * For booting Linux, the board info and command line data
  * have to be in the first 8 MB of memory, since this is
  * the maximum mapped by the Linux kernel during initialization.
  */
 #define CONFIG_SYS_BOOTMAPSZ		(8 << 20) /* Initial Memory map for Linux */
 /*
  * Internal Definitions
  */
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE	230400	/* speed to run kgdb serial port*/
 #define CONFIG_KGDB_SER_INDEX	2	/* which serial port to use	*/
 #endif
 /*
  * Pass open firmware flat tree
  */
 #define CONFIG_OF_LIBFDT
 #define CONFIG_OF_BOARD_SETUP
 /*
  * Booting and default environment
  */
 #define CONFIG_PREBOOT	"echo;"	\
 	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
 	"echo"
 #define CONFIG_BOOTCOMMAND	"run flash_self"
 /*
  * Only very few boards have default console not on ttyS0 (like Taishan)
  */
 #if !defined(CONFIG_USE_TTY)
 #define CONFIG_USE_TTY	ttyS0
 #endif
 /*
  * Only very few boards have default netdev not set to eth0 (like Arches)
  */
 #if !defined(CONFIG_USE_NETDEV)
 #define CONFIG_USE_NETDEV	eth0
 #endif
 /*
  * Only some 4xx PPC's are equipped with an FPU
  */
 #if defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \
     defined(CONFIG_460EX) || defined(CONFIG_460GT)
 #define CONFIG_AMCC_DEF_ENV_ROOTPATH	"rootpath=/opt/eldk/ppc_4xxFP\0"
 #else
 #define CONFIG_AMCC_DEF_ENV_ROOTPATH	"rootpath=/opt/eldk/ppc_4xx\0"
 #endif
 /*
  * Only some boards need to extend the bootargs by some additional
  * parameters (like Makalu)
  */
 #if !defined(CONFIG_ADDMISC)
 #define CONFIG_ADDMISC	"addmisc=setenv bootargs ${bootargs}\0"
 #endif
 #define xstr(s)	str(s)
 #define str(s)	#s
 /*
  * General common environment variables shared on all AMCC eval boards
  */
 #define CONFIG_AMCC_DEF_ENV						\
 	"netdev=" xstr(CONFIG_USE_NETDEV) "\0"				\
 	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
 		"nfsroot=${serverip}:${rootpath}\0"			\
 	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
 	"addip=setenv bootargs ${bootargs} "				\
 		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
 		":${hostname}:${netdev}:off panic=1\0"			\
 	"addtty=setenv bootargs ${bootargs}"				\
 		" console=" xstr(CONFIG_USE_TTY) ",${baudrate}\0"	\
 	CONFIG_ADDMISC							\
 	"initrd_high=30000000\0"					\
 	"kernel_addr_r=400000\0"					\
 	"fdt_addr_r=800000\0"						\
 	"ramdisk_addr_r=C00000\0"					\
 	"hostname=" xstr(CONFIG_HOSTNAME) "\0"				\
 	"bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0"			\
 	"ramdisk_file=" xstr(CONFIG_HOSTNAME) "/uRamdisk\0"		\
 	CONFIG_AMCC_DEF_ENV_ROOTPATH
 /*
  * Default environment for arch/powerpc booting
  * for boards that are ported to arch/powerpc
  */
 #define CONFIG_AMCC_DEF_ENV_POWERPC					\
 	"flash_self=run ramargs addip addtty addmisc;"			\
 		"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0"	\
 	"flash_nfs=run nfsargs addip addtty addmisc;"			\
 		"bootm ${kernel_addr} - ${fdt_addr}\0"			\
 	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; "			\
 		"tftp ${fdt_addr_r} ${fdt_file}; "			\
 		"run nfsargs addip addtty addmisc;"			\
 		"bootm ${kernel_addr_r} - ${fdt_addr_r}\0"		\
 	"net_self_load=tftp ${kernel_addr_r} ${bootfile};"		\
 		"tftp ${fdt_addr_r} ${fdt_file};"			\
 		"tftp ${ramdisk_addr_r} ${ramdisk_file};\0"		\
 	"net_self=run net_self_load;"					\
 		"run ramargs addip addtty addmisc;"			\
 		"bootm ${kernel_addr_r} ${ramdisk_addr_r} ${fdt_addr_r}\0" \
 	"fdt_file=" xstr(CONFIG_HOSTNAME) "/" xstr(CONFIG_HOSTNAME) ".dtb\0"
 /*
  * Default environment for arch/ppc booting,
  * for boards that are not ported to arch/powerpc yet
  */
 #define CONFIG_AMCC_DEF_ENV_PPC						\
 	"flash_self=run ramargs addip addtty addmisc;"			\
 		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
 	"flash_nfs=run nfsargs addip addtty addmisc;"			\
 		"bootm ${kernel_addr}\0"				\
 	"net_nfs=tftp ${kernel_addr_r} ${bootfile};"			\
 		"run nfsargs addip addtty addmisc;"			\
 		"bootm ${kernel_addr_r}\0"
 /*
  * Default environment for arch/ppc booting (old version),
  * for boards that are ported to arch/ppc and arch/powerpc
  */
 #define CONFIG_AMCC_DEF_ENV_PPC_OLD					\
 	"flash_self_old=run ramargs addip addtty addmisc;"		\
 		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
 	"flash_nfs_old=run nfsargs addip addtty addmisc;"		\
 		"bootm ${kernel_addr}\0"				\
 	"net_nfs_old=tftp ${kernel_addr_r} ${bootfile};"		\
 		"run nfsargs addip addtty addmisc;"			\
 		"bootm ${kernel_addr_r}\0"
 #define CONFIG_AMCC_DEF_ENV_NOR_UPD					\
 	"load=tftp 200000 " xstr(CONFIG_HOSTNAME) "/u-boot.bin\0"	\
 	"update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) " FFFFFFFF;"	\
 		"era " xstr(CONFIG_SYS_MONITOR_BASE) " FFFFFFFF;"		\
 		"cp.b ${fileaddr} " xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize};" \
 		"setenv filesize;saveenv\0"				\
 	"upd=run load update\0"						\
 #define CONFIG_AMCC_DEF_ENV_NAND_UPD					\
 	"nload=tftp 200000 " xstr(CONFIG_HOSTNAME) "/u-boot-nand.bin\0"	\
 	"nupdate=nand erase 0 100000;nand write 200000 0 100000;"	\
 		"setenv filesize;saveenv\0"				\
 	"nupd=run nload nupdate\0"
 #endif /* __AMCC_COMMON_H */

include/configs/sequoia.h

Diff comments View file @ d873133

 /*
  * (C) Copyright 2006-2008
  * Stefan Roese, DENX Software Engineering, sr@denx.de.
  *
  * (C) Copyright 2006
  * Jacqueline Pira-Ferriol, AMCC/IBM, jpira-ferriol@fr.ibm.com
  * Alain Saurel,            AMCC/IBM, alain.saurel@fr.ibm.com
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
  * published by the Free Software Foundation; either version 2 of
  * the License, or (at your option) any later version.
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  * MA 02111-1307 USA
  */
 /*
  * sequoia.h - configuration for Sequoia & Rainier boards
  */
 #ifndef __CONFIG_H
 #define __CONFIG_H
 /*
  * High Level Configuration Options
  */
 /* This config file is used for Sequoia (440EPx) and Rainier (440GRx)	*/
 #ifndef CONFIG_RAINIER
 #define CONFIG_440EPX		1	/* Specific PPC440EPx		*/
 #define CONFIG_HOSTNAME		sequoia
 #else
 #define CONFIG_440GRX		1	/* Specific PPC440GRx		*/
 #define CONFIG_HOSTNAME		rainier
 #endif
 #define CONFIG_440		1	/* ... PPC440 family		*/
 #define CONFIG_4xx		1	/* ... PPC4xx family		*/
 /*
  * Include common defines/options for all AMCC eval boards
  */
 #include "amcc-common.h"
 /* Detect Sequoia PLL input clock automatically via CPLD bit		*/
 #define CONFIG_SYS_CLK_FREQ    ((in8(CONFIG_SYS_BCSR_BASE + 3) & 0x80) ? \
 				33333333 : 33000000)
 /*
  * Define this if you want support for video console with radeon 9200 pci card
  * Also set TEXT_BASE to 0xFFF80000 in board/amcc/sequoia/config.mk in this case
  */
 #undef CONFIG_VIDEO
 #ifdef CONFIG_VIDEO
 /*
  * 44x dcache supported is working now on sequoia, but we don't enable
  * it yet since it needs further testing
  */
 #define CONFIG_4xx_DCACHE		/* enable dcache		*/
 #endif
 #define CONFIG_BOARD_EARLY_INIT_F 1	/* Call board_early_init_f	*/
 #define CONFIG_MISC_INIT_R	1	/* Call misc_init_r		*/
 /*
  * Base addresses -- Note these are effective addresses where the actual
  * resources get mapped (not physical addresses).
  */
 #define CONFIG_SYS_TLB_FOR_BOOT_FLASH	0x0003
 #define CONFIG_SYS_BOOT_BASE_ADDR	0xf0000000
 #define CONFIG_SYS_FLASH_BASE		0xfc000000	/* start of FLASH	*/
 #define CONFIG_SYS_NAND_ADDR		0xd0000000	/* NAND Flash		*/
 #define CONFIG_SYS_OCM_BASE		0xe0010000	/* ocm			*/
 #define CONFIG_SYS_OCM_DATA_ADDR	CONFIG_SYS_OCM_BASE
 #define CONFIG_SYS_PCI_BASE		0xe0000000	/* Internal PCI regs	*/
 #define CONFIG_SYS_PCI_MEMBASE		0x80000000	/* mapped pci memory	*/
 #define CONFIG_SYS_PCI_MEMBASE1	CONFIG_SYS_PCI_MEMBASE  + 0x10000000
 #define CONFIG_SYS_PCI_MEMBASE2	CONFIG_SYS_PCI_MEMBASE1 + 0x10000000
 #define CONFIG_SYS_PCI_MEMBASE3	CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
 /* Don't change either of these */
 #define CONFIG_SYS_PERIPHERAL_BASE	0xef600000	/* internal peripherals	*/
 #define CONFIG_SYS_USB2D0_BASE		0xe0000100
 #define CONFIG_SYS_USB_DEVICE		0xe0000000
 #define CONFIG_SYS_USB_HOST		0xe0000400
 #define CONFIG_SYS_BCSR_BASE		0xc0000000
 /*
  * Initial RAM & stack pointer
  */
 /* 440EPx/440GRx have 16KB of internal SRAM, so no need for D-Cache	*/
 #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_OCM_BASE	/* OCM			*/
 #define CONFIG_SYS_INIT_RAM_END	(4 << 10)
 #define CONFIG_SYS_GBL_DATA_SIZE	256	/* num bytes initial data	*/
 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_POST_WORD_ADDR
 /*
  * Serial Port
  */
 #define CONFIG_SYS_EXT_SERIAL_CLOCK	11059200	/* ext. 11.059MHz clk	*/
 /* define this if you want console on UART1 */
 #undef CONFIG_UART1_CONSOLE
 /*
  * Environment
  */
-#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
+#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
-#define CONFIG_ENV_IS_IN_FLASH	1	/* use FLASH for environ vars	*/
+#define CONFIG_ENV_IS_IN_NAND		/* use NAND for environ vars	*/
+#define CONFIG_ENV_IS_EMBEDDED		/* use embedded environment	*/
+#elif defined(CONFIG_SYS_RAMBOOT)
+#define CONFIG_ENV_IS_NOWHERE		/* Store env in memory only	*/
+#define CONFIG_ENV_SIZE		(8 << 10)
+/*
+ * In RAM-booting version, we have no environment storage. So we need to
+ * provide at least preliminary MAC addresses for the 4xx EMAC driver to
+ * register the interfaces. Those two addresses are generated via the
+ * tools/gen_eth_addr tool and should only be used in a closed laboratory
+ * environment.
+ */
+#define	CONFIG_ETHADDR		4a:56:49:22:3e:43
+#define	CONFIG_ETH1ADDR		02:93:53:d5:06:98
 #else
-#define CONFIG_ENV_IS_IN_NAND	1	/* use NAND for environ vars	*/
+#define CONFIG_ENV_IS_IN_FLASH		/* use FLASH for environ vars	*/
-#define CONFIG_ENV_IS_EMBEDDED	1	/* use embedded environment	*/
 #endif
+#if defined(CONFIG_CMD_FLASH)
 /*
  * FLASH related
  */
 #define CONFIG_SYS_FLASH_CFI			/* The flash is CFI compatible	*/
 #define CONFIG_FLASH_CFI_DRIVER		/* Use common CFI driver	*/
 #define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_FLASH_BASE }
 #define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks	      */
 #define CONFIG_SYS_MAX_FLASH_SECT	512	/* max number of sectors on one chip  */
 #define CONFIG_SYS_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)    */
 #define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)    */
 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1	/* use buffered writes (20x faster)   */
 #define CONFIG_SYS_FLASH_PROTECTION	1	/* use hardware flash protection      */
 #define CONFIG_SYS_FLASH_EMPTY_INFO	      /* print 'E' for empty sector on flinfo */
 #define CONFIG_SYS_FLASH_QUIET_TEST	1	/* don't warn upon unknown flash      */
 #ifdef CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_SECT_SIZE	0x20000	/* size of one complete sector	      */
 #define CONFIG_ENV_ADDR		((-CONFIG_SYS_MONITOR_LEN)-CONFIG_ENV_SECT_SIZE)
 #define	CONFIG_ENV_SIZE		0x2000	/* Total Size of Environment Sector   */
 /* Address and size of Redundant Environment Sector	*/
 #define CONFIG_ENV_ADDR_REDUND	(CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
 #define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SIZE)
 #endif
+#endif /* CONFIG_CMD_FLASH */
 /*
  * IPL (Initial Program Loader, integrated inside CPU)
  * Will load first 4k from NAND (SPL) into cache and execute it from there.
  *
  * SPL (Secondary Program Loader)
  * Will load special U-Boot version (NUB) from NAND and execute it. This SPL
  * has to fit into 4kByte. It sets up the CPU and configures the SDRAM
  * controller and the NAND controller so that the special U-Boot image can be
  * loaded from NAND to SDRAM.
  *
  * NUB (NAND U-Boot)
  * This NAND U-Boot (NUB) is a special U-Boot version which can be started
  * from RAM. Therefore it mustn't (re-)configure the SDRAM controller.
  *
  * On 440EPx the SPL is copied to SDRAM before the NAND controller is
  * set up. While still running from cache, I experienced problems accessing
  * the NAND controller.	sr - 2006-08-25
  */
 #define CONFIG_SYS_NAND_BOOT_SPL_SRC	0xfffff000	/* SPL location		      */
 #define CONFIG_SYS_NAND_BOOT_SPL_SIZE	(4 << 10)	/* SPL size		      */
 #define CONFIG_SYS_NAND_BOOT_SPL_DST	(CONFIG_SYS_OCM_BASE + (12 << 10)) /* Copy SPL here  */
 #define CONFIG_SYS_NAND_U_BOOT_DST	0x01000000	/* Load NUB to this addr      */
 #define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_NAND_U_BOOT_DST	/* Start NUB from     */
 							/*   this addr	      */
 #define CONFIG_SYS_NAND_BOOT_SPL_DELTA	(CONFIG_SYS_NAND_BOOT_SPL_SRC - CONFIG_SYS_NAND_BOOT_SPL_DST)
 /*
  * Define the partitioning of the NAND chip (only RAM U-Boot is needed here)
  */
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	(16 << 10)	/* Offset to RAM U-Boot image */
 #define CONFIG_SYS_NAND_U_BOOT_SIZE	(512 << 10)	/* Size of RAM U-Boot image   */
 /*
  * Now the NAND chip has to be defined (no autodetection used!)
  */
 #define CONFIG_SYS_NAND_PAGE_SIZE	512		/* NAND chip page size	      */
 #define CONFIG_SYS_NAND_BLOCK_SIZE	(16 << 10)	/* NAND chip block size	      */
 #define CONFIG_SYS_NAND_PAGE_COUNT	32		/* NAND chip page count	      */
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	5	      /* Location of bad block marker */
 #undef CONFIG_SYS_NAND_4_ADDR_CYCLE		      /* No fourth addr used (<=32MB) */
 #define CONFIG_SYS_NAND_ECCSIZE	256
 #define CONFIG_SYS_NAND_ECCBYTES	3
 #define CONFIG_SYS_NAND_ECCSTEPS	(CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE)
 #define CONFIG_SYS_NAND_OOBSIZE	16
 #define CONFIG_SYS_NAND_ECCTOTAL	(CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS)
 #define CONFIG_SYS_NAND_ECCPOS		{0, 1, 2, 3, 6, 7}
 #ifdef CONFIG_ENV_IS_IN_NAND
 /*
  * For NAND booting the environment is embedded in the U-Boot image. Please take
  * look at the file board/amcc/sequoia/u-boot-nand.lds for details.
  */
 #define CONFIG_ENV_SIZE		CONFIG_SYS_NAND_BLOCK_SIZE
 #define CONFIG_ENV_OFFSET		(CONFIG_SYS_NAND_U_BOOT_OFFS + CONFIG_ENV_SIZE)
 #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
 #endif
 /*
  * DDR SDRAM
  */
 #define CONFIG_SYS_MBYTES_SDRAM        (256)	/* 256MB			*/
-#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
+#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) && \
+    !defined(CONFIG_SYS_RAMBOOT)
 #define CONFIG_DDR_DATA_EYE		/* use DDR2 optimization	*/
 #endif
 #define CONFIG_SYS_MEM_TOP_HIDE	(4 << 10) /* don't use last 4kbytes	*/
 					/* 440EPx errata CHIP 11	*/
 /*
  * I2C
  */
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address	*/
 #define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR	(0xa8>>1)
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
 /* I2C SYSMON (LM75, AD7414 is almost compatible)			*/
 #define CONFIG_DTT_LM75		1	/* ON Semi's LM75		*/
 #define CONFIG_DTT_AD7414	1	/* use AD7414			*/
 #define CONFIG_DTT_SENSORS	{0}	/* Sensor addresses		*/
 #define CONFIG_SYS_DTT_MAX_TEMP	70
 #define CONFIG_SYS_DTT_LOW_TEMP	-30
 #define CONFIG_SYS_DTT_HYSTERESIS	3
 /*
  * Default environment variables
  */
 #define	CONFIG_EXTRA_ENV_SETTINGS					\
 	CONFIG_AMCC_DEF_ENV						\
 	CONFIG_AMCC_DEF_ENV_POWERPC					\
 	CONFIG_AMCC_DEF_ENV_PPC_OLD					\
 	CONFIG_AMCC_DEF_ENV_NOR_UPD					\
 	CONFIG_AMCC_DEF_ENV_NAND_UPD					\
 	"kernel_addr=FC000000\0"					\
 	"ramdisk_addr=FC180000\0"					\
 	""
 #define CONFIG_M88E1111_PHY	1
 #define	CONFIG_IBM_EMAC4_V4	1
 #define CONFIG_PHY_ADDR		0	/* PHY address, See schematics	*/
 #define CONFIG_PHY_RESET        1	/* reset phy upon startup	*/
 #define CONFIG_PHY_GIGE		1	/* Include GbE speed/duplex detection */
 #define CONFIG_HAS_ETH0
 #define CONFIG_HAS_ETH1		1	/* add support for "eth1addr"	*/
 #define CONFIG_PHY1_ADDR	1
 /* USB */
 #ifdef CONFIG_440EPX
 #define CONFIG_USB_OHCI_NEW
 #define CONFIG_USB_STORAGE
 #define CONFIG_SYS_OHCI_BE_CONTROLLER
 #undef CONFIG_SYS_USB_OHCI_BOARD_INIT
 #define CONFIG_SYS_USB_OHCI_CPU_INIT	1
 #define CONFIG_SYS_USB_OHCI_REGS_BASE	CONFIG_SYS_USB_HOST
 #define CONFIG_SYS_USB_OHCI_SLOT_NAME	"ppc440"
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
 /* Comment this out to enable USB 1.1 device */
 #define USB_2_0_DEVICE
 #endif /* CONFIG_440EPX */
 /* Partitions */
 #define CONFIG_MAC_PARTITION
 #define CONFIG_DOS_PARTITION
 #define CONFIG_ISO_PARTITION
 /*
  * Commands additional to the ones defined in amcc-common.h
  */
 #define CONFIG_CMD_DTT
 #define CONFIG_CMD_FAT
 #define CONFIG_CMD_NAND
 #define CONFIG_CMD_PCI
 #define CONFIG_CMD_SDRAM
 #ifdef CONFIG_440EPX
 #define CONFIG_CMD_USB
 #endif
 #ifndef CONFIG_RAINIER
 #define CONFIG_SYS_POST_FPU_ON		CONFIG_SYS_POST_FPU
 #else
 #define CONFIG_SYS_POST_FPU_ON		0
 #endif
 /*
  * Don't run the memory POST on the NAND-booting version. It will
  * overwrite part of the U-Boot image which is already loaded from NAND
  * to SDRAM.
  */
-#if defined(CONFIG_NAND_U_BOOT)
+#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_SYS_RAMBOOT)
 #define CONFIG_SYS_POST_MEMORY_ON	0
 #else
 #define CONFIG_SYS_POST_MEMORY_ON	CONFIG_SYS_POST_MEMORY
 #endif
 /* POST support */
 #define CONFIG_POST		(CONFIG_SYS_POST_CACHE	   | \
 				 CONFIG_SYS_POST_CPU	   | \
 				 CONFIG_SYS_POST_ETHER	   | \
 				 CONFIG_SYS_POST_FPU_ON    | \
 				 CONFIG_SYS_POST_I2C	   | \
 				 CONFIG_SYS_POST_MEMORY_ON | \
 				 CONFIG_SYS_POST_SPR	   | \
 				 CONFIG_SYS_POST_UART)
 #define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
 #define CONFIG_LOGBUFFER
 #define CONFIG_SYS_POST_CACHE_ADDR	0x7fff0000	/* free virtual address     */
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV	/* Otherwise it catches logbuffer as output */
 #define CONFIG_SUPPORT_VFAT
 /*
  * PCI stuff
  */
 /* General PCI */
 #define CONFIG_PCI			/* include pci support		*/
 #define CONFIG_PCI_PNP			/* do pci plug-and-play		*/
 #define CONFIG_SYS_PCI_CACHE_LINE_SIZE	0	/* to avoid problems with PNP	*/
 #define CONFIG_PCI_SCAN_SHOW		/* show pci devices on startup	*/
 #define CONFIG_SYS_PCI_TARGBASE	0x80000000	/* PCIaddr mapped to	*/
 						/*   CONFIG_SYS_PCI_MEMBASE	*/
 /* Board-specific PCI */
 #define CONFIG_SYS_PCI_TARGET_INIT
 #define CONFIG_SYS_PCI_MASTER_INIT
 #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8	/* AMCC				*/
 #define CONFIG_SYS_PCI_SUBSYS_ID       0xcafe	/* Whatever			*/
 /*
  * External Bus Controller (EBC) Setup
  */
 /*
  * On Sequoia CS0 and CS3 are switched when configuring for NAND booting
  */
-#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
+#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) && \
+    !defined(CONFIG_SYS_RAMBOOT)
 #define CONFIG_SYS_NAND_CS		3	/* NAND chip connected to CSx	*/
 /* Memory Bank 0 (NOR-FLASH) initialization				*/
 #define CONFIG_SYS_EBC_PB0AP		0x03017200
 #define CONFIG_SYS_EBC_PB0CR		(CONFIG_SYS_FLASH_BASE | 0xda000)
 /* Memory Bank 3 (NAND-FLASH) initialization				*/
 #define CONFIG_SYS_EBC_PB3AP		0x018003c0
 #define CONFIG_SYS_EBC_PB3CR		(CONFIG_SYS_NAND_ADDR | 0x1c000)
 #else
 #define CONFIG_SYS_NAND_CS		0	/* NAND chip connected to CSx	*/
 /* Memory Bank 3 (NOR-FLASH) initialization				*/
 #define CONFIG_SYS_EBC_PB3AP		0x03017200
 #define CONFIG_SYS_EBC_PB3CR		(CONFIG_SYS_FLASH_BASE | 0xda000)
 /* Memory Bank 0 (NAND-FLASH) initialization				*/
 #define CONFIG_SYS_EBC_PB0AP		0x018003c0
 #define CONFIG_SYS_EBC_PB0CR		(CONFIG_SYS_NAND_ADDR | 0x1c000)
 #endif
 /* Memory Bank 2 (CPLD) initialization					*/
 #define CONFIG_SYS_EBC_PB2AP		0x24814580
 #define CONFIG_SYS_EBC_PB2CR		(CONFIG_SYS_BCSR_BASE | 0x38000)
 #define CONFIG_SYS_BCSR5_PCI66EN	0x80
 /*
  * NAND FLASH
  */
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		(CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS)
 #define CONFIG_SYS_NAND_SELECT_DEVICE  1	/* nand driver supports mutipl. chips */
 /*
  * PPC440 GPIO Configuration
  */
 /* test-only: take GPIO init from pcs440ep ???? in config file */
 #define CONFIG_SYS_4xx_GPIO_TABLE { /*	  Out		  GPIO	Alternate1	Alternate2	Alternate3 */ \
 {											\
 /* GPIO Core 0 */									\
 {GPIO0_BASE, GPIO_BI , GPIO_ALT1, GPIO_OUT_0}, /* GPIO0	EBC_ADDR(7)	DMA_REQ(2)	*/	\
 {GPIO0_BASE, GPIO_BI , GPIO_ALT1, GPIO_OUT_0}, /* GPIO1	EBC_ADDR(6)	DMA_ACK(2)	*/	\
 {GPIO0_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO2	EBC_ADDR(5)	DMA_EOT/TC(2)	*/	\
 {GPIO0_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO3	EBC_ADDR(4)	DMA_REQ(3)	*/	\
 {GPIO0_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO4	EBC_ADDR(3)	DMA_ACK(3)	*/	\
 {GPIO0_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO5	EBC_ADDR(2)	DMA_EOT/TC(3)	*/	\
 {GPIO0_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO6	EBC_CS_N(1)			*/	\
 {GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO7	EBC_CS_N(2)			*/	\
 {GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO8	EBC_CS_N(3)			*/	\
 {GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO9	EBC_CS_N(4)			*/	\
 {GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO10 EBC_CS_N(5)			*/	\
 {GPIO0_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO11 EBC_BUS_ERR			*/	\
 {GPIO0_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO12				*/	\
 {GPIO0_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO13				*/	\
 {GPIO0_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO14				*/	\
 {GPIO0_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO15				*/	\
 {GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1}, /* GPIO16 GMCTxD(4)			*/	\
 {GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1}, /* GPIO17 GMCTxD(5)			*/	\
 {GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1}, /* GPIO18 GMCTxD(6)			*/	\
 {GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1}, /* GPIO19 GMCTxD(7)			*/	\
 {GPIO0_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO20 RejectPkt0			*/	\
 {GPIO0_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO21 RejectPkt1			*/	\
 {GPIO0_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO22				*/	\
 {GPIO0_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO23 SCPD0				*/	\
 {GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1}, /* GPIO24 GMCTxD(2)			*/	\
 {GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1}, /* GPIO25 GMCTxD(3)			*/	\
 {GPIO0_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO26				*/	\
 {GPIO0_BASE, GPIO_IN , GPIO_ALT2, GPIO_OUT_0}, /* GPIO27 EXT_EBC_REQ	USB2D_RXERROR	*/	\
 {GPIO0_BASE, GPIO_OUT, GPIO_ALT2, GPIO_OUT_1}, /* GPIO28		USB2D_TXVALID	*/	\
 {GPIO0_BASE, GPIO_OUT, GPIO_ALT2, GPIO_OUT_1}, /* GPIO29 EBC_EXT_HDLA	USB2D_PAD_SUSPNDM */	\
 {GPIO0_BASE, GPIO_OUT, GPIO_ALT2, GPIO_OUT_1}, /* GPIO30 EBC_EXT_ACK	USB2D_XCVRSELECT*/	\
 {GPIO0_BASE, GPIO_OUT, GPIO_ALT2, GPIO_OUT_1}, /* GPIO31 EBC_EXR_BUSREQ	USB2D_TERMSELECT*/	\
 },											\
 {											\
 /* GPIO Core 1 */									\
 {GPIO1_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1}, /* GPIO32 USB2D_OPMODE0	EBC_DATA(2)	*/	\
 {GPIO1_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1}, /* GPIO33 USB2D_OPMODE1	EBC_DATA(3)	*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_ALT2, GPIO_OUT_0}, /* GPIO34 UART0_8PIN_DCD_N UART1_DSR_CTS_N UART2_SOUT*/ \
 {GPIO1_BASE, GPIO_OUT, GPIO_ALT2, GPIO_OUT_1}, /* GPIO35 UART0_8PIN_DSR_N UART1_RTS_DTR_N UART2_SIN*/ \
 {GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO36 UART0_CTS_N	EBC_DATA(0)	UART3_SIN*/ \
 {GPIO1_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1}, /* GPIO37 UART0_RTS_N	EBC_DATA(1)	UART3_SOUT*/ \
 {GPIO1_BASE, GPIO_OUT, GPIO_ALT2, GPIO_OUT_1}, /* GPIO38 UART0_8PIN_DTR_N UART1_SOUT	*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_ALT2, GPIO_OUT_0}, /* GPIO39 UART0_8PIN_RI_N UART1_SIN	*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO40 UIC_IRQ(0)			*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO41 UIC_IRQ(1)			*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO42 UIC_IRQ(2)			*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO43 UIC_IRQ(3)			*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO44 UIC_IRQ(4)	DMA_ACK(1)	*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO45 UIC_IRQ(6)	DMA_EOT/TC(1)	*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO46 UIC_IRQ(7)	DMA_REQ(0)	*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO47 UIC_IRQ(8)	DMA_ACK(0)	*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO48 UIC_IRQ(9)	DMA_EOT/TC(0)	*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO49  Unselect via TraceSelect Bit	*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO50  Unselect via TraceSelect Bit	*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO51  Unselect via TraceSelect Bit	*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO52  Unselect via TraceSelect Bit	*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO53  Unselect via TraceSelect Bit	*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO54  Unselect via TraceSelect Bit	*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO55  Unselect via TraceSelect Bit	*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO56  Unselect via TraceSelect Bit	*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO57  Unselect via TraceSelect Bit	*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO58  Unselect via TraceSelect Bit	*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO59  Unselect via TraceSelect Bit	*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO60  Unselect via TraceSelect Bit	*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO61  Unselect via TraceSelect Bit	*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO62  Unselect via TraceSelect Bit	*/	\
 {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO63  Unselect via TraceSelect Bit	*/	\
 }											\
 }
 #ifdef CONFIG_VIDEO
 #define CONFIG_BIOSEMU			/* x86 bios emulator for vga bios */
 #define CONFIG_ATI_RADEON_FB		/* use radeon framebuffer driver */
 #define VIDEO_IO_OFFSET			0xe8000000
 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS		VIDEO_IO_OFFSET
 #define CONFIG_VIDEO_SW_CURSOR
 #define CONFIG_VIDEO_LOGO
 #define CONFIG_CFB_CONSOLE
 #define CONFIG_SPLASH_SCREEN
 #define CONFIG_VGA_AS_SINGLE_DEVICE
 #define CONFIG_CMD_BMP
 #endif
 #endif /* __CONFIG_H */