Commit d9a3bec682f9756621615f4306718a356a3230e3
dm: ns16550: Add support for reg-offset property
reg-offset is the part of standard 8250 binding in the kernel. It is shifting start of address space by reg-offset. On Xilinx platform this offset is typically 0x1000. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Showing 2 changed files with 5 additions and 2 deletions Side-by-side Diff
... | ... | @@ -105,7 +105,7 @@ |
105 | 105 | * As far as we know it doesn't make sense to support selection of |
106 | 106 | * these options at run-time, so use the existing CONFIG options. |
107 | 107 | */ |
108 | - serial_out_shift(addr, plat->reg_shift, value); | |
108 | + serial_out_shift(addr + plat->reg_offset, plat->reg_shift, value); | |
109 | 109 | } |
110 | 110 | |
111 | 111 | static int ns16550_readb(NS16550_t port, int offset) |
... | ... | @@ -116,7 +116,7 @@ |
116 | 116 | offset *= 1 << plat->reg_shift; |
117 | 117 | addr = map_physmem(plat->base, 0, MAP_NOCACHE) + offset; |
118 | 118 | |
119 | - return serial_in_shift(addr, plat->reg_shift); | |
119 | + return serial_in_shift(addr + plat->reg_offset, plat->reg_shift); | |
120 | 120 | } |
121 | 121 | |
122 | 122 | /* We can clean these up once everything is moved to driver model */ |
... | ... | @@ -401,6 +401,8 @@ |
401 | 401 | return -EINVAL; |
402 | 402 | |
403 | 403 | plat->base = addr; |
404 | + plat->reg_offset = fdtdec_get_int(gd->fdt_blob, dev->of_offset, | |
405 | + "reg-offset", 0); | |
404 | 406 | plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset, |
405 | 407 | "reg-shift", 0); |
406 | 408 | plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset, |
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