Eric Lee / smarc-uboot

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Commit dae80f3caf9754a6dd3ddf3cf903d0c46cbd4385

Authored by Bartlomiej Sieka
1 parent 82d9c9ec29
Exists in master and in 55 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, emb_lf_v2023.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

- Add MPC5XXX register definition MPC5XXX_WU_GPIO_DATA_I and change the 

MPC5XXX_WU_GPIO_DATA macro to MPC5XXX_WU_GPIO_DATA_O (per MPC5200 User's
  Manual). Replace the uses of MPC5XXX_WU_GPIO_DATA with
  MPC5XXX_WU_GPIO_DATA_O for affected boards.

- Add defintions for some MPC5XXX GPIO pins.

Showing 8 changed files with 31 additions and 40 deletions Side-by-side Diff

board/bc3450/bc3450.c
Diff comments   View file @ dae80f3
... ... @@ -295,7 +295,6 @@
295 295 #endif
296 296  
297 297 #if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
298   -#define GPIO_PSC1_4 0x01000000UL
299 298  
300 299 void init_ide_reset (void)
301 300 {
302 301  
... ... @@ -311,9 +310,9 @@
311 310 debug ("ide_reset(%d)\n", idereset);
312 311  
313 312 if (idereset) {
314   - *(vu_long *) MPC5XXX_WU_GPIO_DATA &= ~GPIO_PSC1_4;
  313 + *(vu_long *) MPC5XXX_WU_GPIO_DATA_O &= ~GPIO_PSC1_4;
315 314 } else {
316   - *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC1_4;
  315 + *(vu_long *) MPC5XXX_WU_GPIO_DATA_O |= GPIO_PSC1_4;
317 316 }
318 317 }
319 318 #endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
board/emk/top5200/top5200.c
Diff comments   View file @ dae80f3
... ... @@ -186,8 +186,6 @@
186 186 *****************************************************************************/
187 187 #if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
188 188  
189   -#define GPIO_PSC1_4 0x01000000UL
190   -
191 189 void init_ide_reset (void)
192 190 {
193 191 debug ("init_ide_reset\n");
194 192  
... ... @@ -202,9 +200,9 @@
202 200 debug ("ide_reset(%d)\n", idereset);
203 201  
204 202 if (idereset) {
205   - *(vu_long *) MPC5XXX_WU_GPIO_DATA &= ~GPIO_PSC1_4;
  203 + *(vu_long *) MPC5XXX_WU_GPIO_DATA_O &= ~GPIO_PSC1_4;
206 204 } else {
207   - *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC1_4;
  205 + *(vu_long *) MPC5XXX_WU_GPIO_DATA_O |= GPIO_PSC1_4;
208 206 }
209 207 }
210 208 #endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
board/esd/cpci5200/cpci5200.c
Diff comments   View file @ dae80f3
... ... @@ -199,8 +199,6 @@
199 199  
200 200 #if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
201 201  
202   -#define GPIO_PSC1_4 0x01000000UL
203   -
204 202 void init_ide_reset(void)
205 203 {
206 204 debug("init_ide_reset\n");
207 205  
... ... @@ -215,9 +213,9 @@
215 213 debug("ide_reset(%d)\n", idereset);
216 214  
217 215 if (idereset) {
218   - *(vu_long *) MPC5XXX_WU_GPIO_DATA &= ~GPIO_PSC1_4;
  216 + *(vu_long *) MPC5XXX_WU_GPIO_DATA_O &= ~GPIO_PSC1_4;
219 217 } else {
220   - *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC1_4;
  218 + *(vu_long *) MPC5XXX_WU_GPIO_DATA_O |= GPIO_PSC1_4;
221 219 }
222 220 }
223 221 #endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
... ... @@ -242,7 +240,7 @@
242 240 debug("init_ata_reset\n");
243 241  
244 242 /* Configure GPIO_WU6 as GPIO output for ATA reset */
245   - *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_WU6;
  243 + *(vu_long *) MPC5XXX_WU_GPIO_DATA_O |= GPIO_WU6;
246 244 *(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_WU6;
247 245 *(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_WU6;
248 246 __asm__ volatile ("sync");
board/esd/pf5200/pf5200.c
Diff comments   View file @ dae80f3
... ... @@ -199,8 +199,6 @@
199 199  
200 200 #if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
201 201  
202   -#define GPIO_PSC1_4 0x01000000UL
203   -
204 202 void init_ide_reset(void)
205 203 {
206 204 debug("init_ide_reset\n");
207 205  
... ... @@ -215,9 +213,9 @@
215 213 debug("ide_reset(%d)\n", idereset);
216 214  
217 215 if (idereset) {
218   - *(vu_long *) MPC5XXX_WU_GPIO_DATA &= ~GPIO_PSC1_4;
  216 + *(vu_long *) MPC5XXX_WU_GPIO_DATA_O &= ~GPIO_PSC1_4;
219 217 } else {
220   - *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC1_4;
  218 + *(vu_long *) MPC5XXX_WU_GPIO_DATA_O |= GPIO_PSC1_4;
221 219 }
222 220 }
223 221 #endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
... ... @@ -242,7 +240,7 @@
242 240 debug("init_power_switch\n");
243 241  
244 242 /* Configure GPIO_WU6 as GPIO output for ATA reset */
245   - *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_WU6;
  243 + *(vu_long *) MPC5XXX_WU_GPIO_DATA_O |= GPIO_WU6;
246 244 *(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_WU6;
247 245 *(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_WU6;
248 246 __asm__ volatile ("sync");
249 247  
... ... @@ -272,10 +270,10 @@
272 270 debug("ide_set_reset(%d)\n", power);
273 271  
274 272 if (power) {
275   - *(vu_long *) MPC5XXX_WU_GPIO_DATA &= ~GPIO_WU6;
  273 + *(vu_long *) MPC5XXX_WU_GPIO_DATA_O &= ~GPIO_WU6;
276 274 *(vu_long *) MPC5XXX_INTERRUPT_GPIO_DATA_OUTPUT &= ~GPIO_USB9;
277 275 } else {
278   - *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_WU6;
  276 + *(vu_long *) MPC5XXX_WU_GPIO_DATA_O |= GPIO_WU6;
279 277 if ((*(vu_long *) MPC5XXX_INTERRUPT_GPIO_STATUS & GPIO_USB9S) ==
280 278 0) {
281 279 *(vu_long *) MPC5XXX_SIMPLEIO_GPIO_DATA_OUTPUT |=
board/icecube/icecube.c
Diff comments   View file @ dae80f3
... ... @@ -308,8 +308,6 @@
308 308  
309 309 #if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
310 310  
311   -#define GPIO_PSC1_4 0x01000000UL
312   -
313 311 void init_ide_reset (void)
314 312 {
315 313 debug ("init_ide_reset\n");
... ... @@ -318,7 +316,7 @@
318 316 *(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC1_4;
319 317 *(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_PSC1_4;
320 318 /* Deassert reset */
321   - *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC1_4;
  319 + *(vu_long *) MPC5XXX_WU_GPIO_DATA_O |= GPIO_PSC1_4;
322 320 }
323 321  
324 322 void ide_set_reset (int idereset)
325 323  
... ... @@ -326,11 +324,11 @@
326 324 debug ("ide_reset(%d)\n", idereset);
327 325  
328 326 if (idereset) {
329   - *(vu_long *) MPC5XXX_WU_GPIO_DATA &= ~GPIO_PSC1_4;
  327 + *(vu_long *) MPC5XXX_WU_GPIO_DATA_O &= ~GPIO_PSC1_4;
330 328 /* Make a delay. MPC5200 spec says 25 usec min */
331 329 udelay(500000);
332 330 } else {
333   - *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC1_4;
  331 + *(vu_long *) MPC5XXX_WU_GPIO_DATA_O |= GPIO_PSC1_4;
334 332 }
335 333 }
336 334 #endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
board/inka4x0/inka4x0.c
Diff comments   View file @ dae80f3
... ... @@ -173,9 +173,6 @@
173 173 *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
174 174 }
175 175  
176   -#define GPIO_WKUP_7 0x80000000UL
177   -#define GPIO_PSC3_9 0x04000000UL
178   -
179 176 int misc_init_f (void)
180 177 {
181 178 uchar tmp[10];
182 179  
... ... @@ -218,13 +215,13 @@
218 215 *(vu_long *)MPC5XXX_WU_GPIO_DIR |= 0xc4000000;
219 216  
220 217 /* Set LR mirror bit because it is low-active */
221   - *(vu_long *)MPC5XXX_WU_GPIO_DATA |= GPIO_WKUP_7;
  218 + *(vu_long *) MPC5XXX_WU_GPIO_DATA_O |= GPIO_WKUP_7;
222 219 /*
223 220 * Reset Coral-P graphics controller
224 221 */
225 222 *(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC3_9;
226 223 *(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_PSC3_9;
227   - *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC3_9;
  224 + *(vu_long *) MPC5XXX_WU_GPIO_DATA_O |= GPIO_PSC3_9;
228 225 return 0;
229 226 }
230 227  
... ... @@ -241,8 +238,6 @@
241 238  
242 239 #if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
243 240  
244   -#define GPIO_PSC1_4 0x01000000UL
245   -
246 241 void init_ide_reset (void)
247 242 {
248 243 debug ("init_ide_reset\n");
... ... @@ -251,7 +246,7 @@
251 246 *(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC1_4;
252 247 *(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_PSC1_4;
253 248 /* Deassert reset */
254   - *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC1_4;
  249 + *(vu_long *) MPC5XXX_WU_GPIO_DATA_O |= GPIO_PSC1_4;
255 250 }
256 251  
257 252 void ide_set_reset (int idereset)
258 253  
... ... @@ -259,11 +254,11 @@
259 254 debug ("ide_reset(%d)\n", idereset);
260 255  
261 256 if (idereset) {
262   - *(vu_long *) MPC5XXX_WU_GPIO_DATA &= ~GPIO_PSC1_4;
  257 + *(vu_long *) MPC5XXX_WU_GPIO_DATA_O &= ~GPIO_PSC1_4;
263 258 /* Make a delay. MPC5200 spec says 25 usec min */
264 259 udelay(500000);
265 260 } else {
266   - *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC1_4;
  261 + *(vu_long *) MPC5XXX_WU_GPIO_DATA_O |= GPIO_PSC1_4;
267 262 }
268 263 }
269 264 #endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
board/tqm5200/tqm5200.c
Diff comments   View file @ dae80f3
... ... @@ -341,9 +341,7 @@
341 341 #define SM501_GPIO_DATA_DIR_HIGH 0x0001000CUL
342 342 #define SM501_GPIO_DATA_HIGH 0x00010004UL
343 343 #define SM501_GPIO_51 0x00080000UL
344   -#else
345   -#define GPIO_PSC1_4 0x01000000UL
346   -#endif
  344 +#endif /* CONFIG MINIFAP */
347 345  
348 346 void init_ide_reset (void)
349 347 {
350 348  
... ... @@ -381,9 +379,9 @@
381 379 }
382 380 #else
383 381 if (idereset) {
384   - *(vu_long *) MPC5XXX_WU_GPIO_DATA &= ~GPIO_PSC1_4;
  382 + *(vu_long *) MPC5XXX_WU_GPIO_DATA_O &= ~GPIO_PSC1_4;
385 383 } else {
386   - *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC1_4;
  384 + *(vu_long *) MPC5XXX_WU_GPIO_DATA_O |= GPIO_PSC1_4;
387 385 }
388 386 #endif
389 387 }
... ... @@ -188,7 +188,14 @@
188 188 #define MPC5XXX_WU_GPIO_ENABLE (MPC5XXX_WU_GPIO + 0x0000)
189 189 #define MPC5XXX_WU_GPIO_ODE (MPC5XXX_WU_GPIO + 0x0004)
190 190 #define MPC5XXX_WU_GPIO_DIR (MPC5XXX_WU_GPIO + 0x0008)
191   -#define MPC5XXX_WU_GPIO_DATA (MPC5XXX_WU_GPIO + 0x000c)
  191 +#define MPC5XXX_WU_GPIO_DATA_O (MPC5XXX_WU_GPIO + 0x000c)
  192 +#define MPC5XXX_WU_GPIO_DATA_I (MPC5XXX_WU_GPIO + 0x0020)
  193 +
  194 +/* GPIO pins */
  195 +#define GPIO_WKUP_7 0x80000000UL
  196 +#define GPIO_PSC6_0 0x10000000UL
  197 +#define GPIO_PSC3_9 0x04000000UL
  198 +#define GPIO_PSC1_4 0x01000000UL
192 199  
193 200 /* PCI registers */
194 201 #define MPC5XXX_PCI_CMD (MPC5XXX_PCI + 0x04)