Eric Lee / smarc-uboot

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Commit df142b5636929eb52b7e4c312e187a029981bc81

Authored by Ye Li
1 parent 6c50459c2b
Exists in smarc-n7.1.2_2.0.0-ga and in 4 other branches smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m

MLK-14390-3 mx6sllarm2: Convert to enable OF_CONTROL and DM drivers 

Update mx6sll lpddr2/3 arm2 board codes and build configurations
to enable OF_CONTROL and DM drivers.

1. Update GPIO codes for adding gpio request
2. Enable USB DM driver
3. Update PMIC code for using DM PMIC
4. Add spinor boot support, pin conflict with LCD, will disable LCD.

Signed-off-by: Ye Li <ye.li@nxp.com>

Showing 8 changed files with 254 additions and 51 deletions Side-by-side Diff

board/freescale/mx6sll_arm2/Kconfig
Diff comments   View file @ df142b5
... ... @@ -9,5 +9,8 @@
9 9 config SYS_CONFIG_NAME
10 10 default "mx6sll_arm2"
11 11  
  12 +config LPDDR2
  13 + bool "set if the board uses the LPDDR2 not default LPDDR3"
  14 +
12 15 endif
board/freescale/mx6sll_arm2/mx6sll_arm2.c
Diff comments   View file @ df142b5
... ... @@ -24,12 +24,11 @@
24 24 #include <miiphy.h>
25 25 #include <mmc.h>
26 26 #include <mxsfb.h>
27   -#include <netdev.h>
28 27 #include <power/pmic.h>
29 28 #include <power/pfuze100_pmic.h>
30 29 #include "../common/pfuze.h"
31 30 #include <usb.h>
32   -#include <usb/ehci-fsl.h>
  31 +#include <usb/ehci-ci.h>
33 32 #if defined(CONFIG_MXC_EPDC)
34 33 #include <lcd.h>
35 34 #include <mxc_epdc_fb.h>
... ... @@ -71,7 +70,7 @@
71 70 #define EPDC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_SPEED_MED | \
72 71 PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
73 72  
74   -#ifdef CONFIG_SYS_I2C_MXC
  73 +#ifdef CONFIG_SYS_I2C
75 74 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
76 75 /* I2C1 for PMIC and EPD */
77 76 struct i2c_pads_info i2c_pad_info1 = {
... ... @@ -241,6 +240,7 @@
241 240 case 0:
242 241 imx_iomux_v3_setup_multiple_pads(
243 242 usdhc1_pads, ARRAY_SIZE(usdhc1_pads));
  243 + gpio_request(USDHC1_CD_GPIO, "usdhc1 cd");
244 244 gpio_direction_input(USDHC1_CD_GPIO);
245 245 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
246 246 break;
247 247  
... ... @@ -248,11 +248,13 @@
248 248 imx_iomux_v3_setup_multiple_pads(
249 249 usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
250 250 usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
  251 + gpio_request(USDHC2_PWR_GPIO, "usdhc2 pwr");
251 252 gpio_direction_output(USDHC2_PWR_GPIO, 1);
252 253 break;
253 254 case 2:
254 255 imx_iomux_v3_setup_multiple_pads(
255 256 usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
  257 + gpio_request(USDHC3_CD_GPIO, "usdhc3 cd");
256 258 gpio_direction_input(USDHC3_CD_GPIO);
257 259 usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
258 260 break;
... ... @@ -323,6 +325,23 @@
323 325  
324 326 return 0;
325 327 }
  328 +#elif defined(CONFIG_DM_PMIC_PFUZE100)
  329 +int power_init_board(void)
  330 +{
  331 + struct udevice *dev;
  332 + int ret;
  333 +
  334 + dev = pfuze_common_init();
  335 + if (!dev)
  336 + return -ENODEV;
  337 +
  338 + ret = pfuze_mode_init(dev, APS_PFM);
  339 + if (ret < 0)
  340 + return ret;
  341 +
  342 + return 0;
  343 +}
  344 +
326 345 #endif
327 346  
328 347 #ifdef CONFIG_MXC_SPI
... ... @@ -390,7 +409,7 @@
390 409 {
391 410 int ret;
392 411  
393   - ret = enable_lcdif_clock(dev->bus);
  412 + ret = enable_lcdif_clock(dev->bus, 1);
394 413 if (ret) {
395 414 printf("Enable LCDIF clock failed, %d\n", ret);
396 415 return;
397 416  
398 417  
... ... @@ -399,13 +418,16 @@
399 418 imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads));
400 419  
401 420 /* Reset the LCD */
  421 + gpio_request(IMX_GPIO_NR(2, 19), "lcd reset");
402 422 gpio_direction_output(IMX_GPIO_NR(2, 19) , 0);
403 423 udelay(500);
404 424 gpio_direction_output(IMX_GPIO_NR(2, 19) , 1);
405 425  
  426 + gpio_request(IMX_GPIO_NR(4, 8), "lcd pwr en");
406 427 gpio_direction_output(IMX_GPIO_NR(4, 8) , 1);
407 428  
408 429 /* Set Brightness to high */
  430 + gpio_request(IMX_GPIO_NR(3, 23), "backlight");
409 431 gpio_direction_output(IMX_GPIO_NR(3, 23) , 1);
410 432 }
411 433  
... ... @@ -526,6 +548,7 @@
526 548 /* EPDC_PWRSTAT - GPIO2[13] for PWR_GOOD status */
527 549 imx_iomux_v3_setup_pad(MX6_PAD_EPDC_PWR_STAT__GPIO2_IO13 |
528 550 MUX_PAD_CTRL(EPDC_PAD_CTRL));
  551 + gpio_request(IMX_GPIO_NR(2, 13), "EPDC_PWRSTAT");
529 552 gpio_direction_input(IMX_GPIO_NR(2, 13));
530 553  
531 554 /* EPDC_VCOM0 - GPIO2[03] for VCOM control */
532 555  
533 556  
... ... @@ -533,18 +556,21 @@
533 556 MUX_PAD_CTRL(EPDC_PAD_CTRL));
534 557  
535 558 /* Set as output */
  559 + gpio_request(IMX_GPIO_NR(2, 3), "EPDC_VCOM0");
536 560 gpio_direction_output(IMX_GPIO_NR(2, 3), 1);
537 561  
538 562 /* EPDC_PWRWAKEUP - GPIO2[14] for EPD PMIC WAKEUP */
539 563 imx_iomux_v3_setup_pad(MX6_PAD_EPDC_PWR_WAKE__GPIO2_IO14 |
540 564 MUX_PAD_CTRL(EPDC_PAD_CTRL));
541 565 /* Set as output */
  566 + gpio_request(IMX_GPIO_NR(2, 14), "EPDC_PWRWAKEUP");
542 567 gpio_direction_output(IMX_GPIO_NR(2, 14), 1);
543 568  
544 569 /* EPDC_PWRCTRL0 - GPIO2[07] for EPD PWR CTL0 */
545 570 imx_iomux_v3_setup_pad(MX6_PAD_EPDC_PWR_CTRL0__GPIO2_IO07 |
546 571 MUX_PAD_CTRL(EPDC_PAD_CTRL));
547 572 /* Set as output */
  573 + gpio_request(IMX_GPIO_NR(2, 7), "EPDC_PWRCTRL0");
548 574 gpio_direction_output(IMX_GPIO_NR(2, 7), 1);
549 575 }
550 576  
... ... @@ -705,7 +731,7 @@
705 731 /* Address of boot parameters */
706 732 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
707 733  
708   -#ifdef CONFIG_SYS_I2C_MXC
  734 +#ifdef CONFIG_SYS_I2C
709 735 setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
710 736 setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
711 737 #endif
configs/mx6sll_lpddr2_arm2_defconfig
Diff comments   View file @ df142b5
1   -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sll_arm2/imximage_lpddr2.cfg,LPDDR2"
  1 +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sll_arm2/imximage_lpddr2.cfg"
  2 +CONFIG_LPDDR2=y
2 3 CONFIG_ARM=y
3 4 CONFIG_ARCH_MX6=y
4 5 CONFIG_TARGET_MX6SLL_ARM2=y
  6 +CONFIG_VIDEO=y
  7 +CONFIG_DEFAULT_DEVICE_TREE="imx6sll-lpddr2-arm2"
  8 +CONFIG_DEFAULT_FDT_FILE="imx6sll-lpddr2-arm2.dtb"
  9 +CONFIG_BOOTDELAY=3
  10 +CONFIG_BOARD_EARLY_INIT_F=y
  11 +CONFIG_HUSH_PARSER=y
  12 +CONFIG_CMD_BOOTZ=y
  13 +# CONFIG_CMD_IMLS is not set
  14 +CONFIG_CMD_MEMTEST=y
  15 +CONFIG_CMD_MMC=y
  16 +CONFIG_CMD_USB=y
  17 +CONFIG_CMD_I2C=y
5 18 CONFIG_CMD_GPIO=y
  19 +CONFIG_CMD_DHCP=y
  20 +CONFIG_CMD_PING=y
  21 +CONFIG_CMD_CACHE=y
  22 +CONFIG_CMD_NET=y
  23 +CONFIG_CMD_EXT2=y
  24 +CONFIG_CMD_EXT4=y
  25 +CONFIG_CMD_EXT4_WRITE=y
  26 +CONFIG_CMD_FAT=y
  27 +CONFIG_CMD_FS_GENERIC=y
  28 +CONFIG_OF_CONTROL=y
  29 +# CONFIG_BLK is not set
  30 +CONFIG_DM_GPIO=y
  31 +CONFIG_DM_I2C=y
  32 +CONFIG_DM_MMC=y
  33 +# CONFIG_DM_MMC_OPS is not set
  34 +CONFIG_PINCTRL=y
  35 +CONFIG_PINCTRL_IMX6=y
  36 +CONFIG_DM_PMIC=y
  37 +CONFIG_DM_PMIC_PFUZE100=y
  38 +CONFIG_DM_REGULATOR=y
  39 +CONFIG_DM_REGULATOR_PFUZE100=y
  40 +CONFIG_DM_REGULATOR_FIXED=y
  41 +CONFIG_DM_REGULATOR_GPIO=y
  42 +CONFIG_USB=y
  43 +CONFIG_DM_USB=y
  44 +CONFIG_USB_EHCI_HCD=y
  45 +CONFIG_USB_STORAGE=y
configs/mx6sll_lpddr3_arm2_defconfig
Diff comments   View file @ df142b5
... ... @@ -2,5 +2,44 @@
2 2 CONFIG_ARM=y
3 3 CONFIG_ARCH_MX6=y
4 4 CONFIG_TARGET_MX6SLL_ARM2=y
  5 +CONFIG_VIDEO=y
  6 +CONFIG_DEFAULT_DEVICE_TREE="imx6sll-lpddr3-arm2"
  7 +CONFIG_DEFAULT_FDT_FILE="imx6sll-lpddr3-arm2.dtb"
  8 +CONFIG_BOOTDELAY=3
  9 +CONFIG_BOARD_EARLY_INIT_F=y
  10 +CONFIG_HUSH_PARSER=y
  11 +CONFIG_CMD_BOOTZ=y
  12 +# CONFIG_CMD_IMLS is not set
  13 +CONFIG_CMD_MEMTEST=y
  14 +CONFIG_CMD_MMC=y
  15 +CONFIG_CMD_USB=y
  16 +CONFIG_CMD_I2C=y
5 17 CONFIG_CMD_GPIO=y
  18 +CONFIG_CMD_DHCP=y
  19 +CONFIG_CMD_PING=y
  20 +CONFIG_CMD_CACHE=y
  21 +CONFIG_CMD_NET=y
  22 +CONFIG_CMD_EXT2=y
  23 +CONFIG_CMD_EXT4=y
  24 +CONFIG_CMD_EXT4_WRITE=y
  25 +CONFIG_CMD_FAT=y
  26 +CONFIG_CMD_FS_GENERIC=y
  27 +CONFIG_OF_CONTROL=y
  28 +# CONFIG_BLK is not set
  29 +CONFIG_DM_GPIO=y
  30 +CONFIG_DM_I2C=y
  31 +CONFIG_DM_MMC=y
  32 +# CONFIG_DM_MMC_OPS is not set
  33 +CONFIG_PINCTRL=y
  34 +CONFIG_PINCTRL_IMX6=y
  35 +CONFIG_DM_PMIC=y
  36 +CONFIG_DM_PMIC_PFUZE100=y
  37 +CONFIG_DM_REGULATOR=y
  38 +CONFIG_DM_REGULATOR_PFUZE100=y
  39 +CONFIG_DM_REGULATOR_FIXED=y
  40 +CONFIG_DM_REGULATOR_GPIO=y
  41 +CONFIG_USB=y
  42 +CONFIG_DM_USB=y
  43 +CONFIG_USB_EHCI_HCD=y
  44 +CONFIG_USB_STORAGE=y
configs/mx6sll_lpddr3_arm2_epdc_defconfig
Diff comments   View file @ df142b5
1   -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sll_arm2/imximage.cfg,MXC_EPDC"
  1 +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sll_arm2/imximage.cfg"
2 2 CONFIG_ARM=y
3 3 CONFIG_ARCH_MX6=y
4 4 CONFIG_TARGET_MX6SLL_ARM2=y
  5 +CONFIG_VIDEO=y
  6 +CONFIG_MXC_EPDC=y
  7 +CONFIG_DEFAULT_DEVICE_TREE="imx6sll-lpddr3-arm2"
  8 +CONFIG_DEFAULT_FDT_FILE="imx6sll-lpddr3-arm2.dtb"
  9 +CONFIG_BOOTDELAY=3
  10 +CONFIG_BOARD_EARLY_INIT_F=y
  11 +CONFIG_HUSH_PARSER=y
  12 +CONFIG_CMD_BOOTZ=y
  13 +# CONFIG_CMD_IMLS is not set
  14 +CONFIG_CMD_MEMTEST=y
  15 +CONFIG_CMD_MMC=y
  16 +CONFIG_CMD_USB=y
  17 +CONFIG_CMD_I2C=y
5 18 CONFIG_CMD_GPIO=y
  19 +CONFIG_CMD_DHCP=y
  20 +CONFIG_CMD_PING=y
  21 +CONFIG_CMD_CACHE=y
  22 +CONFIG_CMD_NET=y
  23 +CONFIG_CMD_EXT2=y
  24 +CONFIG_CMD_EXT4=y
  25 +CONFIG_CMD_EXT4_WRITE=y
  26 +CONFIG_CMD_FAT=y
  27 +CONFIG_CMD_FS_GENERIC=y
  28 +CONFIG_OF_CONTROL=y
  29 +# CONFIG_BLK is not set
  30 +CONFIG_DM_GPIO=y
  31 +CONFIG_DM_I2C=y
  32 +CONFIG_DM_MMC=y
  33 +# CONFIG_DM_MMC_OPS is not set
  34 +CONFIG_PINCTRL=y
  35 +CONFIG_PINCTRL_IMX6=y
  36 +CONFIG_DM_PMIC=y
  37 +CONFIG_DM_PMIC_PFUZE100=y
  38 +CONFIG_DM_REGULATOR=y
  39 +CONFIG_DM_REGULATOR_PFUZE100=y
  40 +CONFIG_DM_REGULATOR_FIXED=y
  41 +CONFIG_DM_REGULATOR_GPIO=y
  42 +CONFIG_USB=y
  43 +CONFIG_DM_USB=y
  44 +CONFIG_USB_EHCI_HCD=y
  45 +CONFIG_USB_STORAGE=y
configs/mx6sll_lpddr3_arm2_plugin_defconfig
Diff comments   View file @ df142b5
  1 +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sll_arm2/imximage.cfg"
  2 +CONFIG_ARM=y
  3 +CONFIG_ARCH_MX6=y
  4 +CONFIG_TARGET_MX6SLL_ARM2=y
  5 +CONFIG_VIDEO=y
  6 +CONFIG_DEFAULT_DEVICE_TREE="imx6sll-lpddr3-arm2"
  7 +CONFIG_DEFAULT_FDT_FILE="imx6sll-lpddr3-arm2.dtb"
  8 +CONFIG_USE_IMXIMG_PLUGIN=y
  9 +CONFIG_BOOTDELAY=3
  10 +CONFIG_BOARD_EARLY_INIT_F=y
  11 +CONFIG_HUSH_PARSER=y
  12 +CONFIG_CMD_BOOTZ=y
  13 +# CONFIG_CMD_IMLS is not set
  14 +CONFIG_CMD_MEMTEST=y
  15 +CONFIG_CMD_MMC=y
  16 +CONFIG_CMD_USB=y
  17 +CONFIG_CMD_I2C=y
  18 +CONFIG_CMD_GPIO=y
  19 +CONFIG_CMD_DHCP=y
  20 +CONFIG_CMD_PING=y
  21 +CONFIG_CMD_CACHE=y
  22 +CONFIG_CMD_NET=y
  23 +CONFIG_CMD_EXT2=y
  24 +CONFIG_CMD_EXT4=y
  25 +CONFIG_CMD_EXT4_WRITE=y
  26 +CONFIG_CMD_FAT=y
  27 +CONFIG_CMD_FS_GENERIC=y
  28 +CONFIG_OF_CONTROL=y
  29 +# CONFIG_BLK is not set
  30 +CONFIG_DM_GPIO=y
  31 +CONFIG_DM_I2C=y
  32 +CONFIG_DM_MMC=y
  33 +# CONFIG_DM_MMC_OPS is not set
  34 +CONFIG_PINCTRL=y
  35 +CONFIG_PINCTRL_IMX6=y
  36 +CONFIG_DM_PMIC=y
  37 +CONFIG_DM_PMIC_PFUZE100=y
  38 +CONFIG_DM_REGULATOR=y
  39 +CONFIG_DM_REGULATOR_PFUZE100=y
  40 +CONFIG_DM_REGULATOR_FIXED=y
  41 +CONFIG_DM_REGULATOR_GPIO=y
  42 +CONFIG_USB=y
  43 +CONFIG_DM_USB=y
  44 +CONFIG_USB_EHCI_HCD=y
  45 +CONFIG_USB_STORAGE=y
configs/mx6sll_lpddr3_arm2_spinor_defconfig
Diff comments   View file @ df142b5
1   -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sll_arm2/imximage.cfg,SYS_BOOT_SPINOR"
  1 +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sll_arm2/imximage.cfg"
2 2 CONFIG_ARM=y
3 3 CONFIG_ARCH_MX6=y
4 4 CONFIG_TARGET_MX6SLL_ARM2=y
  5 +CONFIG_SPI_BOOT=y
  6 +CONFIG_DEFAULT_DEVICE_TREE="imx6sll-lpddr3-arm2-ecspi"
  7 +CONFIG_DEFAULT_FDT_FILE="imx6sll-lpddr3-arm2.dtb"
  8 +CONFIG_BOOTDELAY=3
  9 +CONFIG_BOARD_EARLY_INIT_F=y
  10 +CONFIG_HUSH_PARSER=y
  11 +CONFIG_CMD_BOOTZ=y
  12 +# CONFIG_CMD_IMLS is not set
  13 +CONFIG_CMD_MEMTEST=y
  14 +CONFIG_CMD_MMC=y
  15 +CONFIG_CMD_SF=y
  16 +CONFIG_CMD_USB=y
  17 +CONFIG_CMD_I2C=y
5 18 CONFIG_CMD_GPIO=y
  19 +CONFIG_CMD_DHCP=y
  20 +CONFIG_CMD_PING=y
  21 +CONFIG_CMD_CACHE=y
  22 +CONFIG_CMD_NET=y
  23 +CONFIG_CMD_EXT2=y
  24 +CONFIG_CMD_EXT4=y
  25 +CONFIG_CMD_EXT4_WRITE=y
  26 +CONFIG_CMD_FAT=y
  27 +CONFIG_CMD_FS_GENERIC=y
  28 +CONFIG_OF_CONTROL=y
  29 +# CONFIG_BLK is not set
  30 +CONFIG_DM_GPIO=y
  31 +CONFIG_DM_I2C=y
  32 +CONFIG_DM_MMC=y
  33 +CONFIG_SPI_FLASH=y
  34 +CONFIG_SPI_FLASH_STMICRO=y
  35 +# CONFIG_DM_MMC_OPS is not set
  36 +CONFIG_PINCTRL=y
  37 +CONFIG_PINCTRL_IMX6=y
  38 +CONFIG_DM_PMIC=y
  39 +CONFIG_DM_PMIC_PFUZE100=y
  40 +CONFIG_DM_REGULATOR=y
  41 +CONFIG_DM_REGULATOR_PFUZE100=y
  42 +CONFIG_DM_REGULATOR_FIXED=y
  43 +CONFIG_DM_REGULATOR_GPIO=y
  44 +CONFIG_USB=y
  45 +CONFIG_DM_USB=y
  46 +CONFIG_USB_EHCI_HCD=y
  47 +CONFIG_USB_STORAGE=y
include/configs/mx6sll_arm2.h
Diff comments   View file @ df142b5
... ... @@ -11,26 +11,10 @@
11 11  
12 12 #include "mx6_common.h"
13 13  
14   -#undef CONFIG_CMD_SET
15 14  
16   -/* uncomment for PLUGIN mode support */
17   -/* #define CONFIG_USE_PLUGIN */
18   -
19   -/* uncomment for SECURE mode support */
20   -/* #define CONFIG_SECURE_BOOT */
21   -
22   -#ifdef CONFIG_SECURE_BOOT
23   -#ifndef CONFIG_CSF_SIZE
24   -#define CONFIG_CSF_SIZE 0x4000
25   -#endif
26   -#endif
27   -
28 15 /* Size of malloc() pool */
29 16 #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
30 17  
31   -#define CONFIG_BOARD_EARLY_INIT_F
32   -#define CONFIG_BOARD_LATE_INIT
33   -
34 18 #define CONFIG_MXC_UART
35 19 #define CONFIG_MXC_UART_BASE UART1_BASE
36 20  
37 21  
38 22  
39 23  
40 24  
... ... @@ -40,19 +24,24 @@
40 24 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */
41 25  
42 26 /* I2C Configs */
43   -#define CONFIG_CMD_I2C
  27 +#ifndef CONFIG_DM_I2C
44 28 #define CONFIG_SYS_I2C
  29 +#endif
  30 +#ifdef CONFIG_CMD_I2C
45 31 #define CONFIG_SYS_I2C_MXC
46 32 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
47 33 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
48 34 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
49 35 #define CONFIG_SYS_I2C_SPEED 100000
  36 +#endif
50 37  
51 38 /* PMIC */
  39 +#ifndef CONFIG_DM_PMIC
52 40 #define CONFIG_POWER
53 41 #define CONFIG_POWER_I2C
54 42 #define CONFIG_POWER_PFUZE100
55 43 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
  44 +#endif
56 45  
57 46 #define CONFIG_MFG_ENV_SETTINGS \
58 47 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
... ... @@ -74,7 +63,7 @@
74 63 "console=ttymxc0\0" \
75 64 "fdt_high=0xffffffff\0" \
76 65 "initrd_high=0xffffffff\0" \
77   - "fdt_file=imx6sll-lpddr3-arm2.dtb\0" \" \
  66 + "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \" \
78 67 "fdt_addr=0x83000000\0" \
79 68 "boot_fdt=try\0" \
80 69 "ip_dyn=yes\0" \
... ... @@ -145,7 +134,6 @@
145 134 "else run netboot; fi"
146 135  
147 136 /* Miscellaneous configurable options */
148   -#define CONFIG_CMD_MEMTEST
149 137 #define CONFIG_SYS_MEMTEST_START 0x80000000
150 138 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_128M)
151 139  
152 140  
153 141  
154 142  
... ... @@ -174,18 +162,16 @@
174 162 #define CONFIG_SYS_MMC_ENV_PART 0 /* user partition */
175 163 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
176 164  
177   -#ifdef CONFIG_SYS_BOOT_SPINOR
178   -#define CONFIG_SYS_USE_SPINOR
  165 +#ifdef CONFIG_SPI_BOOT
179 166 #define CONFIG_ENV_IS_IN_SPI_FLASH
180 167 #else
181 168 #define CONFIG_ENV_IS_IN_MMC
182   -#define CONFIG_VIDEO
183 169 #endif
184 170  
185 171 #if defined(CONFIG_ENV_IS_IN_MMC)
186   -#define CONFIG_ENV_OFFSET (12 * SZ_64K)
  172 +#define CONFIG_ENV_OFFSET (13 * SZ_64K)
187 173 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
188   -#define CONFIG_ENV_OFFSET (768 * 1024)
  174 +#define CONFIG_ENV_OFFSET (864 * 1024)
189 175 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
190 176 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
191 177 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
192 178  
193 179  
194 180  
195 181  
... ... @@ -193,33 +179,19 @@
193 179 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
194 180 #endif
195 181  
196   -/* Network */
197   -#define CONFIG_CMD_PING
198   -#define CONFIG_CMD_DHCP
199   -
200 182 /* USB Configs */
201   -#define CONFIG_CMD_USB
202 183 #ifdef CONFIG_CMD_USB
203   -#define CONFIG_USB_EHCI
204   -#define CONFIG_USB_EHCI_MX6
205   -#define CONFIG_USB_STORAGE
206   -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
207 184 #define CONFIG_USB_HOST_ETHER
208 185 #define CONFIG_USB_ETHER_ASIX
209 186 #define CONFIG_USB_ETHER_RTL8152
210 187 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
211   -#define CONFIG_MXC_USB_FLAGS 0
212   -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
213 188 #endif
214 189  
215 190 #define CONFIG_IMX_THERMAL
216 191  
217 192 #define CONFIG_IOMUX_LPSR
218 193  
219   -#ifdef CONFIG_SYS_USE_SPINOR
220   -#define CONFIG_CMD_SF
221   -#define CONFIG_SPI_FLASH
222   -#define CONFIG_SPI_FLASH_STMICRO
  194 +#ifdef CONFIG_CMD_SF
223 195 #define CONFIG_MXC_SPI
224 196 #define CONFIG_SF_DEFAULT_BUS 0
225 197 #define CONFIG_SF_DEFAULT_SPEED 20000000
226 198  
... ... @@ -228,12 +200,8 @@
228 200 #endif
229 201  
230 202 #ifdef CONFIG_VIDEO
231   -#define CONFIG_CFB_CONSOLE
232 203 #define CONFIG_VIDEO_MXS
233 204 #define CONFIG_VIDEO_LOGO
234   -#define CONFIG_VIDEO_SW_CURSOR
235   -#define CONFIG_VGA_AS_SINGLE_DEVICE
236   -#define CONFIG_SYS_CONSOLE_IS_IN_ENV
237 205 #define CONFIG_SPLASH_SCREEN
238 206 #define CONFIG_SPLASH_SCREEN_ALIGN
239 207 #define CONFIG_CMD_BMP