Eric Lee / smarc-uboot | Embedian Git Server

Commit df155672ff262dd779ef12c04d9fc1911b778990

Authored by Marek Vasut 2014-10-23 03:56:03 +0800

Committed by Jagannadha Sutradharudu Teki 2014-10-28 01:07:03 +0800

Exists in v2017.01-smarct4x and in 37 other branches

spi: altera: Add short note about EPCS/EPCQx1

Add short documentation-alike note on how to use the Altera SPI
driver with the EPCS/EPCQx1 FPGA IP block on SoCFPGA Cyclone V
into doc/SPI/README.altera_spi

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Pavel Machek <pavel@denx.de>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Acked-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>

Showing 1 changed file with 6 additions and 0 deletions Side-by-side Diff

doc/SPI/README.altera_spi

doc/SPI/README.altera_spi

Diff comments View file @ df15567

	1	+SoCFPGA EPCS/EPCQx1 mini howto:
	2	+- Instantiate EPCS/EPCQx1 Serial flash controller in QSys and rebuild
	3	+- The controller base address is the "Base" in QSys + 0x400
	4	+- Set MSEL[4:0]=10010 (AS Standard)
	5	+- Load the bitstream into FPGA, enable bridges
	6	+- Only then will the driver work