Commit e05e5de7fae5bec79617e113916dac6631251156

Authored by Albert ARIBAUD
1 parent 7528cf5f01

arm: move C runtime setup code in crt0.S

Move all the C runtime setup code from every start.S
in arch/arm into arch/arm/lib/crt0.S. This covers
the code sequence from setting up the initial stack
to calling into board_init_r().

Also, rewrite the C runtime setup and make functions
board_init_*() and relocate_code() behave according to
normal C semantics (no jumping across the C stack any
more, etc).

Some SPL targets had to be touched because they use
start.S explicitly or for some reason; the relevant
maintainers and custodians are cc:ed.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>

Showing 21 changed files with 326 additions and 678 deletions Side-by-side Diff

arch/arm/cpu/arm1136/start.S
... ... @@ -165,14 +165,8 @@
165 165 bl cpu_init_crit
166 166 #endif
167 167  
168   -/* Set stackpointer in internal RAM to call board_init_f */
169   -call_board_init_f:
170   - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
171   - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
172   - ldr r0,=0x00000000
  168 + bl _main
173 169  
174   - bl board_init_f
175   -
176 170 /*------------------------------------------------------------------------------*/
177 171  
178 172 /*
179 173  
... ... @@ -188,14 +182,10 @@
188 182 mov r5, r1 /* save addr of gd */
189 183 mov r6, r2 /* save addr of destination */
190 184  
191   - /* Set up the stack */
192   -stack_setup:
193   - mov sp, r4
194   -
195 185 adr r0, _start
196 186 cmp r0, r6
197 187 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
198   - beq clear_bss /* skip relocation */
  188 + beq relocate_done /* skip relocation */
199 189 mov r1, r6 /* r1 <- scratch for copy_loop */
200 190 ldr r3, _image_copy_end_ofs
201 191 add r2, r0, r3 /* r2 <- source end address */
202 192  
203 193  
204 194  
205 195  
206 196  
207 197  
... ... @@ -245,62 +235,29 @@
245 235 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
246 236 cmp r2, r3
247 237 blo fixloop
248   - b clear_bss
  238 + bx lr
249 239  
  240 +#endif
  241 +
  242 +relocate_done:
  243 +
  244 + bx lr
  245 +
  246 +#ifndef CONFIG_SPL_BUILD
  247 +
250 248 _rel_dyn_start_ofs:
251 249 .word __rel_dyn_start - _start
252 250 _rel_dyn_end_ofs:
253 251 .word __rel_dyn_end - _start
254 252 _dynsym_start_ofs:
255 253 .word __dynsym_start - _start
256   -#endif
257 254  
258   -clear_bss:
259   -#ifdef CONFIG_SPL_BUILD
260   - /* No relocation for SPL */
261   - ldr r0, =__bss_start
262   - ldr r1, =__bss_end__
263   -#else
264   - ldr r0, _bss_start_ofs
265   - ldr r1, _bss_end_ofs
266   - mov r4, r6 /* reloc addr */
267   - add r0, r0, r4
268   - add r1, r1, r4
269 255 #endif
270   - mov r2, #0x00000000 /* clear */
271 256  
272   -clbss_l:cmp r0, r1 /* clear loop... */
273   - bhs clbss_e /* if reached end of bss, exit */
274   - str r2, [r0]
275   - add r0, r0, #4
276   - b clbss_l
277   -clbss_e:
  257 + .globl c_runtime_cpu_setup
  258 +c_runtime_cpu_setup:
278 259  
279   -/*
280   - * We are done. Do not return, instead branch to second part of board
281   - * initialization, now running from RAM.
282   - */
283   -#ifdef CONFIG_NAND_SPL
284   - ldr r0, _nand_boot_ofs
285   - mov pc, r0
286   -
287   -_nand_boot_ofs:
288   - .word nand_boot
289   -#else
290   -jump_2_ram:
291   - ldr r0, _board_init_r_ofs
292   - adr r1, _start
293   - add lr, r0, r1
294   - add lr, lr, r9
295   - /* setup parameters for board_init_r */
296   - mov r0, r5 /* gd_t */
297   - mov r1, r6 /* dest_addr */
298   - /* jump to it ... */
299   - mov pc, lr
300   -
301   -_board_init_r_ofs:
302   - .word board_init_r - _start
303   -#endif
  260 + bx lr
304 261  
305 262 /*
306 263 *************************************************************************
arch/arm/cpu/arm1176/start.S
... ... @@ -224,12 +224,7 @@
224 224 */
225 225 bl lowlevel_init /* go setup pll,mux,memory */
226 226  
227   -/* Set stackpointer in internal RAM to call board_init_f */
228   -call_board_init_f:
229   - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
230   - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
231   - ldr r0,=0x00000000
232   - bl board_init_f
  227 + bl _main
233 228  
234 229 /*------------------------------------------------------------------------------*/
235 230  
236 231  
... ... @@ -246,14 +241,10 @@
246 241 mov r5, r1 /* save addr of gd */
247 242 mov r6, r2 /* save addr of destination */
248 243  
249   - /* Set up the stack */
250   -stack_setup:
251   - mov sp, r4
252   -
253 244 adr r0, _start
254 245 cmp r0, r6
255 246 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
256   - beq clear_bss /* skip relocation */
  247 + beq relocate_done /* skip relocation */
257 248 mov r1, r6 /* r1 <- scratch for copy_loop */
258 249 ldr r3, _bss_start_ofs
259 250 add r2, r0, r3 /* r2 <- source end address */
260 251  
261 252  
... ... @@ -343,50 +334,10 @@
343 334 skip_hw_init:
344 335 #endif
345 336  
346   -clear_bss:
347   -#ifndef CONFIG_SPL_BUILD
348   - ldr r0, _bss_start_ofs
349   - ldr r1, _bss_end_ofs
350   - mov r4, r6 /* reloc addr */
351   - add r0, r0, r4
352   - add r1, r1, r4
353   - mov r2, #0x00000000 /* clear */
  337 +relocate_done:
354 338  
355   -clbss_l:cmp r0, r1 /* clear loop... */
356   - bhs clbss_e /* if reached end of bss, exit */
357   - str r2, [r0]
358   - add r0, r0, #4
359   - b clbss_l
360   -clbss_e:
361   -#ifndef CONFIG_NAND_SPL
362   - bl coloured_LED_init
363   - bl red_led_on
364   -#endif
365   -#endif
  339 + bx lr
366 340  
367   -/*
368   - * We are done. Do not return, instead branch to second part of board
369   - * initialization, now running from RAM.
370   - */
371   -#ifdef CONFIG_NAND_SPL
372   - ldr pc, _nand_boot
373   -
374   -_nand_boot: .word nand_boot
375   -#else
376   - ldr r0, _board_init_r_ofs
377   - adr r1, _start
378   - add lr, r0, r1
379   - add lr, lr, r9
380   - /* setup parameters for board_init_r */
381   - mov r0, r5 /* gd_t */
382   - mov r1, r6 /* dest_addr */
383   - /* jump to it ... */
384   - mov pc, lr
385   -
386   -_board_init_r_ofs:
387   - .word board_init_r - _start
388   -#endif
389   -
390 341 _rel_dyn_start_ofs:
391 342 .word __rel_dyn_start - _start
392 343 _rel_dyn_end_ofs:
... ... @@ -398,6 +349,11 @@
398 349 _mmu_table_base:
399 350 .word mmu_table
400 351 #endif
  352 +
  353 + .globl c_runtime_cpu_setup
  354 +c_runtime_cpu_setup:
  355 +
  356 + mov pc, lr
401 357  
402 358 #ifndef CONFIG_NAND_SPL
403 359 /*
arch/arm/cpu/arm720t/start.S
... ... @@ -147,12 +147,7 @@
147 147 bl cpu_init_crit
148 148 #endif
149 149  
150   -/* Set stackpointer in internal RAM to call board_init_f */
151   -call_board_init_f:
152   - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
153   - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
154   - ldr r0,=0x00000000
155   - bl board_init_f
  150 + bl _main
156 151  
157 152 /*------------------------------------------------------------------------------*/
158 153  
159 154  
... ... @@ -169,14 +164,10 @@
169 164 mov r5, r1 /* save addr of gd */
170 165 mov r6, r2 /* save addr of destination */
171 166  
172   - /* Set up the stack */
173   -stack_setup:
174   - mov sp, r4
175   -
176 167 adr r0, _start
177 168 cmp r0, r6
178 169 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
179   - beq clear_bss /* skip relocation */
  170 + beq relocate_done /* skip relocation */
180 171 mov r1, r6 /* r1 <- scratch for copy_loop */
181 172 ldr r3, _bss_start_ofs
182 173 add r2, r0, r3 /* r2 <- source end address */
183 174  
184 175  
185 176  
... ... @@ -228,49 +219,21 @@
228 219 blo fixloop
229 220 #endif
230 221  
231   -clear_bss:
232   -#ifndef CONFIG_SPL_BUILD
233   - ldr r0, _bss_start_ofs
234   - ldr r1, _bss_end_ofs
235   - mov r4, r6 /* reloc addr */
236   - add r0, r0, r4
237   - add r1, r1, r4
238   - mov r2, #0x00000000 /* clear */
  222 +relocate_done:
239 223  
240   -clbss_l:cmp r0, r1 /* clear loop... */
241   - bhs clbss_e /* if reached end of bss, exit */
242   - str r2, [r0]
243   - add r0, r0, #4
244   - b clbss_l
245   -clbss_e:
246   -
247   - bl coloured_LED_init
248   - bl red_led_on
249   -#endif
250   -
251   -/*
252   - * We are done. Do not return, instead branch to second part of board
253   - * initialization, now running from RAM.
254   - */
255   - ldr r0, _board_init_r_ofs
256   - adr r1, _start
257   - add lr, r0, r1
258   - add lr, lr, r9
259   - /* setup parameters for board_init_r */
260   - mov r0, r5 /* gd_t */
261   - mov r1, r6 /* dest_addr */
262   - /* jump to it ... */
263 224 mov pc, lr
264 225  
265   -_board_init_r_ofs:
266   - .word board_init_r - _start
267   -
268 226 _rel_dyn_start_ofs:
269 227 .word __rel_dyn_start - _start
270 228 _rel_dyn_end_ofs:
271 229 .word __rel_dyn_end - _start
272 230 _dynsym_start_ofs:
273 231 .word __dynsym_start - _start
  232 +
  233 + .globl c_runtime_cpu_setup
  234 +c_runtime_cpu_setup:
  235 +
  236 + mov pc, lr
274 237  
275 238 /*
276 239 *************************************************************************
arch/arm/cpu/arm920t/start.S
... ... @@ -182,12 +182,7 @@
182 182 bl cpu_init_crit
183 183 #endif
184 184  
185   -/* Set stackpointer in internal RAM to call board_init_f */
186   -call_board_init_f:
187   - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
188   - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
189   - ldr r0,=0x00000000
190   - bl board_init_f
  185 + bl _main
191 186  
192 187 /*------------------------------------------------------------------------------*/
193 188  
194 189  
... ... @@ -204,14 +199,10 @@
204 199 mov r5, r1 /* save addr of gd */
205 200 mov r6, r2 /* save addr of destination */
206 201  
207   - /* Set up the stack */
208   -stack_setup:
209   - mov sp, r4
210   -
211 202 adr r0, _start
212 203 cmp r0, r6
213 204 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
214   - beq clear_bss /* skip relocation */
  205 + beq relocate_done /* skip relocation */
215 206 mov r1, r6 /* r1 <- scratch for copy_loop */
216 207 ldr r3, _bss_start_ofs
217 208 add r2, r0, r3 /* r2 <- source end address */
218 209  
219 210  
220 211  
... ... @@ -263,57 +254,21 @@
263 254 blo fixloop
264 255 #endif
265 256  
266   -clear_bss:
267   -#ifndef CONFIG_SPL_BUILD
268   - ldr r0, _bss_start_ofs
269   - ldr r1, _bss_end_ofs
270   - mov r4, r6 /* reloc addr */
271   - add r0, r0, r4
272   - add r1, r1, r4
273   - mov r2, #0x00000000 /* clear */
  257 +relocate_done:
274 258  
275   -clbss_l:cmp r0, r1 /* clear loop... */
276   - bhs clbss_e /* if reached end of bss, exit */
277   - str r2, [r0]
278   - add r0, r0, #4
279   - b clbss_l
280   -clbss_e:
281   -
282   - bl coloured_LED_init
283   - bl red_led_on
284   -#endif
285   -
286   -/*
287   - * We are done. Do not return, instead branch to second part of board
288   - * initialization, now running from RAM.
289   - */
290   -#ifdef CONFIG_NAND_SPL
291   - ldr r0, _nand_boot_ofs
292   - mov pc, r0
293   -
294   -_nand_boot_ofs:
295   - .word nand_boot
296   -#else
297   - ldr r0, _board_init_r_ofs
298   - adr r1, _start
299   - add lr, r0, r1
300   - add lr, lr, r9
301   - /* setup parameters for board_init_r */
302   - mov r0, r5 /* gd_t */
303   - mov r1, r6 /* dest_addr */
304   - /* jump to it ... */
305 259 mov pc, lr
306 260  
307   -_board_init_r_ofs:
308   - .word board_init_r - _start
309   -#endif
310   -
311 261 _rel_dyn_start_ofs:
312 262 .word __rel_dyn_start - _start
313 263 _rel_dyn_end_ofs:
314 264 .word __rel_dyn_end - _start
315 265 _dynsym_start_ofs:
316 266 .word __dynsym_start - _start
  267 +
  268 + .globl c_runtime_cpu_setup
  269 +c_runtime_cpu_setup:
  270 +
  271 + mov pc, lr
317 272  
318 273 /*
319 274 *************************************************************************
arch/arm/cpu/arm925t/start.S
... ... @@ -176,12 +176,7 @@
176 176 bl cpu_init_crit
177 177 #endif
178 178  
179   -/* Set stackpointer in internal RAM to call board_init_f */
180   -call_board_init_f:
181   - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
182   - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
183   - ldr r0,=0x00000000
184   - bl board_init_f
  179 + bl _main
185 180  
186 181 /*------------------------------------------------------------------------------*/
187 182  
188 183  
... ... @@ -198,14 +193,10 @@
198 193 mov r5, r1 /* save addr of gd */
199 194 mov r6, r2 /* save addr of destination */
200 195  
201   - /* Set up the stack */
202   -stack_setup:
203   - mov sp, r4
204   -
205 196 adr r0, _start
206 197 cmp r0, r6
207 198 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
208   - beq clear_bss /* skip relocation */
  199 + beq relocate_done /* skip relocation */
209 200 mov r1, r6 /* r1 <- scratch for copy_loop */
210 201 ldr r3, _bss_start_ofs
211 202 add r2, r0, r3 /* r2 <- source end address */
212 203  
213 204  
214 205  
... ... @@ -257,57 +248,21 @@
257 248 blo fixloop
258 249 #endif
259 250  
260   -clear_bss:
261   -#ifndef CONFIG_SPL_BUILD
262   - ldr r0, _bss_start_ofs
263   - ldr r1, _bss_end_ofs
264   - mov r4, r6 /* reloc addr */
265   - add r0, r0, r4
266   - add r1, r1, r4
267   - mov r2, #0x00000000 /* clear */
  251 +relocate_done:
268 252  
269   -clbss_l:cmp r0, r1 /* clear loop... */
270   - bhs clbss_e /* if reached end of bss, exit */
271   - str r2, [r0]
272   - add r0, r0, #4
273   - b clbss_l
274   -clbss_e:
275   -
276   - bl coloured_LED_init
277   - bl red_led_on
278   -#endif
279   -
280   -/*
281   - * We are done. Do not return, instead branch to second part of board
282   - * initialization, now running from RAM.
283   - */
284   -#ifdef CONFIG_NAND_SPL
285   - ldr r0, _nand_boot_ofs
286   - mov pc, r0
287   -
288   -_nand_boot_ofs:
289   - .word nand_boot
290   -#else
291   - ldr r0, _board_init_r_ofs
292   - adr r1, _start
293   - add lr, r0, r1
294   - add lr, lr, r9
295   - /* setup parameters for board_init_r */
296   - mov r0, r5 /* gd_t */
297   - mov r1, r6 /* dest_addr */
298   - /* jump to it ... */
299 253 mov pc, lr
300 254  
301   -_board_init_r_ofs:
302   - .word board_init_r - _start
303   -#endif
304   -
305 255 _rel_dyn_start_ofs:
306 256 .word __rel_dyn_start - _start
307 257 _rel_dyn_end_ofs:
308 258 .word __rel_dyn_end - _start
309 259 _dynsym_start_ofs:
310 260 .word __dynsym_start - _start
  261 +
  262 + .globl c_runtime_cpu_setup
  263 +c_runtime_cpu_setup:
  264 +
  265 + mov pc, lr
311 266  
312 267 /*
313 268 *************************************************************************
arch/arm/cpu/arm926ejs/start.S
... ... @@ -198,20 +198,7 @@
198 198 bl cpu_init_crit
199 199 #endif
200 200  
201   -/* Set stackpointer in internal RAM to call board_init_f */
202   -call_board_init_f:
203   -#ifdef CONFIG_NAND_SPL /* deprecated, use instead CONFIG_SPL_BUILD */
204   - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
205   -#else
206   -#ifdef CONFIG_SPL_BUILD
207   - ldr sp, =(CONFIG_SPL_STACK)
208   -#else
209   - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
210   -#endif
211   -#endif
212   - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
213   - ldr r0,=0x00000000
214   - bl board_init_f
  201 + bl _main
215 202  
216 203 /*------------------------------------------------------------------------------*/
217 204  
218 205  
... ... @@ -229,15 +216,11 @@
229 216 mov r5, r1 /* save addr of gd */
230 217 mov r6, r2 /* save addr of destination */
231 218  
232   - /* Set up the stack */
233   -stack_setup:
234   - mov sp, r4
235   -
236 219 adr r0, _start
237 220 sub r9, r6, r0 /* r9 <- relocation offset */
238 221 cmp r0, r6
239   - moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
240   - beq clear_bss /* skip relocation */
  222 + moveq r9, #0 /* no relocation. offset(r9) = 0 */
  223 + beq relocate_done /* skip relocation */
241 224 mov r1, r6 /* r1 <- scratch for copy loop */
242 225 ldr r3, _bss_start_ofs
243 226 add r2, r0, r3 /* r2 <- source end address */
244 227  
245 228  
246 229  
247 230  
... ... @@ -289,64 +272,23 @@
289 272 blo fixloop
290 273 #endif
291 274  
292   -clear_bss:
293   -#ifdef CONFIG_SPL_BUILD
294   - /* No relocation for SPL */
295   - ldr r0, =__bss_start
296   - ldr r1, =__bss_end__
297   -#else
298   - ldr r0, _bss_start_ofs
299   - ldr r1, _bss_end_ofs
300   - mov r4, r6 /* reloc addr */
301   - add r0, r0, r4
302   - add r1, r1, r4
303   -#endif
304   - mov r2, #0x00000000 /* clear */
  275 +relocate_done:
305 276  
306   -clbss_l:cmp r0, r1 /* clear loop... */
307   - bhs clbss_e /* if reached end of bss, exit */
308   - str r2, [r0]
309   - add r0, r0, #4
310   - b clbss_l
311   -clbss_e:
  277 + bx lr
312 278  
313   -#ifndef CONFIG_SPL_BUILD
314   - bl coloured_LED_init
315   - bl red_led_on
316   -#endif
317   -
318   -/*
319   - * We are done. Do not return, instead branch to second part of board
320   - * initialization, now running from RAM.
321   - */
322   -#ifdef CONFIG_NAND_SPL
323   - ldr r0, _nand_boot_ofs
324   - mov pc, r0
325   -
326   -_nand_boot_ofs:
327   - .word nand_boot
328   -#else
329   - ldr r0, _board_init_r_ofs
330   - ldr r1, _TEXT_BASE
331   - add lr, r0, r1
332   - add lr, lr, r9
333   - /* setup parameters for board_init_r */
334   - mov r0, r5 /* gd_t */
335   - mov r1, r6 /* dest_addr */
336   - /* jump to it ... */
337   - mov pc, lr
338   -
339   -_board_init_r_ofs:
340   - .word board_init_r - _start
341   -#endif
342   -
343 279 _rel_dyn_start_ofs:
344 280 .word __rel_dyn_start - _start
345 281 _rel_dyn_end_ofs:
346 282 .word __rel_dyn_end - _start
347 283 _dynsym_start_ofs:
348 284 .word __dynsym_start - _start
  285 +
349 286 #endif
  287 +
  288 + .globl c_runtime_cpu_setup
  289 +c_runtime_cpu_setup:
  290 +
  291 + bx lr
350 292  
351 293 /*
352 294 *************************************************************************
arch/arm/cpu/arm946es/start.S
... ... @@ -147,12 +147,7 @@
147 147 bl cpu_init_crit
148 148 #endif
149 149  
150   -/* Set stackpointer in internal RAM to call board_init_f */
151   -call_board_init_f:
152   - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
153   - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
154   - ldr r0,=0x00000000
155   - bl board_init_f
  150 + bl _main
156 151  
157 152 /*------------------------------------------------------------------------------*/
158 153  
159 154  
... ... @@ -169,14 +164,10 @@
169 164 mov r5, r1 /* save addr of gd */
170 165 mov r6, r2 /* save addr of destination */
171 166  
172   - /* Set up the stack */
173   -stack_setup:
174   - mov sp, r4
175   -
176 167 adr r0, _start
177 168 cmp r0, r6
178 169 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
179   - beq clear_bss /* skip relocation */
  170 + beq relocate_done /* skip relocation */
180 171 mov r1, r6 /* r1 <- scratch for copy_loop */
181 172 ldr r3, _bss_start_ofs
182 173 add r2, r0, r3 /* r2 <- source end address */
183 174  
184 175  
185 176  
... ... @@ -228,52 +219,21 @@
228 219 blo fixloop
229 220 #endif
230 221  
231   -clear_bss:
232   -#ifndef CONFIG_SPL_BUILD
233   - ldr r0, _bss_start_ofs
234   - ldr r1, _bss_end_ofs
235   - mov r4, r6 /* reloc addr */
236   - add r0, r0, r4
237   - add r1, r1, r4
238   - mov r2, #0x00000000 /* clear */
  222 +relocate_done:
239 223  
240   -clbss_l:cmp r0, r1 /* clear loop... */
241   - bhs clbss_e /* if reached end of bss, exit */
242   - str r2, [r0]
243   - add r0, r0, #4
244   - b clbss_l
245   -clbss_e:
246   -#endif
247   -
248   -/*
249   - * We are done. Do not return, instead branch to second part of board
250   - * initialization, now running from RAM.
251   - */
252   -#ifdef CONFIG_NAND_SPL
253   - ldr pc, _nand_boot
254   -
255   -_nand_boot: .word nand_boot
256   -#else
257   - ldr r0, _board_init_r_ofs
258   - adr r1, _start
259   - add lr, r0, r1
260   - add lr, lr, r9
261   - /* setup parameters for board_init_r */
262   - mov r0, r5 /* gd_t */
263   - mov r1, r6 /* dest_addr */
264   - /* jump to it ... */
265 224 mov pc, lr
266 225  
267   -_board_init_r_ofs:
268   - .word board_init_r - _start
269   -#endif
270   -
271 226 _rel_dyn_start_ofs:
272 227 .word __rel_dyn_start - _start
273 228 _rel_dyn_end_ofs:
274 229 .word __rel_dyn_end - _start
275 230 _dynsym_start_ofs:
276 231 .word __dynsym_start - _start
  232 +
  233 + .globl c_runtime_cpu_setup
  234 +c_runtime_cpu_setup:
  235 +
  236 + mov pc, lr
277 237  
278 238 /*
279 239 *************************************************************************
arch/arm/cpu/arm_intcm/start.S
... ... @@ -143,12 +143,7 @@
143 143 bl cpu_init_crit
144 144 #endif
145 145  
146   -/* Set stackpointer in internal RAM to call board_init_f */
147   -call_board_init_f:
148   - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
149   - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
150   - ldr r0,=0x00000000
151   - bl board_init_f
  146 + bl _main
152 147  
153 148 /*------------------------------------------------------------------------------*/
154 149  
155 150  
... ... @@ -165,14 +160,10 @@
165 160 mov r5, r1 /* save addr of gd */
166 161 mov r6, r2 /* save addr of destination */
167 162  
168   - /* Set up the stack */
169   -stack_setup:
170   - mov sp, r4
171   -
172 163 adr r0, _start
173 164 cmp r0, r6
174 165 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
175   - beq clear_bss /* skip relocation */
  166 + beq relocate_done /* skip relocation */
176 167 mov r1, r6 /* r1 <- scratch for copy_loop */
177 168 ldr r3, _bss_start_ofs
178 169 add r2, r0, r3 /* r2 <- source end address */
179 170  
180 171  
181 172  
... ... @@ -224,57 +215,21 @@
224 215 blo fixloop
225 216 #endif
226 217  
227   -clear_bss:
228   -#ifndef CONFIG_SPL_BUILD
229   - ldr r0, _bss_start_ofs
230   - ldr r1, _bss_end_ofs
231   - mov r4, r6 /* reloc addr */
232   - add r0, r0, r4
233   - add r1, r1, r4
234   - mov r2, #0x00000000 /* clear */
  218 +relocate_done:
235 219  
236   -clbss_l:cmp r0, r1 /* clear loop... */
237   - bhs clbss_e /* if reached end of bss, exit */
238   - str r2, [r0]
239   - add r0, r0, #4
240   - b clbss_l
241   -clbss_e:
  220 + bx lr
242 221  
243   - bl coloured_LED_init
244   - bl red_led_on
245   -#endif
246   -
247   -/*
248   - * We are done. Do not return, instead branch to second part of board
249   - * initialization, now running from RAM.
250   - */
251   -#ifdef CONFIG_NAND_SPL
252   - ldr r0, _nand_boot_ofs
253   - mov pc, r0
254   -
255   -_nand_boot_ofs:
256   - .word nand_boot
257   -#else
258   - ldr r0, _board_init_r_ofs
259   - adr r1, _start
260   - add lr, r0, r1
261   - add lr, lr, r9
262   - /* setup parameters for board_init_r */
263   - mov r0, r5 /* gd_t */
264   - mov r1, r6 /* dest_addr */
265   - /* jump to it ... */
266   - mov pc, lr
267   -
268   -_board_init_r_ofs:
269   - .word board_init_r - _start
270   -#endif
271   -
272 222 _rel_dyn_start_ofs:
273 223 .word __rel_dyn_start - _start
274 224 _rel_dyn_end_ofs:
275 225 .word __rel_dyn_end - _start
276 226 _dynsym_start_ofs:
277 227 .word __dynsym_start - _start
  228 +
  229 + .globl c_runtime_cpu_setup
  230 +c_runtime_cpu_setup:
  231 +
  232 + mov pc, lr
278 233  
279 234 /*
280 235 *************************************************************************
arch/arm/cpu/armv7/start.S
... ... @@ -155,12 +155,7 @@
155 155 bl cpu_init_crit
156 156 #endif
157 157  
158   -/* Set stackpointer in internal RAM to call board_init_f */
159   -call_board_init_f:
160   - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
161   - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
162   - ldr r0,=0x00000000
163   - bl board_init_f
  158 + bl _main
164 159  
165 160 /*------------------------------------------------------------------------------*/
166 161  
167 162  
... ... @@ -177,14 +172,10 @@
177 172 mov r5, r1 /* save addr of gd */
178 173 mov r6, r2 /* save addr of destination */
179 174  
180   - /* Set up the stack */
181   -stack_setup:
182   - mov sp, r4
183   -
184 175 adr r0, _start
185 176 cmp r0, r6
186 177 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
187   - beq clear_bss /* skip relocation */
  178 + beq relocate_done /* skip relocation */
188 179 mov r1, r6 /* r1 <- scratch for copy_loop */
189 180 ldr r3, _image_copy_end_ofs
190 181 add r2, r0, r3 /* r2 <- source end address */
191 182  
192 183  
193 184  
194 185  
... ... @@ -233,35 +224,23 @@
233 224 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
234 225 cmp r2, r3
235 226 blo fixloop
236   - b clear_bss
  227 +
  228 +relocate_done:
  229 +
  230 + bx lr
  231 +
237 232 _rel_dyn_start_ofs:
238 233 .word __rel_dyn_start - _start
239 234 _rel_dyn_end_ofs:
240 235 .word __rel_dyn_end - _start
241 236 _dynsym_start_ofs:
242 237 .word __dynsym_start - _start
  238 +ENDPROC(relocate_code)
243 239  
244   -clear_bss:
245   - ldr r0, _bss_start_ofs
246   - ldr r1, _bss_end_ofs
247   - mov r4, r6 /* reloc addr */
248   - add r0, r0, r4
249   - add r1, r1, r4
250   - mov r2, #0x00000000 /* clear */
  240 +#endif
251 241  
252   -clbss_l:cmp r0, r1 /* clear loop... */
253   - bhs clbss_e /* if reached end of bss, exit */
254   - str r2, [r0]
255   - add r0, r0, #4
256   - b clbss_l
257   -clbss_e:
258   -
  242 +ENTRY(c_runtime_cpu_setup)
259 243 /*
260   - * We are done. Do not return, instead branch to second part of board
261   - * initialization, now running from RAM.
262   - */
263   -jump_2_ram:
264   -/*
265 244 * If I-cache is enabled invalidate it
266 245 */
267 246 #ifndef CONFIG_SYS_ICACHE_OFF
268 247  
... ... @@ -279,20 +258,9 @@
279 258 mcr p15, 0, r0, c12, c0, 0 @Set VBAR
280 259 #endif /* !Tegra20 */
281 260  
282   - ldr r0, _board_init_r_ofs
283   - adr r1, _start
284   - add lr, r0, r1
285   - add lr, lr, r9
286   - /* setup parameters for board_init_r */
287   - mov r0, r5 /* gd_t */
288   - mov r1, r6 /* dest_addr */
289   - /* jump to it ... */
290   - mov pc, lr
  261 + bx lr
291 262  
292   -_board_init_r_ofs:
293   - .word board_init_r - _start
294   -ENDPROC(relocate_code)
295   -#endif
  263 +ENDPROC(c_runtime_cpu_setup)
296 264  
297 265 /*************************************************************************
298 266 *
arch/arm/cpu/ixp/start.S
... ... @@ -245,12 +245,7 @@
245 245 orr r0,r0,#0x13
246 246 msr cpsr,r0
247 247  
248   -/* Set initial stackpointer in SDRAM to call board_init_f */
249   -call_board_init_f:
250   - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
251   - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
252   - ldr r0,=0x00000000
253   - bl board_init_f
  248 + bl _main
254 249  
255 250 /*------------------------------------------------------------------------------*/
256 251  
257 252  
... ... @@ -267,14 +262,10 @@
267 262 mov r5, r1 /* save addr of gd */
268 263 mov r6, r2 /* save addr of destination */
269 264  
270   - /* Set up the stack */
271   -stack_setup:
272   - mov sp, r4
273   -
274 265 adr r0, _start
275 266 cmp r0, r6
276 267 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
277   - beq clear_bss /* skip relocation */
  268 + beq relocate_done /* skip relocation */
278 269 mov r1, r6 /* r1 <- scratch for copy_loop */
279 270 ldr r3, _bss_start_ofs
280 271 add r2, r0, r3 /* r2 <- source end address */
281 272  
282 273  
283 274  
... ... @@ -326,49 +317,21 @@
326 317 blo fixloop
327 318 #endif
328 319  
329   -clear_bss:
330   -#ifndef CONFIG_SPL_BUILD
331   - ldr r0, _bss_start_ofs
332   - ldr r1, _bss_end_ofs
333   - mov r4, r6 /* reloc addr */
334   - add r0, r0, r4
335   - add r1, r1, r4
336   - mov r2, #0x00000000 /* clear */
  320 +relocate_done:
337 321  
338   -clbss_l:cmp r0, r1 /* clear loop... */
339   - bhs clbss_e /* if reached end of bss, exit */
340   - str r2, [r0]
341   - add r0, r0, #4
342   - b clbss_l
343   -clbss_e:
  322 + bx lr
344 323  
345   - bl coloured_LED_init
346   - bl red_led_on
347   -#endif
348   -
349   -/*
350   - * We are done. Do not return, instead branch to second part of board
351   - * initialization, now running from RAM.
352   - */
353   - ldr r0, _board_init_r_ofs
354   - adr r1, _start
355   - add lr, r0, r1
356   - add lr, lr, r9
357   - /* setup parameters for board_init_r */
358   - mov r0, r5 /* gd_t */
359   - mov r1, r6 /* dest_addr */
360   - /* jump to it ... */
361   - mov pc, lr
362   -
363   -_board_init_r_ofs:
364   - .word board_init_r - _start
365   -
366 324 _rel_dyn_start_ofs:
367 325 .word __rel_dyn_start - _start
368 326 _rel_dyn_end_ofs:
369 327 .word __rel_dyn_end - _start
370 328 _dynsym_start_ofs:
371 329 .word __dynsym_start - _start
  330 +
  331 + .globl c_runtime_cpu_setup
  332 +c_runtime_cpu_setup:
  333 +
  334 + bx lr
372 335  
373 336 /****************************************************************************/
374 337 /* */
arch/arm/cpu/pxa/start.S
... ... @@ -164,12 +164,7 @@
164 164 bl lock_cache_for_stack
165 165 #endif
166 166  
167   -/* Set stackpointer in internal RAM to call board_init_f */
168   -call_board_init_f:
169   - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
170   - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
171   - ldr r0, =0x00000000
172   - bl board_init_f
  167 + bl _main
173 168  
174 169 /*------------------------------------------------------------------------------*/
175 170 #ifndef CONFIG_SPL_BUILD
... ... @@ -186,10 +181,6 @@
186 181 mov r5, r1 /* save addr of gd */
187 182 mov r6, r2 /* save addr of destination */
188 183  
189   - /* Set up the stack */
190   -stack_setup:
191   - mov sp, r4
192   -
193 184 /* Disable the Dcache RAM lock for stack now */
194 185 #ifdef CONFIG_CPU_PXA25X
195 186 bl cpu_init_crit
... ... @@ -198,7 +189,7 @@
198 189 adr r0, _start
199 190 cmp r0, r6
200 191 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
201   - beq clear_bss /* skip relocation */
  192 + beq relocate_done /* skip relocation */
202 193 mov r1, r6 /* r1 <- scratch for copy_loop */
203 194 ldr r3, _bss_start_ofs
204 195 add r2, r0, r3 /* r2 <- source end address */
205 196  
206 197  
207 198  
208 199  
... ... @@ -250,56 +241,24 @@
250 241 blo fixloop
251 242 #endif
252 243  
253   -clear_bss:
254   -#ifndef CONFIG_SPL_BUILD
255   - ldr r0, _bss_start_ofs
256   - ldr r1, _bss_end_ofs
257   - mov r4, r6 /* reloc addr */
258   - add r0, r0, r4
259   - add r1, r1, r4
260   - mov r2, #0x00000000 /* clear */
  244 +relocate_done:
261 245  
262   -clbss_l:cmp r0, r1 /* clear loop... */
263   - bhs clbss_e /* if reached end of bss, exit */
264   - str r2, [r0]
265   - add r0, r0, #4
266   - b clbss_l
267   -clbss_e:
268   -#endif /* #ifndef CONFIG_SPL_BUILD */
  246 + bx lr
269 247  
270   -/*
271   - * We are done. Do not return, instead branch to second part of board
272   - * initialization, now running from RAM.
273   - */
274   -#ifdef CONFIG_ONENAND_SPL
275   - ldr r0, _onenand_boot_ofs
276   - mov pc, r0
277   -
278   -_onenand_boot_ofs:
279   - .word onenand_boot
280   -#else
281   -jump_2_ram:
282   - ldr r0, _board_init_r_ofs
283   - ldr r1, _TEXT_BASE
284   - add lr, r0, r1
285   - add lr, lr, r9
286   - /* setup parameters for board_init_r */
287   - mov r0, r5 /* gd_t */
288   - mov r1, r6 /* dest_addr */
289   - /* jump to it ... */
290   - mov pc, lr
291   -
292   -_board_init_r_ofs:
293   - .word board_init_r - _start
294   -#endif
295   -
296 248 _rel_dyn_start_ofs:
297 249 .word __rel_dyn_start - _start
298 250 _rel_dyn_end_ofs:
299 251 .word __rel_dyn_end - _start
300 252 _dynsym_start_ofs:
301 253 .word __dynsym_start - _start
  254 +
302 255 #endif
  256 +
  257 + .globl c_runtime_cpu_setup
  258 +c_runtime_cpu_setup:
  259 +
  260 + bx lr
  261 +
303 262 /*
304 263 *************************************************************************
305 264 *
arch/arm/cpu/s3c44b0/start.S
... ... @@ -128,12 +128,7 @@
128 128 bl lowlevel_init
129 129 #endif
130 130  
131   -/* Set stackpointer in internal RAM to call board_init_f */
132   -call_board_init_f:
133   - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
134   - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
135   - ldr r0,=0x00000000
136   - bl board_init_f
  131 + bl _main
137 132  
138 133 /*------------------------------------------------------------------------------*/
139 134  
140 135  
... ... @@ -150,14 +145,10 @@
150 145 mov r5, r1 /* save addr of gd */
151 146 mov r6, r2 /* save addr of destination */
152 147  
153   - /* Set up the stack */
154   -stack_setup:
155   - mov sp, r4
156   -
157 148 adr r0, _start
158 149 cmp r0, r6
159 150 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
160   - beq clear_bss /* skip relocation */
  151 + beq relocate_done /* skip relocation */
161 152 mov r1, r6 /* r1 <- scratch for copy_loop */
162 153 ldr r3, _bss_start_ofs
163 154 add r2, r0, r3 /* r2 <- source end address */
164 155  
165 156  
166 157  
... ... @@ -209,49 +200,21 @@
209 200 blo fixloop
210 201 #endif
211 202  
212   -clear_bss:
213   -#ifndef CONFIG_SPL_BUILD
214   - ldr r0, _bss_start_ofs
215   - ldr r1, _bss_end_ofs
216   - mov r4, r6 /* reloc addr */
217   - add r0, r0, r4
218   - add r1, r1, r4
219   - mov r2, #0x00000000 /* clear */
  203 +relocate_done:
220 204  
221   -clbss_l:cmp r0, r1 /* clear loop... */
222   - bhs clbss_e /* if reached end of bss, exit */
223   - str r2, [r0]
224   - add r0, r0, #4
225   - b clbss_l
226   -clbss_e:
  205 + bx lr
227 206  
228   - bl coloured_LED_init
229   - bl red_led_on
230   -#endif
231   -
232   -/*
233   - * We are done. Do not return, instead branch to second part of board
234   - * initialization, now running from RAM.
235   - */
236   - ldr r0, _board_init_r_ofs
237   - adr r1, _start
238   - add lr, r0, r1
239   - add lr, lr, r9
240   - /* setup parameters for board_init_r */
241   - mov r0, r5 /* gd_t */
242   - mov r1, r6 /* dest_addr */
243   - /* jump to it ... */
244   - mov pc, lr
245   -
246   -_board_init_r_ofs:
247   - .word board_init_r - _start
248   -
249 207 _rel_dyn_start_ofs:
250 208 .word __rel_dyn_start - _start
251 209 _rel_dyn_end_ofs:
252 210 .word __rel_dyn_end - _start
253 211 _dynsym_start_ofs:
254 212 .word __dynsym_start - _start
  213 +
  214 + .globl c_runtime_cpu_setup
  215 +c_runtime_cpu_setup:
  216 +
  217 + bx lr
255 218  
256 219 /*
257 220 *************************************************************************
arch/arm/cpu/sa1100/start.S
... ... @@ -132,12 +132,7 @@
132 132 bl cpu_init_crit
133 133 #endif
134 134  
135   -/* Set stackpointer in internal RAM to call board_init_f */
136   -call_board_init_f:
137   - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
138   - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
139   - ldr r0,=0x00000000
140   - bl board_init_f
  135 + bl _main
141 136  
142 137 /*------------------------------------------------------------------------------*/
143 138  
144 139  
... ... @@ -154,14 +149,10 @@
154 149 mov r5, r1 /* save addr of gd */
155 150 mov r6, r2 /* save addr of destination */
156 151  
157   - /* Set up the stack */
158   -stack_setup:
159   - mov sp, r4
160   -
161 152 adr r0, _start
162 153 cmp r0, r6
163 154 moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
164   - beq clear_bss /* skip relocation */
  155 + beq relocate_done /* skip relocation */
165 156 mov r1, r6 /* r1 <- scratch for copy_loop */
166 157 ldr r3, _bss_start_ofs
167 158 add r2, r0, r3 /* r2 <- source end address */
168 159  
169 160  
170 161  
... ... @@ -213,46 +204,21 @@
213 204 blo fixloop
214 205 #endif
215 206  
216   -clear_bss:
217   -#ifndef CONFIG_SPL_BUILD
218   - ldr r0, _bss_start_ofs
219   - ldr r1, _bss_end_ofs
220   - mov r4, r6 /* reloc addr */
221   - add r0, r0, r4
222   - add r1, r1, r4
223   - mov r2, #0x00000000 /* clear */
  207 +relocate_done:
224 208  
225   -clbss_l:cmp r0, r1 /* clear loop... */
226   - bhs clbss_e /* if reached end of bss, exit */
227   - str r2, [r0]
228   - add r0, r0, #4
229   - b clbss_l
230   -clbss_e:
231   -#endif
232   -
233   -/*
234   - * We are done. Do not return, instead branch to second part of board
235   - * initialization, now running from RAM.
236   - */
237   - ldr r0, _board_init_r_ofs
238   - adr r1, _start
239   - add lr, r0, r1
240   - add lr, lr, r9
241   - /* setup parameters for board_init_r */
242   - mov r0, r5 /* gd_t */
243   - mov r1, r6 /* dest_addr */
244   - /* jump to it ... */
245 209 mov pc, lr
246 210  
247   -_board_init_r_ofs:
248   - .word board_init_r - _start
249   -
250 211 _rel_dyn_start_ofs:
251 212 .word __rel_dyn_start - _start
252 213 _rel_dyn_end_ofs:
253 214 .word __rel_dyn_end - _start
254 215 _dynsym_start_ofs:
255 216 .word __dynsym_start - _start
  217 +
  218 + .globl c_runtime_cpu_setup
  219 +c_runtime_cpu_setup:
  220 +
  221 + mov pc, lr
256 222  
257 223 /*
258 224 *************************************************************************
arch/arm/lib/Makefile
... ... @@ -36,6 +36,8 @@
36 36  
37 37 GLCOBJS += div0.o
38 38  
  39 +SOBJS-y += crt0.o
  40 +
39 41 ifndef CONFIG_SPL_BUILD
40 42 COBJS-y += board.o
41 43 COBJS-y += bootm.o
arch/arm/lib/board.c
... ... @@ -279,11 +279,6 @@
279 279  
280 280 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
281 281  
282   - /* Pointer is writable since we allocated a register for it */
283   - gd = (gd_t *) ((CONFIG_SYS_INIT_SP_ADDR) & ~0x07);
284   - /* compiler optimization barrier needed for GCC >= 3.4 */
285   - __asm__ __volatile__("": : :"memory");
286   -
287 282 memset((void *)gd, 0, sizeof(gd_t));
288 283  
289 284 gd->mon_len = _bss_end_ofs;
... ... @@ -465,10 +460,6 @@
465 460 gd->fdt_blob = new_fdt;
466 461 }
467 462 memcpy(id, (void *)gd, sizeof(gd_t));
468   -
469   - relocate_code(addr_sp, id, addr);
470   -
471   - /* NOTREACHED - relocate_code() does not return */
472 463 }
473 464  
474 465 #if !defined(CONFIG_SYS_NO_FLASH)
... ... @@ -492,8 +483,6 @@
492 483 #if !defined(CONFIG_SYS_NO_FLASH)
493 484 ulong flash_size;
494 485 #endif
495   -
496   - gd = id;
497 486  
498 487 gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
499 488 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_R, "board_init_r");
  1 +/*
  2 + * crt0 - C-runtime startup Code for ARM U-Boot
  3 + *
  4 + * Copyright (c) 2012 Albert ARIBAUD <albert.u.boot@aribaud.net>
  5 + *
  6 + * See file CREDITS for list of people who contributed to this
  7 + * project.
  8 + *
  9 + * This program is free software; you can redistribute it and/or
  10 + * modify it under the terms of the GNU General Public License as
  11 + * published by the Free Software Foundation; either version 2 of
  12 + * the License, or (at your option) any later version.
  13 + *
  14 + * This program is distributed in the hope that it will be useful,
  15 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17 + * GNU General Public License for more details.
  18 + *
  19 + * You should have received a copy of the GNU General Public License
  20 + * along with this program; if not, write to the Free Software
  21 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22 + * MA 02111-1307 USA
  23 + */
  24 +
  25 +#include <config.h>
  26 +#include <asm-offsets.h>
  27 +
  28 +/*
  29 + * This file handles the target-independent stages of the U-Boot
  30 + * start-up where a C runtime environment is needed. Its entry point
  31 + * is _main and is branched into from the target's start.S file.
  32 + *
  33 + * _main execution sequence is:
  34 + *
  35 + * 1. Set up initial environment for calling board_init_f().
  36 + * This environment only provides a stack and a place to store
  37 + * the GD ('global data') structure, both located in some readily
  38 + * available RAM (SRAM, locked cache...). In this context, VARIABLE
  39 + * global data, initialized or not (BSS), are UNAVAILABLE; only
  40 + * CONSTANT initialized data are available.
  41 + *
  42 + * 2. Call board_init_f(). This function prepares the hardware for
  43 + * execution from system RAM (DRAM, DDR...) As system RAM may not
  44 + * be available yet, , board_init_f() must use the current GD to
  45 + * store any data which must be passed on to later stages. These
  46 + * data include the relocation destination, the future stack, and
  47 + * the future GD location.
  48 + *
  49 + * (the following applies only to non-SPL builds)
  50 + *
  51 + * 3. Set up intermediate environment where the stack and GD are the
  52 + * ones allocated by board_init_f() in system RAM, but BSS and
  53 + * initialized non-const data are still not available.
  54 + *
  55 + * 4. Call relocate_code(). This function relocates U-Boot from its
  56 + * current location into the relocation destination computed by
  57 + * board_init_f().
  58 + *
  59 + * 5. Set up final environment for calling board_init_r(). This
  60 + * environment has BSS (initialized to 0), initialized non-const
  61 + * data (initialized to their intended value), and stack in system
  62 + * RAM. GD has retained values set by board_init_f(). Some CPUs
  63 + * have some work left to do at this point regarding memory, so
  64 + * call c_runtime_cpu_setup.
  65 + *
  66 + * 6. Branch to either nand_boot() or board_init_r().
  67 + */
  68 +
  69 +/*
  70 + * declare nand_boot() or board_init_r() to jump to at end of crt0
  71 + */
  72 +
  73 +#if defined(CONFIG_NAND_SPL)
  74 +
  75 +.globl nand_boot
  76 +
  77 +#elif ! defined(CONFIG_SPL_BUILD)
  78 +
  79 +.globl board_init_r
  80 +
  81 +#endif
  82 +
  83 +/*
  84 + * start and end of BSS
  85 + */
  86 +
  87 +.globl __bss_start
  88 +.globl __bss_end__
  89 +
  90 +/*
  91 + * entry point of crt0 sequence
  92 + */
  93 +
  94 +.global _main
  95 +
  96 +_main:
  97 +
  98 +/*
  99 + * Set up initial C runtime environment and call board_init_f(0).
  100 + */
  101 +
  102 +#if defined(CONFIG_NAND_SPL)
  103 + /* deprecated, use instead CONFIG_SPL_BUILD */
  104 + ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
  105 +#elif defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
  106 + ldr sp, =(CONFIG_SPL_STACK)
  107 +#else
  108 + ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
  109 +#endif
  110 + bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
  111 + sub sp, #GD_SIZE /* allocate one GD above SP */
  112 + bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
  113 + mov r8, sp /* GD is above SP */
  114 + mov r0, #0
  115 + bl board_init_f
  116 +
  117 +#if ! defined(CONFIG_SPL_BUILD)
  118 +
  119 +/*
  120 + * Set up intermediate environment (new sp and gd) and call
  121 + * relocate_code(addr_sp, gd, addr_moni). Trick here is that
  122 + * we'll return 'here' but relocated.
  123 + */
  124 +
  125 + ldr sp, [r8, #GD_START_ADDR_SP] /* r8 = gd->start_addr_sp */
  126 + bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
  127 + ldr r8, [r8, #GD_BD] /* r8 = gd->bd */
  128 + sub r8, r8, #GD_SIZE /* new GD is below bd */
  129 +
  130 + adr lr, here
  131 + ldr r0, [r8, #GD_RELOC_OFF] /* lr = gd->start_addr_sp */
  132 + add lr, lr, r0
  133 + ldr r0, [r8, #GD_START_ADDR_SP] /* r0 = gd->start_addr_sp */
  134 + mov r1, r8 /* r1 = gd */
  135 + ldr r2, [r8, #GD_RELOCADDR] /* r2 = gd->relocaddr */
  136 + b relocate_code
  137 +here:
  138 +
  139 +/* Set up final (full) environment */
  140 +
  141 + bl c_runtime_cpu_setup /* we still call old routine here */
  142 +
  143 + ldr r0, =__bss_start /* this is auto-relocated! */
  144 + ldr r1, =__bss_end__ /* this is auto-relocated! */
  145 +
  146 + mov r2, #0x00000000 /* prepare zero to clear BSS */
  147 +
  148 +clbss_l:cmp r0, r1 /* while not at end of BSS */
  149 + strlo r2, [r0] /* clear 32-bit BSS word */
  150 + addlo r0, r0, #4 /* move to next */
  151 + blo clbss_l
  152 +
  153 + bl coloured_LED_init
  154 + bl red_led_on
  155 +
  156 +#if defined(CONFIG_NAND_SPL)
  157 +
  158 + /* call _nand_boot() */
  159 + ldr pc, =nand_boot
  160 +
  161 +#else
  162 +
  163 + /* call board_init_r(gd_t *id, ulong dest_addr) */
  164 + mov r0, r8 /* gd_t */
  165 + ldr r1, [r8, #GD_RELOCADDR] /* dest_addr */
  166 + /* call board_init_r */
  167 + ldr pc, =board_init_r /* this is auto-relocated! */
  168 +
  169 +#endif
  170 +
  171 + /* we should not return here. */
  172 +
  173 +#endif
... ... @@ -300,7 +300,7 @@
300 300 extern char console_buffer[];
301 301  
302 302 /* arch/$(ARCH)/lib/board.c */
303   -void board_init_f (ulong) __attribute__ ((noreturn));
  303 +void board_init_f(ulong);
304 304 void board_init_r (gd_t *, ulong) __attribute__ ((noreturn));
305 305 int checkboard (void);
306 306 int checkflash (void);
include/configs/socfpga_cyclone5.h
... ... @@ -65,7 +65,7 @@
65 65 #define CONFIG_SYS_BOOTMAPSZ ((256*1024*1024) - (4*1024))
66 66  
67 67 #define CONFIG_SPL_RAM_DEVICE
68   -#define CONFIG_SPL_STACK (&__stack_start)
  68 +#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
69 69 #define CONFIG_SYS_SPL_MALLOC_START ((unsigned long) (&__malloc_start))
70 70 #define CONFIG_SYS_SPL_MALLOC_SIZE (&__malloc_end - &__malloc_start)
71 71  
... ... @@ -28,6 +28,20 @@
28 28 DEFINE(GENERATED_BD_INFO_SIZE,
29 29 (sizeof(struct bd_info) + 15) & ~15);
30 30  
  31 + DEFINE(GD_SIZE, sizeof(struct global_data));
  32 +
  33 + DEFINE(GD_BD, offsetof(struct global_data, bd));
  34 +
  35 +#if defined(CONFIG_ARM)
  36 +
  37 + DEFINE(GD_RELOCADDR, offsetof(struct global_data, relocaddr));
  38 +
  39 + DEFINE(GD_RELOC_OFF, offsetof(struct global_data, reloc_off));
  40 +
  41 + DEFINE(GD_START_ADDR_SP, offsetof(struct global_data, start_addr_sp));
  42 +
  43 +#endif
  44 +
31 45 return 0;
32 46 }
nand_spl/board/freescale/mx31pdk/Makefile
... ... @@ -12,11 +12,12 @@
12 12 AFLAGS += -DCONFIG_SPL_BUILD -DCONFIG_NAND_SPL
13 13 CFLAGS += -DCONFIG_SPL_BUILD -DCONFIG_NAND_SPL
14 14  
15   -SOBJS = start.o lowlevel_init.o
  15 +SOBJS = start.o crt0.o lowlevel_init.o
16 16 COBJS = nand_boot_fsl_nfc.o
17 17  
18 18 SRCS := $(SRCTREE)/nand_spl/nand_boot_fsl_nfc.c
19 19 SRCS += $(SRCTREE)/arch/arm/cpu/arm1136/start.S
  20 +SRCS += $(SRCTREE)/arch/arm/lib/crt0.S
20 21 SRCS += $(SRCTREE)/board/freescale/mx31pdk/lowlevel_init.S
21 22 OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
22 23 __OBJS := $(SOBJS) $(COBJS)
... ... @@ -48,6 +49,9 @@
48 49 #########################################################################
49 50  
50 51 $(obj)%.o: $(SRCTREE)/arch/arm/cpu/arm1136/%.S
  52 + $(CC) $(AFLAGS) -c -o $@ $<
  53 +
  54 +$(obj)%.o: $(SRCTREE)/arch/arm/lib/%.S
51 55 $(CC) $(AFLAGS) -c -o $@ $<
52 56  
53 57 $(obj)%.o: $(SRCTREE)/board/freescale/mx31pdk/%.S
nand_spl/board/karo/tx25/Makefile
... ... @@ -33,11 +33,12 @@
33 33 AFLAGS += -DCONFIG_SPL_BUILD -DCONFIG_NAND_SPL
34 34 CFLAGS += -DCONFIG_SPL_BUILD -DCONFIG_NAND_SPL
35 35  
36   -SOBJS = start.o lowlevel_init.o
  36 +SOBJS = start.o crt0.o lowlevel_init.o
37 37 COBJS = nand_boot_fsl_nfc.o
38 38  
39 39 SRCS := $(SRCTREE)/nand_spl/nand_boot_fsl_nfc.c
40 40 SRCS += $(SRCTREE)/arch/arm/cpu/arm926ejs/start.S
  41 +SRCS += $(SRCTREE)/arch/arm/lib/crt0.S
41 42 SRCS += $(SRCTREE)/board/karo/tx25/lowlevel_init.S
42 43 OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
43 44 __OBJS := $(SOBJS) $(COBJS)
... ... @@ -69,6 +70,9 @@
69 70 #########################################################################
70 71  
71 72 $(obj)%.o: $(SRCTREE)/arch/arm/cpu/arm926ejs/%.S
  73 + $(CC) $(AFLAGS) -c -o $@ $<
  74 +
  75 +$(obj)%.o: $(SRCTREE)/arch/arm/lib/%.S
72 76 $(CC) $(AFLAGS) -c -o $@ $<
73 77  
74 78 $(obj)%.o: $(SRCTREE)/board/karo/tx25/%.S