mx7: Distinguish between dual and solo versions

Read the number of cores in the fuses to distinguish between the dual and solo versions. Tested on a mx7d sabresd and on a mx7solo warp7. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>

mx7: Distinguish between dual and solo versions
Read the number of cores in the fuses to distinguish between the dual and solo versions. Tested on a mx7d sabresd and on a mx7solo warp7. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Fabio Estevam · Stefano Babic
1 parent 5d69269dee
Showing 3 changed files with 21 additions and 0 deletions Side-by-side Diff
arch/arm/cpu/armv7/mx7/soc.c
arch/arm/imx-common/cpu.c
arch/arm/include/asm/arch-imx/cpu.h
@@ -165,12 +165,30 @@
 	return val;
 }
  
+static bool is_mx7d(void)
+{
+	struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
+	struct fuse_bank *bank = &ocotp->bank[1];
+	struct fuse_bank1_regs *fuse =
+		(struct fuse_bank1_regs *)bank->fuse_regs;
+	int val;
+
+	val = readl(&fuse->tester4);
+	if (val & 1)
+		return false;
+	else
+		return true;
+}
+
 u32 get_cpu_rev(void)
 {
 	struct mxc_ccm_anatop_reg *ccm_anatop = (struct mxc_ccm_anatop_reg *)
 						 ANATOP_BASE_ADDR;
 	u32 reg = readl(&ccm_anatop->digprog);
 	u32 type = (reg >> 16) & 0xff;
+
+	if (!is_mx7d())
+		type = MXC_CPU_MX7S;
  
 	reg &= 0xff;
 	return (type << 12) | reg;
@@ -137,6 +137,8 @@
 const char *get_imx_type(u32 imxtype)
 {
 	switch (imxtype) {
+	case MXC_CPU_MX7S:
+		return "7SOLO";	/* Single-core version of the mx7 */
 	case MXC_CPU_MX7D:
 		return "7D";	/* Dual-core version of the mx7 */
 	case MXC_CPU_MX6QP:
@@ -21,6 +21,7 @@
 #define MXC_CPU_MX6D		0x67
 #define MXC_CPU_MX6DP		0x68
 #define MXC_CPU_MX6QP		0x69
+#define MXC_CPU_MX7S		0x71 /* dummy ID */
 #define MXC_CPU_MX7D		0x72
 #define MXC_CPU_VF610		0xF6 /* dummy ID */
...	...	@@ -165,12 +165,30 @@
165	165	return val;
166	166	}
167	167
	168	+static bool is_mx7d(void)
	169	+{
	170	+ struct ocotp_regs ocotp = (struct ocotp_regs )OCOTP_BASE_ADDR;
	171	+ struct fuse_bank *bank = &ocotp->bank[1];
	172	+ struct fuse_bank1_regs *fuse =
	173	+ (struct fuse_bank1_regs *)bank->fuse_regs;
	174	+ int val;
	175	+
	176	+ val = readl(&fuse->tester4);
	177	+ if (val & 1)
	178	+ return false;
	179	+ else
	180	+ return true;
	181	+}
	182	+
168	183	u32 get_cpu_rev(void)
169	184	{
170	185	struct mxc_ccm_anatop_reg ccm_anatop = (struct mxc_ccm_anatop_reg )
171	186	ANATOP_BASE_ADDR;
172	187	u32 reg = readl(&ccm_anatop->digprog);
173	188	u32 type = (reg >> 16) & 0xff;
	189	+
	190	+ if (!is_mx7d())
	191	+ type = MXC_CPU_MX7S;
174	192
175	193	reg &= 0xff;
176	194	return (type << 12) \| reg;
...	...	@@ -137,6 +137,8 @@
137	137	const char *get_imx_type(u32 imxtype)
138	138	{
139	139	switch (imxtype) {
	140	+ case MXC_CPU_MX7S:
	141	+ return "7SOLO"; /* Single-core version of the mx7 */
140	142	case MXC_CPU_MX7D:
141	143	return "7D"; /* Dual-core version of the mx7 */
142	144	case MXC_CPU_MX6QP:
...	...	@@ -21,6 +21,7 @@
21	21	#define MXC_CPU_MX6D 0x67
22	22	#define MXC_CPU_MX6DP 0x68
23	23	#define MXC_CPU_MX6QP 0x69
	24	+#define MXC_CPU_MX7S 0x71 /* dummy ID */
24	25	#define MXC_CPU_MX7D 0x72
25	26	#define MXC_CPU_VF610 0xF6 /* dummy ID */
26	27