ARM: omap4: add platform specific info for GPMC and ELM controllers

This patch moves platform specific information for GPMC and ELM controller into separate header files, so that any derivative devices do not mess other header files. Platform specific information added into arch-xx/../hardware.h - CPU related platform specific details like base-address of GPMC and ELM Platform specific information added into arch-xx/../mem.h - Generic configs for GPMC and ELM initialization. - Hardware parameters or constrains specific to GPMC and ELM IP like; number of max number of chip-selects available Signed-off-by: Pekon Gupta <pekon@ti.com>

ARM: omap4: add platform specific info for GPMC and ELM controllers
This patch moves platform specific information for GPMC and ELM controller into separate header files, so that any derivative devices do not mess other header files. Platform specific information added into arch-xx/../hardware.h - CPU related platform specific details like base-address of GPMC and ELM Platform specific information added into arch-xx/../mem.h - Generic configs for GPMC and ELM initialization. - Hardware parameters or constrains specific to GPMC and ELM IP like; number of max number of chip-selects available Signed-off-by: Pekon Gupta <pekon@ti.com>
pekon gupta · Tom Rini
1 parent 29cc1d8e26
Showing 4 changed files with 90 additions and 6 deletions Side-by-side Diff
arch/arm/include/asm/arch-omap4/cpu.h
arch/arm/include/asm/arch-omap4/hardware.h
arch/arm/include/asm/arch-omap4/mem.h
arch/arm/include/asm/arch-omap4/omap.h
@@ -12,6 +12,8 @@
 #include <asm/types.h>
 #endif /* !(__KERNEL_STRICT_NAMES || __ASSEMBLY__) */
  
+#include <asm/arch/hardware.h>
+
 #ifndef __KERNEL_STRICT_NAMES
 #ifndef __ASSEMBLY__
 struct gptimer {
@@ -56,9 +58,6 @@
 #define TCLR_ST			(0x1 << 0)
 #define TCLR_AR			(0x1 << 1)
 #define TCLR_PRE		(0x1 << 5)
-
-/* GPMC BASE */
-#define GPMC_BASE		(OMAP44XX_GPMC_BASE)
  
 /* I2C base */
 #define I2C_BASE1		(OMAP44XX_L4_PER_BASE + 0x70000)
+/*
+ * hardware.h
+ *
+ * hardware specific header
+ *
+ * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __OMAP_HARDWARE_H
+#define __OMAP_HARDWARE_H
+
+#include <asm/arch/omap.h>
+
+/*
+ * Common hardware definitions
+ */
+
+/* BCH Error Location Module */
+#define ELM_BASE			0x48078000
+
+/* GPMC Base address */
+#define GPMC_BASE			0x50000000
+
+#endif
+/*
+ * (C) Copyright 2006-2008
+ * Texas Instruments, <www.ti.com>
+ *
+ * Author
+ *		Mansoor Ahamed <mansoor.ahamed@ti.com>
+ *
+ * Initial Code from:
+ *		Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _MEM_H_
+#define _MEM_H_
+
+/*
+ * GPMC settings -
+ * Definitions is as per the following format
+ * #define <PART>_GPMC_CONFIG<x> <value>
+ * Where:
+ * PART is the part name e.g. STNOR - Intel Strata Flash
+ * x is GPMC config registers from 1 to 6 (there will be 6 macros)
+ * Value is corresponding value
+ *
+ * For every valid PRCM configuration there should be only one definition of
+ * the same. if values are independent of the board, this definition will be
+ * present in this file if values are dependent on the board, then this should
+ * go into corresponding mem-boardName.h file
+ *
+ * Currently valid part Names are (PART):
+ * M_NAND - Micron NAND
+ * STNOR - STMicrolelctronics M29W128GL
+ */
+#define GPMC_SIZE_256M		0x0
+#define GPMC_SIZE_128M		0x8
+#define GPMC_SIZE_64M		0xC
+#define GPMC_SIZE_32M		0xE
+#define GPMC_SIZE_16M		0xF
+
+#define M_NAND_GPMC_CONFIG1	0x00000800
+#define M_NAND_GPMC_CONFIG2	0x001e1e00
+#define M_NAND_GPMC_CONFIG3	0x001e1e00
+#define M_NAND_GPMC_CONFIG4	0x16051807
+#define M_NAND_GPMC_CONFIG5	0x00151e1e
+#define M_NAND_GPMC_CONFIG6	0x16000f80
+#define M_NAND_GPMC_CONFIG7	0x00000008
+
+#define STNOR_GPMC_CONFIG1	0x00001200
+#define STNOR_GPMC_CONFIG2	0x00101000
+#define STNOR_GPMC_CONFIG3	0x00030301
+#define STNOR_GPMC_CONFIG4	0x10041004
+#define STNOR_GPMC_CONFIG5	0x000C1010
+#define STNOR_GPMC_CONFIG6	0x08070280
+#define STNOR_GPMC_CONFIG7	0x00000F48
+
+/* max number of GPMC Chip Selects */
+#define GPMC_MAX_CS		8
+/* max number of GPMC regs */
+#define GPMC_MAX_REG		7
+
+#endif /* endif _MEM_H_ */
@@ -60,9 +60,6 @@
 /* Watchdog Timer2 - MPU watchdog */
 #define WDT2_BASE		(OMAP44XX_L4_WKUP_BASE + 0x14000)
  
-/* GPMC */
-#define OMAP44XX_GPMC_BASE	0x50000000
-
 /*
  * Hardware Register Details
  */
...	...	@@ -12,6 +12,8 @@
12	12	#include <asm/types.h>
13	13	#endif /* !(__KERNEL_STRICT_NAMES \|\| __ASSEMBLY__) */
14	14
	15	+#include <asm/arch/hardware.h>
	16	+
15	17	#ifndef __KERNEL_STRICT_NAMES
16	18	#ifndef __ASSEMBLY__
17	19	struct gptimer {
...	...	@@ -56,9 +58,6 @@
56	58	#define TCLR_ST (0x1 << 0)
57	59	#define TCLR_AR (0x1 << 1)
58	60	#define TCLR_PRE (0x1 << 5)
59		-
60		-/* GPMC BASE */
61		-#define GPMC_BASE (OMAP44XX_GPMC_BASE)
62	61
63	62	/* I2C base */
64	63	#define I2C_BASE1 (OMAP44XX_L4_PER_BASE + 0x70000)
	1	+/*
	2	+ * hardware.h
	3	+ *
	4	+ * hardware specific header
	5	+ *
	6	+ * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/
	7	+ *
	8	+ * SPDX-License-Identifier: GPL-2.0+
	9	+ */
	10	+
	11	+#ifndef __OMAP_HARDWARE_H
	12	+#define __OMAP_HARDWARE_H
	13	+
	14	+#include <asm/arch/omap.h>
	15	+
	16	+/*
	17	+ * Common hardware definitions
	18	+ */
	19	+
	20	+/* BCH Error Location Module */
	21	+#define ELM_BASE 0x48078000
	22	+
	23	+/* GPMC Base address */
	24	+#define GPMC_BASE 0x50000000
	25	+
	26	+#endif
	1	+/*
	2	+ * (C) Copyright 2006-2008
	3	+ * Texas Instruments, <www.ti.com>
	4	+ *
	5	+ * Author
	6	+ * Mansoor Ahamed <mansoor.ahamed@ti.com>
	7	+ *
	8	+ * Initial Code from:
	9	+ * Richard Woodruff <r-woodruff2@ti.com>
	10	+ *
	11	+ * SPDX-License-Identifier: GPL-2.0+
	12	+ */
	13	+
	14	+#ifndef _MEM_H_
	15	+#define _MEM_H_
	16	+
	17	+/*
	18	+ * GPMC settings -
	19	+ * Definitions is as per the following format
	20	+ * #define <PART>_GPMC_CONFIG<x> <value>
	21	+ * Where:
	22	+ * PART is the part name e.g. STNOR - Intel Strata Flash
	23	+ * x is GPMC config registers from 1 to 6 (there will be 6 macros)
	24	+ * Value is corresponding value
	25	+ *
	26	+ * For every valid PRCM configuration there should be only one definition of
	27	+ * the same. if values are independent of the board, this definition will be
	28	+ * present in this file if values are dependent on the board, then this should
	29	+ * go into corresponding mem-boardName.h file
	30	+ *
	31	+ * Currently valid part Names are (PART):
	32	+ * M_NAND - Micron NAND
	33	+ * STNOR - STMicrolelctronics M29W128GL
	34	+ */
	35	+#define GPMC_SIZE_256M 0x0
	36	+#define GPMC_SIZE_128M 0x8
	37	+#define GPMC_SIZE_64M 0xC
	38	+#define GPMC_SIZE_32M 0xE
	39	+#define GPMC_SIZE_16M 0xF
	40	+
	41	+#define M_NAND_GPMC_CONFIG1 0x00000800
	42	+#define M_NAND_GPMC_CONFIG2 0x001e1e00
	43	+#define M_NAND_GPMC_CONFIG3 0x001e1e00
	44	+#define M_NAND_GPMC_CONFIG4 0x16051807
	45	+#define M_NAND_GPMC_CONFIG5 0x00151e1e
	46	+#define M_NAND_GPMC_CONFIG6 0x16000f80
	47	+#define M_NAND_GPMC_CONFIG7 0x00000008
	48	+
	49	+#define STNOR_GPMC_CONFIG1 0x00001200
	50	+#define STNOR_GPMC_CONFIG2 0x00101000
	51	+#define STNOR_GPMC_CONFIG3 0x00030301
	52	+#define STNOR_GPMC_CONFIG4 0x10041004
	53	+#define STNOR_GPMC_CONFIG5 0x000C1010
	54	+#define STNOR_GPMC_CONFIG6 0x08070280
	55	+#define STNOR_GPMC_CONFIG7 0x00000F48
	56	+
	57	+/* max number of GPMC Chip Selects */
	58	+#define GPMC_MAX_CS 8
	59	+/* max number of GPMC regs */
	60	+#define GPMC_MAX_REG 7
	61	+
	62	+#endif /* endif _MEM_H_ */
...	...	@@ -60,9 +60,6 @@
60	60	/* Watchdog Timer2 - MPU watchdog */
61	61	#define WDT2_BASE (OMAP44XX_L4_WKUP_BASE + 0x14000)
62	62
63		-/* GPMC */
64		-#define OMAP44XX_GPMC_BASE 0x50000000
65		-
66	63	/*
67	64	* Hardware Register Details
68	65	*/