Commit e47c2a68517a3acd8e7668e0fc16a2c168ac30b4
Committed by
York Sun
1 parent
4067815998
Exists in
v2017.01-smarct4x
and in
41 other branches
powerpc/mpc85xx: SECURE BOOT- Add secure boot target for T2080RDB
Secure Boot Target is added for T2080RDB Changes: For Secure boot, CPC is configured as SRAM and used as house keeping area which needs to be disabled. So CONFIG_SYS_CPC_REINIT_F is defined for CONFIG_T2080RDB. Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Showing 2 changed files with 2 additions and 0 deletions Side-by-side Diff
arch/powerpc/include/asm/fsl_secure_boot.h
boards.cfg
... | ... | @@ -969,6 +969,7 @@ |
969 | 969 | Active powerpc mpc85xx - freescale t208xrdb T2080RDB T208xRDB:PPC_T2080 - |
970 | 970 | Active powerpc mpc85xx - freescale t208xrdb T2080RDB_NAND T208xRDB:PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,NAND - |
971 | 971 | Active powerpc mpc85xx - freescale t208xrdb T2080RDB_SDCARD T208xRDB:PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD - |
972 | +Active powerpc mpc85xx - freescale t208xrdb T2080RDB_SECURE_BOOT T208xRDB:PPC_T2080,SECURE_BOOT Aneesh Bansal <aneesh.bansal@freescale.com> | |
972 | 973 | Active powerpc mpc85xx - freescale t208xrdb T2080RDB_SPIFLASH T208xRDB:PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH - |
973 | 974 | Active powerpc mpc85xx - freescale t208xrdb T2080RDB_SRIO_PCIE_BOOT T208xRDB:PPC_T2080,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000 - |
974 | 975 | Active powerpc mpc85xx - freescale t4qds T4160QDS T4240QDS:PPC_T4160 - |