Eric Lee / smarc-uboot

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Commit e4a189acfed4e8a99599f948a019f709b066722f

Authored by Marek Vasut
Committed by Tom Rini
1 parent be7e41efda
Exists in master and in 57 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf-6.6.52-2.2.0, emb_lf_v2022.04, emb_lf_v2023.04, emb_lf_v2024.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

IPL: Remove remains of OneNAND IPL 

After removing the Apollon board, remove the OneNAND IPL too.
There are no users for it any more.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Minkyu Kang <promsoft@gmail.com>
Cc: Tom Rini <trini@ti.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>

Showing 7 changed files with 0 additions and 419 deletions Side-by-side Diff

... ... @@ -75,11 +75,6 @@
75 75 /ctags
76 76 /etags
77 77  
78   -# OneNAND IPL files
79   -/onenand_ipl/onenand-ipl*
80   -/onenand_ipl/board/*/onenand*
81   -/onenand_ipl/board/*/*.S
82   -
83 78 # spl ais files
84 79 /spl/*.ais
... ... @@ -378,7 +378,6 @@
378 378  
379 379 ALL-$(CONFIG_NAND_U_BOOT) += $(obj)u-boot-nand.bin
380 380 ALL-$(CONFIG_ONENAND_U_BOOT) += $(obj)u-boot-onenand.bin
381   -ONENAND_BIN ?= $(obj)onenand_ipl/onenand-ipl-2k.bin
382 381 ALL-$(CONFIG_SPL) += $(obj)spl/u-boot-spl.bin
383 382 ALL-$(CONFIG_OF_SEPARATE) += $(obj)u-boot.dtb $(obj)u-boot-dtb.bin
384 383  
... ... @@ -550,12 +549,6 @@
550 549 $(obj)u-boot-nand.bin: nand_spl $(obj)u-boot.bin
551 550 cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
552 551  
553   -onenand_ipl: $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
554   - $(MAKE) -C onenand_ipl/board/$(BOARDDIR) all
555   -
556   -$(obj)u-boot-onenand.bin: onenand_ipl $(obj)u-boot.bin
557   - cat $(ONENAND_BIN) $(obj)u-boot.bin > $(obj)u-boot-onenand.bin
558   -
559 552 $(obj)spl/u-boot-spl.bin: $(SUBDIR_TOOLS) depend
560 553 $(MAKE) -C spl all
561 554  
562 555  
... ... @@ -790,9 +783,7 @@
790 783 @rm -f $(obj)include/generated/asm-offsets.h
791 784 @rm -f $(obj)$(CPUDIR)/$(SOC)/asm-offsets.s
792 785 @rm -f $(obj)nand_spl/{u-boot.lds,u-boot-nand_spl.lds,u-boot-spl,u-boot-spl.map,System.map}
793   - @rm -f $(obj)onenand_ipl/onenand-{ipl,ipl.bin,ipl.map}
794 786 @rm -f $(ONENAND_BIN)
795   - @rm -f $(obj)onenand_ipl/u-boot.lds
796 787 @rm -f $(obj)spl/{u-boot-spl,u-boot-spl.bin,u-boot-spl.lds,u-boot-spl.map}
797 788 @rm -f $(obj)MLO
798 789 @rm -f $(TIMESTAMP_FILE) $(VERSION_FILE)
... ... @@ -825,7 +816,6 @@
825 816 @rm -fr $(obj)include/asm/proc $(obj)include/asm/arch $(obj)include/asm
826 817 @rm -fr $(obj)include/generated
827 818 @[ ! -d $(obj)nand_spl ] || find $(obj)nand_spl -name "*" -type l -print | xargs rm -f
828   - @[ ! -d $(obj)onenand_ipl ] || find $(obj)onenand_ipl -name "*" -type l -print | xargs rm -f
829 819 @rm -f $(obj)dts/*.tmp
830 820 @rm -f $(obj)spl/u-boot-spl{,-pad}.ais
831 821  
board/samsung/goni/lowlevel_init.S
Diff comments   View file @ e4a189a
... ... @@ -79,11 +79,7 @@
79 79 str r1, [r0, #0x0] @ GPIO_CON_OFFSET
80 80  
81 81 ldr r1, [r0, #0x4] @ GPIO_DAT_OFFSET
82   -#ifdef CONFIG_ONENAND_IPL
83   - orr r1, r1, #(1 << 1) @ 1 * 1-bit
84   -#else
85 82 bic r1, r1, #(1 << 1)
86   -#endif
87 83 str r1, [r0, #0x4] @ GPIO_DAT_OFFSET
88 84  
89 85 /* Don't setup at s5pc100 */
... ... @@ -182,7 +178,6 @@
182 178 /* Do not release retention here for S5PC110 */
183 179 streq r1, [r0]
184 180  
185   -#ifndef CONFIG_ONENAND_IPL
186 181 /* Disable Watchdog */
187 182 ldreq r0, =S5PC100_WATCHDOG_BASE @ 0xEA200000
188 183 ldrne r0, =S5PC110_WATCHDOG_BASE @ 0xE2700000
... ... @@ -193,7 +188,6 @@
193 188 ldrne r0, =S5PC110_SROMC_BASE
194 189 ldr r1, =0x9
195 190 str r1, [r0]
196   -#endif
197 191  
198 192 /* S5PC100 has 3 groups of interrupt sources */
199 193 ldreq r0, =S5PC100_VIC0_BASE @ 0xE4000000
... ... @@ -207,7 +201,6 @@
207 201 str r3, [r1, #0x14] @ INTENCLEAR
208 202 str r3, [r2, #0x14] @ INTENCLEAR
209 203  
210   -#ifndef CONFIG_ONENAND_IPL
211 204 /* Set all interrupts as IRQ */
212 205 str r5, [r0, #0xc] @ INTSELECT
213 206 str r5, [r1, #0xc] @ INTSELECT
214 207  
215 208  
216 209  
217 210  
... ... @@ -217,121 +210,13 @@
217 210 str r5, [r0, #0xf00] @ INTADDRESS
218 211 str r5, [r1, #0xf00] @ INTADDRESS
219 212 str r5, [r2, #0xf00] @ INTADDRESS
220   -#endif
221 213  
222   -#ifndef CONFIG_ONENAND_IPL
223 214 /* for UART */
224 215 bl uart_asm_init
225 216  
226 217 bl internal_ram_init
227   -#endif
228 218  
229   -#ifdef CONFIG_ONENAND_IPL
230   - /* init system clock */
231   - bl system_clock_init
232   -
233   - /* OneNAND Sync Read Support at S5PC110 only
234   - * RM[15] : Sync Read
235   - * BRWL[14:12] : 7 CLK
236   - * BL[11:9] : Continuous
237   - * VHF[3] : Very High Frequency Enable (Over 83MHz)
238   - * HF[2] : High Frequency Enable (Over 66MHz)
239   - * WM[1] : Sync Write
240   - */
241 219 cmp r7, r8
242   - ldrne r1, =0xE006
243   - ldrne r0, =0xB001E442
244   - strneh r1, [r0]
245   -
246   - /*
247   - * GCE[26] : Gated Clock Enable
248   - * RPE[17] : Enables Read Prefetch
249   - */
250   - ldrne r1, =((1 << 26) | (1 << 17) | 0xE006)
251   - ldrne r0, =0xB0600000
252   - strne r1, [r0, #0x100] @ ONENAND_IF_CTRL
253   - ldrne r1, =0x1212
254   - strne r1, [r0, #0x108]
255   -
256   - /* Board detection to set proper memory configuration */
257   - cmp r7, r8
258   - moveq r9, #1 /* r9 has 1Gib default at s5pc100 */
259   - movne r9, #2 /* r9 has 2Gib default at s5pc110 */
260   -
261   - ldr r2, =0xE0200200
262   - ldr r4, [r2, #0x48]
263   -
264   - bic r1, r4, #(0x3F << 4) /* PULLUP_DISABLE: 3 * 2-bit */
265   - bic r1, r1, #(0x3 << 2) /* PULLUP_DISABLE: 2 * 2-bit */
266   - bic r1, r1, #(0x3 << 14) /* PULLUP_DISABLE: 2 * 2-bit */
267   - str r1, [r2, #0x48]
268   - /* For write completion */
269   - nop
270   - nop
271   -
272   - ldr r3, [r2, #0x44]
273   - and r1, r3, #(0x7 << 2)
274   - mov r1, r1, lsr #2
275   - cmp r1, #0x5
276   - moveq r9, #3
277   - cmp r1, #0x6
278   - moveq r9, #1
279   - cmp r1, #0x7
280   - moveq r9, #2
281   - and r0, r3, #(0x1 << 1)
282   - mov r0, r0, lsr #1
283   - orr r1, r1, r0, lsl #3
284   - cmp r1, #0x8
285   - moveq r9, #3
286   - and r1, r3, #(0x7 << 2)
287   - mov r1, r1, lsr #2
288   - and r0, r3, #(0x1 << 7)
289   - mov r0, r0, lsr #7
290   - orr r1, r1, r0, lsl #3
291   - cmp r1, #0x9
292   - moveq r9, #3
293   - str r4, [r2, #0x48] /* Restore PULLUP configuration */
294   -
295   - bl mem_ctrl_asm_init
296   -
297   - /* Wakeup support. Don't know if it's going to be used, untested. */
298   - ldreq r0, =S5PC100_RST_STAT
299   - ldrne r0, =S5PC110_RST_STAT
300   - ldr r1, [r0]
301   - biceq r1, r1, #0xfffffff7
302   - moveq r2, #(1 << 3)
303   - bicne r1, r1, #0xfffeffff
304   - movne r2, #(1 << 16)
305   - cmp r1, r2
306   - bne 1f
307   -wakeup:
308   - /* turn off L2 cache */
309   - bl l2_cache_disable
310   -
311   - cmp r7, r8
312   - ldreq r0, =0xC100
313   - ldrne r0, =0xC110
314   -
315   - /* invalidate L2 cache also */
316   - bl invalidate_dcache
317   -
318   - /* turn on L2 cache */
319   - bl l2_cache_enable
320   -
321   - cmp r7, r8
322   - /* Load return address and jump to kernel */
323   - ldreq r0, =S5PC100_INFORM0
324   - ldrne r0, =S5PC110_INFORM0
325   -
326   - /* r1 = physical address of s5pc1xx_cpu_resume function */
327   - ldr r1, [r0]
328   -
329   - /* Jump to kernel (sleep-s5pc1xx.S) */
330   - mov pc, r1
331   - nop
332   - nop
333   -#else
334   - cmp r7, r8
335 220 /* Clear wakeup status register */
336 221 ldreq r0, =S5PC100_WAKEUP_STAT
337 222 ldrne r0, =S5PC110_WAKEUP_STAT
... ... @@ -347,7 +232,6 @@
347 232 orr r1, r1, r2
348 233 str r1, [r0]
349 234  
350   -#endif
351 235 b 1f
352 236  
353 237 didle_wakeup:
... ... @@ -517,7 +401,6 @@
517 401  
518 402 mov pc, lr
519 403  
520   -#ifndef CONFIG_ONENAND_IPL
521 404 internal_ram_init:
522 405 ldreq r0, =0xE3800000
523 406 ldrne r0, =0xF1500000
524 407  
... ... @@ -525,9 +408,7 @@
525 408 str r1, [r0]
526 409  
527 410 mov pc, lr
528   -#endif
529 411  
530   -#ifndef CONFIG_ONENAND_IPL
531 412 /*
532 413 * uart_asm_init: Initialize UART's pins
533 414 */
... ... @@ -582,5 +463,4 @@
582 463 str r1, [r0, #0x4] @ S5PC1XX_GPIO_DAT_OFFSET
583 464 200:
584 465 mov pc, lr
585   -#endif
board/samsung/smdkc100/lowlevel_init.S
Diff comments   View file @ e4a189a
... ... @@ -50,12 +50,10 @@
50 50 orr r0, r0, #0x0
51 51 str r5, [r0]
52 52  
53   -#ifndef CONFIG_ONENAND_IPL
54 53 /* setting SRAM */
55 54 ldr r0, =S5PC100_SROMC_BASE
56 55 ldr r1, =0x9
57 56 str r1, [r0]
58   -#endif
59 57  
60 58 /* S5PC100 has 3 groups of interrupt sources */
61 59 ldr r0, =S5PC100_VIC0_BASE @0xE4000000
... ... @@ -68,7 +66,6 @@
68 66 str r3, [r1, #0x14] @INTENCLEAR
69 67 str r3, [r2, #0x14] @INTENCLEAR
70 68  
71   -#ifndef CONFIG_ONENAND_IPL
72 69 /* Set all interrupts as IRQ */
73 70 str r5, [r0, #0xc] @INTSELECT
74 71 str r5, [r1, #0xc] @INTSELECT
75 72  
76 73  
77 74  
78 75  
... ... @@ -78,54 +75,17 @@
78 75 str r5, [r0, #0xf00] @INTADDRESS
79 76 str r5, [r1, #0xf00] @INTADDRESS
80 77 str r5, [r2, #0xf00] @INTADDRESS
81   -#endif
82 78  
83   -#ifndef CONFIG_ONENAND_IPL
84 79 /* for UART */
85 80 bl uart_asm_init
86 81  
87 82 /* for TZPC */
88 83 bl tzpc_asm_init
89   -#endif
90 84  
91   -#ifdef CONFIG_ONENAND_IPL
92   - /* init system clock */
93   - bl system_clock_init
94   -
95   - bl mem_ctrl_asm_init
96   -
97   - /* Wakeup support. Don't know if it's going to be used, untested. */
98   - ldr r0, =S5PC100_RST_STAT
99   - ldr r1, [r0]
100   - bic r1, r1, #0xfffffff7
101   - cmp r1, #0x8
102   - beq wakeup_reset
103   -#endif
104   -
105 85 1:
106 86 mov lr, r9
107 87 mov pc, lr
108 88  
109   -#ifdef CONFIG_ONENAND_IPL
110   -wakeup_reset:
111   -
112   - /* Clear wakeup status register */
113   - ldr r0, =S5PC100_WAKEUP_STAT
114   - ldr r1, [r0]
115   - str r1, [r0]
116   -
117   - /* Load return address and jump to kernel */
118   - ldr r0, =S5PC100_INFORM0
119   -
120   - /* r1 = physical address of s5pc100_cpu_resume function */
121   - ldr r1, [r0]
122   -
123   - /* Jump to kernel (sleep.S) */
124   - mov pc, r1
125   - nop
126   - nop
127   -#endif
128   -
129 89 /*
130 90 * system_clock_init: Initialize core clock and bus clock.
131 91 * void system_clock_init(void)
... ... @@ -178,7 +138,6 @@
178 138  
179 139 mov pc, lr
180 140  
181   -#ifndef CONFIG_ONENAND_IPL
182 141 /*
183 142 * uart_asm_init: Initialize UART's pins
184 143 */
... ... @@ -212,5 +171,4 @@
212 171 str r1, [r0, #0x810]
213 172  
214 173 mov pc, lr
215   -#endif
onenand_ipl/onenand_boot.c
View file @ e4a189a
1   -/*
2   - * (C) Copyright 2005-2008 Samsung Electronics
3   - * Kyungmin Park <kyungmin.park@samsung.com>
4   - *
5   - * Derived from x-loader
6   - *
7   - * See file CREDITS for list of people who contributed to this
8   - * project.
9   - *
10   - * This program is free software; you can redistribute it and/or
11   - * modify it under the terms of the GNU General Public License as
12   - * published by the Free Software Foundation; either version 2 of
13   - * the License, or (at your option) any later version.
14   - *
15   - * This program is distributed in the hope that it will be useful,
16   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
17   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18   - * GNU General Public License for more details.
19   - *
20   - * You should have received a copy of the GNU General Public License
21   - * along with this program; if not, write to the Free Software
22   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23   - * MA 02111-1307 USA
24   - */
25   -
26   -#include <common.h>
27   -
28   -#include "onenand_ipl.h"
29   -
30   -typedef int (init_fnc_t)(void);
31   -
32   -void start_oneboot(void)
33   -{
34   - uchar *buf;
35   -
36   - buf = (uchar *) CONFIG_SYS_LOAD_ADDR;
37   -
38   - onenand_read_block(buf);
39   -
40   - ((init_fnc_t *)CONFIG_SYS_LOAD_ADDR)();
41   -
42   - /* should never come here */
43   -}
44   -
45   -void hang(void)
46   -{
47   - for (;;);
48   -}
onenand_ipl/onenand_ipl.h
View file @ e4a189a
1   -/*
2   - * (C) Copyright 2005-2008 Samsung Electronics
3   - * Kyungmin Park <kyungmin.park@samsung.com>
4   - *
5   - * This program is free software; you can redistribute it and/or
6   - * modify it under the terms of the GNU General Public License as
7   - * published by the Free Software Foundation; either version 2 of
8   - * the License, or (at your option) any later version.
9   - *
10   - * This program is distributed in the hope that it will be useful,
11   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
12   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13   - * GNU General Public License for more details.
14   - *
15   - * You should have received a copy of the GNU General Public License
16   - * along with this program; if not, write to the Free Software
17   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18   - * MA 02111-1307 USA
19   - */
20   -
21   -#ifndef _ONENAND_IPL_H
22   -#define _ONENAND_IPL_H
23   -
24   -#include <linux/mtd/onenand_regs.h>
25   -
26   -#define onenand_readw(a) readw(THIS_ONENAND(a))
27   -#define onenand_writew(v, a) writew(v, THIS_ONENAND(a))
28   -
29   -#define THIS_ONENAND(a) (CONFIG_SYS_ONENAND_BASE + (a))
30   -
31   -#define READ_INTERRUPT() onenand_readw(ONENAND_REG_INTERRUPT)
32   -
33   -extern int (*onenand_read_page)(ulong block, ulong page,
34   - u_char *buf, int pagesize);
35   -extern int onenand_read_block(unsigned char *buf);
36   -#endif
onenand_ipl/onenand_read.c
View file @ e4a189a
1   -/*
2   - * (C) Copyright 2005-2009 Samsung Electronics
3   - * Kyungmin Park <kyungmin.park@samsung.com>
4   - *
5   - * See file CREDITS for list of people who contributed to this
6   - * project.
7   - *
8   - * This program is free software; you can redistribute it and/or
9   - * modify it under the terms of the GNU General Public License as
10   - * published by the Free Software Foundation; either version 2 of
11   - * the License, or (at your option) any later version.
12   - *
13   - * This program is distributed in the hope that it will be useful,
14   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
15   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16   - * GNU General Public License for more details.
17   - *
18   - * You should have received a copy of the GNU General Public License
19   - * along with this program; if not, write to the Free Software
20   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21   - * MA 02111-1307 USA
22   - */
23   -
24   -#include <common.h>
25   -
26   -#include <asm/io.h>
27   -#include <asm/string.h>
28   -
29   -#include "onenand_ipl.h"
30   -
31   -#define onenand_block_address(block) (block)
32   -#define onenand_sector_address(page) (page << 2)
33   -#define onenand_buffer_address() ((1 << 3) << 8)
34   -#define onenand_bufferram_address(block) (0)
35   -
36   -#ifdef __HAVE_ARCH_MEMCPY32
37   -extern void *memcpy32(void *dest, void *src, int size);
38   -#endif
39   -
40   -int (*onenand_read_page)(ulong block, ulong page, u_char *buf, int pagesize);
41   -
42   -/* read a page with ECC */
43   -static int generic_onenand_read_page(ulong block, ulong page,
44   - u_char * buf, int pagesize)
45   -{
46   - unsigned long *base;
47   -
48   -#ifndef __HAVE_ARCH_MEMCPY32
49   - unsigned int offset, value;
50   - unsigned long *p;
51   -#endif
52   -
53   - onenand_writew(onenand_block_address(block),
54   - ONENAND_REG_START_ADDRESS1);
55   -
56   - onenand_writew(onenand_bufferram_address(block),
57   - ONENAND_REG_START_ADDRESS2);
58   -
59   - onenand_writew(onenand_sector_address(page),
60   - ONENAND_REG_START_ADDRESS8);
61   -
62   - onenand_writew(onenand_buffer_address(),
63   - ONENAND_REG_START_BUFFER);
64   -
65   - onenand_writew(ONENAND_INT_CLEAR, ONENAND_REG_INTERRUPT);
66   -
67   - onenand_writew(ONENAND_CMD_READ, ONENAND_REG_COMMAND);
68   -
69   -#ifndef __HAVE_ARCH_MEMCPY32
70   - p = (unsigned long *) buf;
71   -#endif
72   - base = (unsigned long *) (CONFIG_SYS_ONENAND_BASE + ONENAND_DATARAM);
73   -
74   - while (!(READ_INTERRUPT() & ONENAND_INT_READ))
75   - continue;
76   -
77   - /* Check for invalid block mark */
78   - if (page < 2 && (onenand_readw(ONENAND_SPARERAM) != 0xffff))
79   - return 1;
80   -
81   -#ifdef __HAVE_ARCH_MEMCPY32
82   - /* 32 bytes boundary memory copy */
83   - memcpy32(buf, base, pagesize);
84   -#else
85   - for (offset = 0; offset < (pagesize >> 2); offset++) {
86   - value = *(base + offset);
87   - *p++ = value;
88   - }
89   -#endif
90   -
91   - return 0;
92   -}
93   -
94   -#ifndef CONFIG_ONENAND_START_PAGE
95   -#define CONFIG_ONENAND_START_PAGE 1
96   -#endif
97   -#define ONENAND_PAGES_PER_BLOCK 64
98   -
99   -static void onenand_generic_init(int *page_is_4KiB, int *page)
100   -{
101   - int dev_id, density;
102   -
103   - if (onenand_readw(ONENAND_REG_TECHNOLOGY))
104   - *page_is_4KiB = 1;
105   - dev_id = onenand_readw(ONENAND_REG_DEVICE_ID);
106   - density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
107   - density &= ONENAND_DEVICE_DENSITY_MASK;
108   - if (density >= ONENAND_DEVICE_DENSITY_4Gb &&
109   - !(dev_id & ONENAND_DEVICE_IS_DDP))
110   - *page_is_4KiB = 1;
111   -}
112   -
113   -/**
114   - * onenand_read_block - Read CONFIG_SYS_MONITOR_LEN from begining
115   - * of OneNAND, skipping bad blocks
116   - * @return 0 on success
117   - */
118   -int onenand_read_block(unsigned char *buf)
119   -{
120   - int block, nblocks;
121   - int page = CONFIG_ONENAND_START_PAGE, offset = 0;
122   - int pagesize, erasesize, erase_shift;
123   - int page_is_4KiB = 0;
124   -
125   - onenand_read_page = generic_onenand_read_page;
126   -
127   - onenand_generic_init(&page_is_4KiB, &page);
128   -
129   - if (page_is_4KiB) {
130   - pagesize = 4096; /* OneNAND has 4KiB pagesize */
131   - erase_shift = 18;
132   - } else {
133   - pagesize = 2048; /* OneNAND has 2KiB pagesize */
134   - erase_shift = 17;
135   - }
136   -
137   - erasesize = (1 << erase_shift);
138   - nblocks = (CONFIG_SYS_MONITOR_LEN + erasesize - 1) >> erase_shift;
139   -
140   - /* NOTE: you must read page from page 1 of block 0 */
141   - /* read the block page by page */
142   - for (block = 0; block < nblocks; block++) {
143   - for (; page < ONENAND_PAGES_PER_BLOCK; page++) {
144   - if (onenand_read_page(block, page, buf + offset,
145   - pagesize)) {
146   - /* This block is bad. Skip it
147   - * and read next block */
148   - offset -= page * pagesize;
149   - nblocks++;
150   - break;
151   - }
152   - offset += pagesize;
153   - }
154   - page = 0;
155   - }
156   -
157   - return 0;
158   -}