Commit e556d3d630d31fd966eb676fbe43a90bf06e6d29

Authored by Simon Glass
Committed by Bin Meng
1 parent 4806fcea1a

x86: Enable pinctrl in SPL and TPL

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

Showing 2 changed files with 4 additions and 0 deletions Side-by-side Diff

... ... @@ -193,6 +193,7 @@
193 193 imply SPL_OF_LIBFDT
194 194 imply SPL_DRIVERS_MISC_SUPPORT
195 195 imply SPL_GPIO_SUPPORT
  196 + imply SPL_PINCTRL
196 197 imply SPL_LIBCOMMON_SUPPORT
197 198 imply SPL_LIBGENERIC_SUPPORT
198 199 imply SPL_SERIAL_SUPPORT
... ... @@ -206,6 +207,7 @@
206 207 imply TPL_DM
207 208 imply TPL_DRIVERS_MISC_SUPPORT
208 209 imply TPL_GPIO_SUPPORT
  210 + imply TPL_PINCTRL
209 211 imply TPL_LIBCOMMON_SUPPORT
210 212 imply TPL_LIBGENERIC_SUPPORT
211 213 imply TPL_SERIAL_SUPPORT
configs/chromebook_samus_tpl_defconfig
... ... @@ -72,6 +72,8 @@
72 72 CONFIG_TPL_MISC=y
73 73 CONFIG_CROS_EC=y
74 74 CONFIG_CROS_EC_LPC=y
  75 +# CONFIG_SPL_PINCTRL is not set
  76 +# CONFIG_TPL_PINCTRL is not set
75 77 CONFIG_SYS_NS16550=y
76 78 CONFIG_SOUND=y
77 79 CONFIG_SOUND_I8254=y