Commit e5c57eea4f4ac8c27343bde137b069ef816e69d7

Authored by Pavel Machek
Committed by Marek Vasut
1 parent daa23f5128

socfpga: implement arria V socdk SPI flash config in dts

Arria V SocDK has same QSPI and SPI flash configuration as Socrates. Add
support for it.

Signed-off-by: Pavel Machek <pavel@denx.de>

Showing 1 changed file with 24 additions and 0 deletions Side-by-side Diff

arch/arm/dts/socfpga_arria5_socdk.dts
... ... @@ -25,6 +25,10 @@
25 25 * to be added to the gmac1 device tree blob.
26 26 */
27 27 ethernet0 = &gmac1;
  28 +
  29 + spi0 = "/spi@ff705000"; /* QSPI */
  30 + spi1 = "/spi@fff00000";
  31 + spi2 = "/spi@fff01000";
28 32 };
29 33  
30 34 regulator_3_3v: 3-3-v-regulator {
... ... @@ -71,5 +75,25 @@
71 75  
72 76 &usb1 {
73 77 status = "okay";
  78 +};
  79 +
  80 +&qspi {
  81 + status = "okay";
  82 +
  83 + flash0: n25q00@0 {
  84 + #address-cells = <1>;
  85 + #size-cells = <1>;
  86 + compatible = "n25q00";
  87 + reg = <0>; /* chip select */
  88 + spi-max-frequency = <50000000>;
  89 + m25p,fast-read;
  90 + page-size = <256>;
  91 + block-size = <16>; /* 2^16, 64KB */
  92 + read-delay = <4>; /* delay value in read data capture register */
  93 + tshsl-ns = <50>;
  94 + tsd2d-ns = <50>;
  95 + tchsh-ns = <4>;
  96 + tslch-ns = <4>;
  97 + };
74 98 };