Commit e67243f1a3afc1289f647c86642f067c1ab05498

Authored by Jagan Teki
Committed by Anatolij Gustschin
1 parent b1bcd61665

video: rockchip: Fix vop modes for rk3399

VOP display endpoint pipeline configuration differs
between rk3288 vs rk3399.

These VOP pipeline configuration depends on how the
different display interfaces connected in sequence to
IN and OUT ports like for,

RK3288:

vopb_out: port {
	#address-cells = <1>;
	#size-cells = <0>;
	vopb_out_edp: endpoint@0 {
		reg = <0>;
		remote-endpoint = <&edp_in_vopb>;
	};
	vopb_out_hdmi: endpoint@1 {
		reg = <1>;
                remote-endpoint = <&hdmi_in_vopb>;
        };
        vopb_out_lvds: endpoint@2 {
                reg = <2>;
                remote-endpoint = <&lvds_in_vopb>;
        };
        vopb_out_mipi: endpoint@3 {
                reg = <3>;
                remote-endpoint = <&mipi_in_vopb>;
        };
};

RK3399:

vopb_out: port {
         #address-cells = <1>;
         #size-cells = <0>;
         vopb_out_edp: endpoint@0 {
                reg = <0>;
                remote-endpoint = <&edp_in_vopb>;
         };
         vopb_out_mipi: endpoint@1 {
                reg = <1>;
                remote-endpoint = <&mipi_in_vopb>;
         };
         vopb_out_hdmi: endpoint@2 {
                reg = <2>;
                remote-endpoint = <&hdmi_in_vopb>;
         };
         vopb_out_mipi1: endpoint@3 {
                reg = <3>;
                remote-endpoint = <&mipi1_in_vopb>;
         };
         vopb_out_dp: endpoint@4 {
                reg = <4>;
                remote-endpoint = <&dp_in_vopb>;
         };
};

here, HDMI interface has endpoint 1 in rk3288 and 2 in rk3399.

The rockchip vop driver often depends on this determined endpoint
number and stored in vop_mode. So based on this vop_mode the bpp
and pin polarity would configure on detected display interface.

Since, the existing driver using rk3288 vop mode settings enabling
the same will result wrong display interface configuration for rk3399.

Add the patch for fixing these vop modes for rk3399.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>

Showing 3 changed files with 15 additions and 2 deletions Side-by-side Diff

arch/arm/include/asm/arch-rockchip/vop_rk3288.h
... ... @@ -85,15 +85,26 @@
85 85 LB_RGB_1280X8 = 0x5
86 86 };
87 87  
  88 +#if defined(CONFIG_ROCKCHIP_RK3399)
88 89 enum vop_modes {
89 90 VOP_MODE_EDP = 0,
  91 + VOP_MODE_MIPI,
90 92 VOP_MODE_HDMI,
  93 + VOP_MODE_MIPI1,
  94 + VOP_MODE_DP,
  95 + VOP_MODE_NONE,
  96 +};
  97 +#else
  98 +enum vop_modes {
  99 + VOP_MODE_EDP = 0,
  100 + VOP_MODE_HDMI,
91 101 VOP_MODE_LVDS,
92 102 VOP_MODE_MIPI,
93 103 VOP_MODE_NONE,
94 104 VOP_MODE_AUTO_DETECT,
95 105 VOP_MODE_UNKNOWN,
96 106 };
  107 +#endif
97 108  
98 109 /* VOP_VERSION_INFO */
99 110 #define M_FPGA_VERSION (0xffff << 16)
drivers/video/rockchip/rk3399_vop.c
... ... @@ -45,8 +45,6 @@
45 45 V_RK3399_DSP_MIPI_POL(polarity));
46 46 break;
47 47  
48   - case VOP_MODE_LVDS:
49   - /* The RK3399 has neither parallel RGB nor LVDS output. */
50 48 default:
51 49 debug("%s: unsupported output mode %x\n", __func__, mode);
52 50 }
drivers/video/rockchip/rk_vop.c
... ... @@ -118,10 +118,12 @@
118 118 V_EDP_OUT_EN(1));
119 119 break;
120 120  
  121 +#if defined(CONFIG_ROCKCHIP_RK3288)
121 122 case VOP_MODE_LVDS:
122 123 clrsetbits_le32(&regs->sys_ctrl, M_ALL_OUT_EN,
123 124 V_RGB_OUT_EN(1));
124 125 break;
  126 +#endif
125 127  
126 128 case VOP_MODE_MIPI:
127 129 clrsetbits_le32(&regs->sys_ctrl, M_ALL_OUT_EN,
128 130  
... ... @@ -313,7 +315,9 @@
313 315 /* Set bitwidth for vop display according to vop mode */
314 316 switch (vop_id) {
315 317 case VOP_MODE_EDP:
  318 +#if defined(CONFIG_ROCKCHIP_RK3288)
316 319 case VOP_MODE_LVDS:
  320 +#endif
317 321 l2bpp = VIDEO_BPP16;
318 322 break;
319 323 case VOP_MODE_HDMI: