Commit e6d9c8916de9c24f2c52d0b01cf00d2e74a04cd8

Authored by Anton Vorontsov
Committed by Kim Phillips
1 parent 6f9cc6608b

mpc83xx: add TSECs' HRCWH masks for MPC837x processors

We'll use these masks to parse TSEC modes out of HRCWH.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

Showing 1 changed file with 2 additions and 0 deletions Side-by-side Diff

... ... @@ -544,12 +544,14 @@
544 544 #define HRCWH_RL_EXT_LEGACY 0x00000000
545 545 #define HRCWH_RL_EXT_NAND 0x00040000
546 546  
  547 +#define HRCWH_TSEC1M_MASK 0x0000E000
547 548 #define HRCWH_TSEC1M_IN_MII 0x00000000
548 549 #define HRCWH_TSEC1M_IN_RMII 0x00002000
549 550 #define HRCWH_TSEC1M_IN_RGMII 0x00006000
550 551 #define HRCWH_TSEC1M_IN_RTBI 0x0000A000
551 552 #define HRCWH_TSEC1M_IN_SGMII 0x0000C000
552 553  
  554 +#define HRCWH_TSEC2M_MASK 0x00001C00
553 555 #define HRCWH_TSEC2M_IN_MII 0x00000000
554 556 #define HRCWH_TSEC2M_IN_RMII 0x00000400
555 557 #define HRCWH_TSEC2M_IN_RGMII 0x00000C00