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Commit e70bfa2986f9c028e3c21e0995285047a9baec27

Authored by Joe Hershberger
Committed by Scott Wood
1 parent 33b1d5cae3
Exists in master and in 54 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

nand: Make NAND lock status compatible with Micron 

Micron NAND flash (e.g. MT29F4G08ABADAH4) BLOCK LOCK READ STATUS is not
the same as others.  Instead of bit 1 being lock, it is #lock_tight.
To make the driver support either format, ignore bit 1 and use only
bit 0 and bit 2.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>

Showing 3 changed files with 7 additions and 4 deletions Side-by-side Diff

... ... @@ -231,12 +231,18 @@
231 231 #ifdef CONFIG_CMD_NAND_LOCK_UNLOCK
232 232 static void print_status(ulong start, ulong end, ulong erasesize, int status)
233 233 {
  234 + /*
  235 + * Micron NAND flash (e.g. MT29F4G08ABADAH4) BLOCK LOCK READ STATUS is
  236 + * not the same as others. Instead of bit 1 being lock, it is
  237 + * #lock_tight. To make the driver support either format, ignore bit 1
  238 + * and use only bit 0 and bit 2.
  239 + */
234 240 printf("%08lx - %08lx: %08lx blocks %s%s%s\n",
235 241 start,
236 242 end - 1,
237 243 (end - start) / erasesize,
238 244 ((status & NAND_LOCK_STATUS_TIGHT) ? "TIGHT " : ""),
239   - ((status & NAND_LOCK_STATUS_LOCK) ? "LOCK " : ""),
  245 + (!(status & NAND_LOCK_STATUS_UNLOCK) ? "LOCK " : ""),
240 246 ((status & NAND_LOCK_STATUS_UNLOCK) ? "UNLOCK " : ""));
241 247 }
242 248  
drivers/mtd/nand/nand_util.c
Diff comments   View file @ e70bfa2
... ... @@ -265,7 +265,6 @@
265 265 * >0 lock status:
266 266 * bitfield with the following combinations:
267 267 * NAND_LOCK_STATUS_TIGHT: page in tight state
268   - * NAND_LOCK_STATUS_LOCK: page locked
269 268 * NAND_LOCK_STATUS_UNLOCK: page unlocked
270 269 *
271 270 */
... ... @@ -294,7 +293,6 @@
294 293 chip->cmdfunc(mtd, NAND_CMD_LOCK_STATUS, -1, page & chip->pagemask);
295 294  
296 295 ret = chip->read_byte(mtd) & (NAND_LOCK_STATUS_TIGHT
297   - | NAND_LOCK_STATUS_LOCK
298 296 | NAND_LOCK_STATUS_UNLOCK);
299 297  
300 298 out:
... ... @@ -141,7 +141,6 @@
141 141 int nand_erase_opts(nand_info_t *meminfo, const nand_erase_options_t *opts);
142 142  
143 143 #define NAND_LOCK_STATUS_TIGHT 0x01
144   -#define NAND_LOCK_STATUS_LOCK 0x02
145 144 #define NAND_LOCK_STATUS_UNLOCK 0x04
146 145  
147 146 int nand_lock(nand_info_t *meminfo, int tight);