Commit e799a09b72f81f0e2d580220ceeec31cf808fd74
1 parent
29aa878ffb
Exists in
smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga
and in
5 other branches
MLK-16219 pca953x_gpio: Clear the polarity invert register at init
The pca953x_gpio driver uses default value of polarity inversion register. For some devices like PCA9557 and MAX7310, their polarity inversion register default value is 0xf0. So for high 4 ports, when reading their values, the values are inverted as the actual level. This patch clears the polarity inversion register to 0 at init. So that the port read and write values are aligned. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Fugang Duan <fugang.duan@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit cc4e6b3786671ec2ce2ea74dc6334f72587cc756)
Showing 1 changed file with 29 additions and 0 deletions Side-by-side Diff
drivers/gpio/pca953x_gpio.c
| ... | ... | @@ -131,6 +131,26 @@ |
| 131 | 131 | return ret; |
| 132 | 132 | } |
| 133 | 133 | |
| 134 | +static int pca953x_write_regs(struct udevice *dev, int reg, u8 *val) | |
| 135 | +{ | |
| 136 | + struct pca953x_info *info = dev_get_platdata(dev); | |
| 137 | + int ret = 0; | |
| 138 | + | |
| 139 | + if (info->gpio_count <= 8) { | |
| 140 | + ret = dm_i2c_write(dev, reg, val, 1); | |
| 141 | + } else if (info->gpio_count <= 16) { | |
| 142 | + ret = dm_i2c_write(dev, reg << 1, val, info->bank_count); | |
| 143 | + } else if (info->gpio_count == 40) { | |
| 144 | + /* Auto increment */ | |
| 145 | + ret = dm_i2c_write(dev, (reg << 3) | 0x80, val, info->bank_count); | |
| 146 | + } else { | |
| 147 | + dev_err(dev, "Unsupported now\n"); | |
| 148 | + return -EINVAL; | |
| 149 | + } | |
| 150 | + | |
| 151 | + return ret; | |
| 152 | +} | |
| 153 | + | |
| 134 | 154 | static int pca953x_is_output(struct udevice *dev, int offset) |
| 135 | 155 | { |
| 136 | 156 | struct pca953x_info *info = dev_get_platdata(dev); |
| ... | ... | @@ -252,6 +272,7 @@ |
| 252 | 272 | int ret; |
| 253 | 273 | int size; |
| 254 | 274 | const u8 *tmp; |
| 275 | + u8 val[MAX_BANK]; | |
| 255 | 276 | |
| 256 | 277 | addr = dev_read_addr(dev); |
| 257 | 278 | if (addr == 0) |
| ... | ... | @@ -284,6 +305,14 @@ |
| 284 | 305 | ret = pca953x_read_regs(dev, PCA953X_DIRECTION, info->reg_direction); |
| 285 | 306 | if (ret) { |
| 286 | 307 | dev_err(dev, "Error reading direction register\n"); |
| 308 | + return ret; | |
| 309 | + } | |
| 310 | + | |
| 311 | + /* Clear the polarity registers to no invert */ | |
| 312 | + memset(val, 0, MAX_BANK); | |
| 313 | + ret = pca953x_write_regs(dev, PCA953X_INVERT, val); | |
| 314 | + if (ret) { | |
| 315 | + dev_err(dev, "Error writing invert register\n"); | |
| 287 | 316 | return ret; |
| 288 | 317 | } |
| 289 | 318 |