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Commit ea624e1951f1208ae619888be4c03f058e65c572

Authored by Hans de Goede
Committed by Albert ARIBAUD
1 parent 1bf0979f5f
Exists in v2017.01-smarct4x and in 37 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

ARM: Add arch/arm/cpu/armv7/Kconfig with non-secure and virt options 

Add arch/arm/cpu/armv7/Kconfig with non-secure and virt options, this is a
preparation patch for adding an env variable to choose between secure /
non-secure boot on non-secure boot capable systems, specifically this
prepares for adding CONFIG_ARMV7_BOOT_SEC_DEFAULT as a proper Kconfig option.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>

Showing 7 changed files with 31 additions and 6 deletions Side-by-side Diff

... ... @@ -413,6 +413,8 @@
413 413 config TARGET_VEXPRESS_CA15_TC2
414 414 bool "Support vexpress_ca15_tc2"
415 415 select CPU_V7
  416 + select CPU_V7_HAS_NONSEC
  417 + select CPU_V7_HAS_VIRT
416 418  
417 419 config TARGET_VEXPRESS_CA5X2
418 420 bool "Support vexpress_ca5x2"
... ... @@ -811,6 +813,8 @@
811 813 source "arch/arm/cpu/arm926ejs/versatile/Kconfig"
812 814  
813 815 source "arch/arm/cpu/armv7/zynq/Kconfig"
  816 +
  817 +source "arch/arm/cpu/armv7/Kconfig"
814 818  
815 819 source "board/aristainetos/Kconfig"
816 820 source "board/BuR/kwb/Kconfig"
arch/arm/cpu/armv7/Kconfig
Diff comments   View file @ ea624e1
  1 +if CPU_V7
  2 +
  3 +config CPU_V7_HAS_NONSEC
  4 + bool
  5 +
  6 +config CPU_V7_HAS_VIRT
  7 + bool
  8 +
  9 +config ARMV7_NONSEC
  10 + boolean "Enable support for booting in non-secure mode" if EXPERT
  11 + depends on CPU_V7_HAS_NONSEC
  12 + default y
  13 + ---help---
  14 + Say Y here to enable support for booting in non-secure / SVC mode.
  15 +
  16 +config ARMV7_VIRT
  17 + boolean "Enable support for hardware virtualization" if EXPERT
  18 + depends on CPU_V7_HAS_VIRT && ARMV7_NONSEC
  19 + default y
  20 + ---help---
  21 + Say Y here to boot in hypervisor (HYP) mode when booting non-secure.
  22 +
  23 +endif
arch/arm/cpu/armv7/exynos/Kconfig
Diff comments   View file @ ea624e1
... ... @@ -26,6 +26,8 @@
26 26  
27 27 config TARGET_ARNDALE
28 28 bool "Exynos5250 Arndale board"
  29 + select CPU_V7_HAS_NONSEC
  30 + select CPU_V7_HAS_VIRT
29 31 select SUPPORT_SPL
30 32 select OF_CONTROL if !SPL_BUILD
31 33  
... ... @@ -21,6 +21,8 @@
21 21 config MACH_SUN7I
22 22 bool "sun7i (Allwinner A20)"
23 23 select CPU_V7
  24 + select CPU_V7_HAS_NONSEC
  25 + select CPU_V7_HAS_VIRT
24 26 select SUPPORT_SPL
25 27  
26 28 config MACH_SUN8I
include/configs/arndale.h
Diff comments   View file @ ea624e1
... ... @@ -60,7 +60,5 @@
60 60 /* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */
61 61 #define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000
62 62  
63   -#define CONFIG_ARMV7_VIRT
64   -
65 63 #endif /* __CONFIG_H */
include/configs/sun7i.h
Diff comments   View file @ ea624e1
... ... @@ -22,8 +22,6 @@
22 22 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
23 23 #endif
24 24  
25   -#define CONFIG_ARMV7_VIRT 1
26   -#define CONFIG_ARMV7_NONSEC 1
27 25 #define CONFIG_ARMV7_PSCI 1
28 26 #define CONFIG_ARMV7_PSCI_NR_CPUS 2
29 27 #define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE
include/configs/vexpress_ca15_tc2.h
Diff comments   View file @ ea624e1
... ... @@ -18,7 +18,5 @@
18 18 #define CONFIG_SYSFLAGS_ADDR 0x1c010030
19 19 #define CONFIG_SMP_PEN_ADDR CONFIG_SYSFLAGS_ADDR
20 20  
21   -#define CONFIG_ARMV7_VIRT
22   -
23 21 #endif