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Commit ebf48500df91440773cb9684a5898d7ee61593d9

Authored by Keerthy
Committed by Tom Rini
1 parent 1f154a6318
Exists in smarc_8mq_lf_v2020.04 and in 11 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

board: ti: am43: Fix DCDC3 voltage for epos-evm 

A common voltage of 1.35V was being programmed for all am43 board
versions. EPOS-EVM Needs 1.20V for LPDDR2.

Fixes: fc69d472621b5 (“board: ti: AM43XX: Add ddr voltage rail configuration”)
Reported-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

Showing 2 changed files with 8 additions and 3 deletions Side-by-side Diff

board/ti/am43xx/board.c
Diff comments   View file @ ebf4850
... ... @@ -385,7 +385,7 @@
385 385  
386 386 void scale_vcores_generic(u32 m)
387 387 {
388   - int mpu_vdd;
  388 + int mpu_vdd, ddr_volt;
389 389  
390 390 if (i2c_probe(TPS65218_CHIP_PM))
391 391 return;
392 392  
... ... @@ -424,9 +424,13 @@
424 424 return;
425 425 }
426 426  
  427 + if (board_is_eposevm())
  428 + ddr_volt = TPS65218_DCDC3_VOLT_SEL_1200MV;
  429 + else
  430 + ddr_volt = TPS65218_DCDC3_VOLT_SEL_1350MV;
  431 +
427 432 /* Set DCDC3 (DDR) voltage */
428   - if (tps65218_voltage_update(TPS65218_DCDC3,
429   - TPS65218_DCDC3_VOLT_SEL_1350MV)) {
  433 + if (tps65218_voltage_update(TPS65218_DCDC3, ddr_volt)) {
430 434 printf("%s failure\n", __func__);
431 435 return;
432 436 }
include/power/tps65218.h
Diff comments   View file @ ebf4850
... ... @@ -64,6 +64,7 @@
64 64 #define TPS65218_DCDC_VOLT_SEL_1260MV 0x29
65 65 #define TPS65218_DCDC_VOLT_SEL_1330MV 0x30
66 66 #define TPS65218_DCDC3_VOLT_SEL_1350MV 0x12
  67 +#define TPS65218_DCDC3_VOLT_SEL_1200MV 0xC
67 68  
68 69 #define TPS65218_CC_STAT (BIT(0) | BIT(1))
69 70 #define TPS65218_STATE (BIT(2) | BIT(3))