imx: Document fuse assignments for MAC addresses

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>

imx: Document fuse assignments for MAC addresses
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Benoît Thébaudeau · Stefano Babic
1 parent 70a5ef2174
Showing 4 changed files with 36 additions and 0 deletions Side-by-side Diff
doc/README.imx25
doc/README.imx27
doc/README.imx5
doc/README.imx6
+U-Boot for Freescale i.MX25
+
+This file contains information for the port of U-Boot to the Freescale i.MX25
+SoC.
+
+1. CONVENTIONS FOR FUSE ASSIGNMENTS
+-----------------------------------
+
+1.1 MAC Address: It is stored in the words 26 to 31 of fuse bank 0, using the
+    natural MAC byte order (i.e. MSB first).
+U-Boot for Freescale i.MX27
+
+This file contains information for the port of U-Boot to the Freescale i.MX27
+SoC.
+
+1. CONVENTIONS FOR FUSE ASSIGNMENTS
+-----------------------------------
+
+1.1 MAC Address: It is stored in the words 4 to 9 of fuse bank 0, using the
+    reversed MAC byte order (i.e. LSB first).
@@ -20,4 +20,10 @@
     This option should be enabled for boards having a SYS_ON_OFF_CTL signal
     connected to GPIO1[23] and triggering the MAIN_PWR_ON signal like in the
     reference designs.
+
+2. CONVENTIONS FOR FUSE ASSIGNMENTS
+-----------------------------------
+
+2.1 MAC Address: It is stored in the words 9 to 14 of fuse bank 1, using the
+    natural MAC byte order (i.e. MSB first).
+U-Boot for Freescale i.MX6
+
+This file contains information for the port of U-Boot to the Freescale i.MX6
+SoC.
+
+1. CONVENTIONS FOR FUSE ASSIGNMENTS
+-----------------------------------
+
+1.1 MAC Address: It is stored in fuse bank 4, with the 32 lsbs in word 2 and the
+    16 msbs in word 3.
	1	+U-Boot for Freescale i.MX25
	2	+
	3	+This file contains information for the port of U-Boot to the Freescale i.MX25
	4	+SoC.
	5	+
	6	+1. CONVENTIONS FOR FUSE ASSIGNMENTS
	7	+-----------------------------------
	8	+
	9	+1.1 MAC Address: It is stored in the words 26 to 31 of fuse bank 0, using the
	10	+ natural MAC byte order (i.e. MSB first).
	1	+U-Boot for Freescale i.MX27
	2	+
	3	+This file contains information for the port of U-Boot to the Freescale i.MX27
	4	+SoC.
	5	+
	6	+1. CONVENTIONS FOR FUSE ASSIGNMENTS
	7	+-----------------------------------
	8	+
	9	+1.1 MAC Address: It is stored in the words 4 to 9 of fuse bank 0, using the
	10	+ reversed MAC byte order (i.e. LSB first).
...	...	@@ -20,4 +20,10 @@
20	20	This option should be enabled for boards having a SYS_ON_OFF_CTL signal
21	21	connected to GPIO1[23] and triggering the MAIN_PWR_ON signal like in the
22	22	reference designs.
	23	+
	24	+2. CONVENTIONS FOR FUSE ASSIGNMENTS
	25	+-----------------------------------
	26	+
	27	+2.1 MAC Address: It is stored in the words 9 to 14 of fuse bank 1, using the
	28	+ natural MAC byte order (i.e. MSB first).
	1	+U-Boot for Freescale i.MX6
	2	+
	3	+This file contains information for the port of U-Boot to the Freescale i.MX6
	4	+SoC.
	5	+
	6	+1. CONVENTIONS FOR FUSE ASSIGNMENTS
	7	+-----------------------------------
	8	+
	9	+1.1 MAC Address: It is stored in fuse bank 4, with the 32 lsbs in word 2 and the
	10	+ 16 msbs in word 3.