Commit eee45b4f545902a9089f68331c925898da813ac0
Committed by
Tom Rini
1 parent
9c7ad1ed01
Exists in
smarc_8mq_lf_v2020.04
and in
11 other branches
boards: amlogic: Add FriendlyElec NanoPi K2 board support
This adds platform code for the FriendlyElec NanoPi K2 board based on a Meson GXBB (S905) SoC with the Meson GXBB configuration. This initial submission only supports: - UART - MMC/SDCard - Ethernet - Reset Controller - Clock controller Cc: Yuefei Tan <yftan@friendlyarm.com> Signed-off-by: Thomas McKahan <tonymckahan@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Showing 9 changed files with 252 additions and 0 deletions Side-by-side Diff
arch/arm/dts/Makefile
arch/arm/mach-meson/Kconfig
... | ... | @@ -29,6 +29,12 @@ |
29 | 29 | with 2 GiB of RAM, Gigabit Ethernet, HDMI, 4 USB, micro-SD |
30 | 30 | slot, eMMC, IR receiver and a 40-pin GPIO header. |
31 | 31 | |
32 | +config TARGET_NANOPI_K2 | |
33 | + bool "NANOPI_K2" | |
34 | + help | |
35 | + NANOPI_K2 is a single board computer based on Meson GXBaby | |
36 | + with 2 GiB of RAM, Gigabit Ethernet,AP6212 Wifi, HDMI, 4 USB, | |
37 | + micro-SD slot, eMMC, IR receiver and a 40-pin GPIO header. | |
32 | 38 | endif |
33 | 39 | |
34 | 40 | if MESON_GXL |
... | ... | @@ -63,6 +69,8 @@ |
63 | 69 | default 0x1000 |
64 | 70 | |
65 | 71 | source "board/amlogic/odroid-c2/Kconfig" |
72 | + | |
73 | +source "board/amlogic/nanopi-k2/Kconfig" | |
66 | 74 | |
67 | 75 | source "board/amlogic/p212/Kconfig" |
68 | 76 |
board/amlogic/nanopi-k2/Kconfig
board/amlogic/nanopi-k2/MAINTAINERS
board/amlogic/nanopi-k2/Makefile
board/amlogic/nanopi-k2/README
1 | +U-Boot for NanoPi-K2 | |
2 | +==================== | |
3 | + | |
4 | +NanoPi-K2 is a single board computer manufactured by FriendlyElec | |
5 | +with the following specifications: | |
6 | + | |
7 | + - Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz | |
8 | + - ARM Mali 450 GPU | |
9 | + - 2GB DDR3 SDRAM | |
10 | + - Gigabit Ethernet | |
11 | + - HDMI 2.0 4K/60Hz display | |
12 | + - 40-pin GPIO header | |
13 | + - 4 x USB 2.0 Host, 1 x USB OTG | |
14 | + - eMMC, microSD | |
15 | + - Infrared receiver | |
16 | + | |
17 | +Schematics are available on the manufacturer website. | |
18 | + | |
19 | +Currently the u-boot port supports the following devices: | |
20 | + - serial | |
21 | + - eMMC, microSD | |
22 | + - Ethernet | |
23 | + | |
24 | +u-boot compilation | |
25 | +================== | |
26 | + | |
27 | + > export ARCH=arm | |
28 | + > export CROSS_COMPILE=aarch64-none-elf- | |
29 | + > make nanopi-k2_defconfig | |
30 | + > make | |
31 | + | |
32 | +Image creation | |
33 | +============== | |
34 | + | |
35 | +Amlogic doesn't provide sources for the firmware and for tools needed | |
36 | +to create the bootloader image, so it is necessary to obtain them from | |
37 | +the git tree published by the board vendor: | |
38 | + | |
39 | + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz | |
40 | + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz | |
41 | + > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz | |
42 | + > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz | |
43 | + > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH | |
44 | + > git clone https://github.com/BayLibre/u-boot.git -b libretech-cc amlogic-u-boot | |
45 | + > git clone https://github.com/friendlyarm/u-boot.git -b nanopi-k2-v2015.01 amlogic-u-boot | |
46 | + > cd amlogic-u-boot | |
47 | + > sed -i 's/aarch64-linux-gnu-/aarch64-none-elf-/' Makefile | |
48 | + > sed -i 's/arm-linux-/arm-none-eabi-/' arch/arm/cpu/armv8/gxb/firmware/scp_task/Makefile | |
49 | + > make nanopi-k2_defconfig | |
50 | + > make | |
51 | + > export FIPDIR=$PWD/fip | |
52 | + | |
53 | +Go back to mainline U-Boot source tree then : | |
54 | + > mkdir fip | |
55 | + | |
56 | + > cp $FIPDIR/gxb/bl2.bin fip/ | |
57 | + > cp $FIPDIR/gxb/acs.bin fip/ | |
58 | + > cp $FIPDIR/gxb/bl21.bin fip/ | |
59 | + > cp $FIPDIR/gxb/bl30.bin fip/ | |
60 | + > cp $FIPDIR/gxb/bl301.bin fip/ | |
61 | + > cp $FIPDIR/gxb/bl31.img fip/ | |
62 | + > cp u-boot.bin fip/bl33.bin | |
63 | + | |
64 | + > $FIPDIR/blx_fix.sh \ | |
65 | + fip/bl30.bin \ | |
66 | + fip/zero_tmp \ | |
67 | + fip/bl30_zero.bin \ | |
68 | + fip/bl301.bin \ | |
69 | + fip/bl301_zero.bin \ | |
70 | + fip/bl30_new.bin \ | |
71 | + bl30 | |
72 | + | |
73 | + > $FIPDIR/fip_create \ | |
74 | + --bl30 fip/bl30_new.bin \ | |
75 | + --bl31 fip/bl31.img \ | |
76 | + --bl33 fip/bl33.bin \ | |
77 | + fip/fip.bin | |
78 | + | |
79 | + > python $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0 | |
80 | + | |
81 | + > $FIPDIR/blx_fix.sh \ | |
82 | + fip/bl2_acs.bin \ | |
83 | + fip/zero_tmp \ | |
84 | + fip/bl2_zero.bin \ | |
85 | + fip/bl21.bin \ | |
86 | + fip/bl21_zero.bin \ | |
87 | + fip/bl2_new.bin \ | |
88 | + bl2 | |
89 | + | |
90 | + > cat fip/bl2_new.bin fip/fip.bin > fip/boot_new.bin | |
91 | + | |
92 | + > $FIPDIR/gxb/aml_encrypt_gxb --bootsig \ | |
93 | + --input fip/boot_new.bin | |
94 | + --output fip/u-boot.bin | |
95 | + | |
96 | +and then write the image to SD with: | |
97 | + | |
98 | + > DEV=/dev/your_sd_device | |
99 | + > dd if=fip/u-boot.bin of=$DEV conv=fsync,notrunc bs=512 seek=1 |
board/amlogic/nanopi-k2/nanopi-k2.c
1 | +// SPDX-License-Identifier: GPL-2.0+ | |
2 | +/* | |
3 | + * (C) Copyright 2018 Thomas McKahan | |
4 | + */ | |
5 | + | |
6 | +#include <common.h> | |
7 | +#include <dm.h> | |
8 | +#include <environment.h> | |
9 | +#include <asm/io.h> | |
10 | +#include <asm/arch/gx.h> | |
11 | +#include <asm/arch/sm.h> | |
12 | +#include <asm/arch/eth.h> | |
13 | +#include <asm/arch/mem.h> | |
14 | + | |
15 | +#define EFUSE_SN_OFFSET 20 | |
16 | +#define EFUSE_SN_SIZE 16 | |
17 | +#define EFUSE_MAC_OFFSET 52 | |
18 | +#define EFUSE_MAC_SIZE 6 | |
19 | + | |
20 | +int board_init(void) | |
21 | +{ | |
22 | + return 0; | |
23 | +} | |
24 | + | |
25 | +int misc_init_r(void) | |
26 | +{ | |
27 | + u8 mac_addr[EFUSE_MAC_SIZE]; | |
28 | + char serial[EFUSE_SN_SIZE]; | |
29 | + ssize_t len; | |
30 | + | |
31 | + meson_gx_eth_init(PHY_INTERFACE_MODE_RGMII, 0); | |
32 | + | |
33 | + /* Reset PHY on GPIOZ_14 */ | |
34 | + clrbits_le32(GX_GPIO_EN(3), BIT(14)); | |
35 | + clrbits_le32(GX_GPIO_OUT(3), BIT(14)); | |
36 | + mdelay(10); | |
37 | + setbits_le32(GX_GPIO_OUT(3), BIT(14)); | |
38 | + | |
39 | + if (!eth_env_get_enetaddr("ethaddr", mac_addr)) { | |
40 | + len = meson_sm_read_efuse(EFUSE_MAC_OFFSET, | |
41 | + mac_addr, EFUSE_MAC_SIZE); | |
42 | + if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr)) | |
43 | + eth_env_set_enetaddr("ethaddr", mac_addr); | |
44 | + } | |
45 | + | |
46 | + if (!env_get("serial#")) { | |
47 | + len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial, | |
48 | + EFUSE_SN_SIZE); | |
49 | + if (len == EFUSE_SN_SIZE) | |
50 | + env_set("serial#", serial); | |
51 | + } | |
52 | + | |
53 | + return 0; | |
54 | +} | |
55 | + | |
56 | +int ft_board_setup(void *blob, bd_t *bd) | |
57 | +{ | |
58 | + meson_gx_init_reserved_memory(blob); | |
59 | + | |
60 | + return 0; | |
61 | +} |
configs/nanopi-k2_defconfig
1 | +CONFIG_ARM=y | |
2 | +CONFIG_ARCH_MESON=y | |
3 | +CONFIG_SYS_TEXT_BASE=0x01000000 | |
4 | +CONFIG_MESON_GXBB=y | |
5 | +CONFIG_TARGET_NANOPI_K2=y | |
6 | +CONFIG_DEBUG_UART_BASE=0xc81004c0 | |
7 | +CONFIG_DEBUG_UART_CLOCK=24000000 | |
8 | +CONFIG_IDENT_STRING=" nanopi-k2" | |
9 | +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-nanopi-k2" | |
10 | +CONFIG_DEBUG_UART=y | |
11 | +CONFIG_OF_BOARD_SETUP=y | |
12 | +# CONFIG_DISPLAY_CPUINFO is not set | |
13 | +# CONFIG_DISPLAY_BOARDINFO is not set | |
14 | +# CONFIG_CMD_BDI is not set | |
15 | +# CONFIG_CMD_IMI is not set | |
16 | +CONFIG_CMD_GPIO=y | |
17 | +CONFIG_CMD_I2C=y | |
18 | +# CONFIG_CMD_LOADS is not set | |
19 | +CONFIG_CMD_MMC=y | |
20 | +# CONFIG_CMD_SETEXPR is not set | |
21 | +CONFIG_CMD_REGULATOR=y | |
22 | +CONFIG_OF_CONTROL=y | |
23 | +CONFIG_NET_RANDOM_ETHADDR=y | |
24 | +CONFIG_DM_GPIO=y | |
25 | +CONFIG_DM_I2C=y | |
26 | +CONFIG_SYS_I2C_MESON=y | |
27 | +CONFIG_DM_REGULATOR=y | |
28 | +CONFIG_DM_REGULATOR_FIXED=y | |
29 | +CONFIG_DM_RESET=y | |
30 | +CONFIG_DM_MMC=y | |
31 | +CONFIG_MMC_MESON_GX=y | |
32 | +CONFIG_DM_ETH=y | |
33 | +CONFIG_ETH_DESIGNWARE=y | |
34 | +CONFIG_PINCTRL=y | |
35 | +CONFIG_PINCTRL_MESON_GXBB=y | |
36 | +CONFIG_DEBUG_UART_MESON=y | |
37 | +CONFIG_DEBUG_UART_ANNOUNCE=y | |
38 | +CONFIG_DEBUG_UART_SKIP_INIT=y | |
39 | +CONFIG_MESON_SERIAL=y | |
40 | +CONFIG_OF_LIBFDT_OVERLAY=y |
include/configs/nanopi-k2.h
1 | +/* SPDX-License-Identifier: GPL-2.0+ */ | |
2 | +/* | |
3 | + * Configuration for NANOPI-K2 | |
4 | + * (C) Copyright 2018 Thomas McKahan | |
5 | + */ | |
6 | + | |
7 | +#ifndef __CONFIG_H | |
8 | +#define __CONFIG_H | |
9 | + | |
10 | +#define CONFIG_MISC_INIT_R | |
11 | + | |
12 | +/* Serial setup */ | |
13 | + | |
14 | +#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxbb-nanopi-k2.dtb\0" | |
15 | + | |
16 | +#include <configs/meson-gx-common.h> | |
17 | + | |
18 | +#endif /* __CONFIG_H */ |