net: fec: fix build warnings for 64bits support

When building for 64bits system, we get some warnings about type cast between pointer and integer. This patch eliminates the warnings by using ulong/long type which is 32bits on 32bits system or 64bits on 64bits system. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>

net: fec: fix build warnings for 64bits support
When building for 64bits system, we get some warnings about type cast between pointer and integer. This patch eliminates the warnings by using ulong/long type which is 32bits on 32bits system or 64bits on 64bits system. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Ye Li · Stefano Babic
1 parent 238a53c710
Showing 1 changed file with 43 additions and 31 deletions Side-by-side Diff
drivers/net/fec_mxc.c
@@ -284,7 +284,7 @@
 static void fec_rbd_init(struct fec_priv *fec, int count, int dsize)
 {
 	uint32_t size;
-	uint8_t *data;
+	ulong data;
 	int i;
  
 	/*
@@ -293,9 +293,9 @@
 	 */
 	size = roundup(dsize, ARCH_DMA_MINALIGN);
 	for (i = 0; i < count; i++) {
-		data = (uint8_t *)fec->rbd_base[i].data_pointer;
-		memset(data, 0, dsize);
-		flush_dcache_range((uint32_t)data, (uint32_t)data + size);
+		data = fec->rbd_base[i].data_pointer;
+		memset((void *)data, 0, dsize);
+		flush_dcache_range(data, data + size);
  
 		fec->rbd_base[i].status = FEC_RBD_EMPTY;
 		fec->rbd_base[i].data_length = 0;
@@ -305,8 +305,8 @@
 	fec->rbd_base[i - 1].status = FEC_RBD_WRAP | FEC_RBD_EMPTY;
 	fec->rbd_index = 0;
  
-	flush_dcache_range((unsigned)fec->rbd_base,
-			   (unsigned)fec->rbd_base + size);
+	flush_dcache_range((ulong)fec->rbd_base,
+			   (ulong)fec->rbd_base + size);
 }
  
 /**
@@ -323,7 +323,7 @@
  */
 static void fec_tbd_init(struct fec_priv *fec)
 {
-	unsigned addr = (unsigned)fec->tbd_base;
+	ulong addr = (ulong)fec->tbd_base;
 	unsigned size = roundup(2 * sizeof(struct fec_bd),
 				ARCH_DMA_MINALIGN);
  
@@ -423,7 +423,7 @@
 	struct fec_priv *fec = (struct fec_priv *)edev->priv;
 #endif
 	int speed;
-	uint32_t addr, size;
+	ulong addr, size;
 	int i;
  
 	debug("fec_open: fec_open(dev)\n");
@@ -439,7 +439,7 @@
 	/* Flush the descriptors into RAM */
 	size = roundup(FEC_RBD_NUM * sizeof(struct fec_bd),
 			ARCH_DMA_MINALIGN);
-	addr = (uint32_t)fec->rbd_base;
+	addr = (ulong)fec->rbd_base;
 	flush_dcache_range(addr, addr + size);
  
 #ifdef FEC_QUIRK_ENET_MAC
@@ -533,8 +533,9 @@
 #else
 	struct fec_priv *fec = (struct fec_priv *)dev->priv;
 #endif
-	uint32_t mib_ptr = (uint32_t)&fec->eth->rmon_t_drop;
-	int i;
+	u8 *mib_ptr = (uint8_t *)&fec->eth->rmon_t_drop;
+	u8 *i;
+	ulong addr;
  
 	/* Initialize MAC address */
 #ifdef CONFIG_DM_ETH
  
@@ -574,9 +575,13 @@
  
 	/* size and address of each buffer */
 	writel(FEC_MAX_PKT_SIZE, &fec->eth->emrbr);
-	writel((uint32_t)fec->tbd_base, &fec->eth->etdsr);
-	writel((uint32_t)fec->rbd_base, &fec->eth->erdsr);
  
+	addr = (ulong)fec->tbd_base;
+	writel((uint32_t)addr, &fec->eth->etdsr);
+
+	addr = (ulong)fec->rbd_base;
+	writel((uint32_t)addr, &fec->eth->erdsr);
+
 #ifndef CONFIG_PHYLIB
 	if (fec->xcv_type != SEVENWIRE)
 		miiphy_restart_aneg(dev);
@@ -640,8 +645,8 @@
 #endif
 {
 	unsigned int status;
-	uint32_t size, end;
-	uint32_t addr;
+	u32 size;
+	ulong addr, end;
 	int timeout = FEC_XFER_TIMEOUT;
 	int ret = 0;
  
  
@@ -672,13 +677,13 @@
 	swap_packet((uint32_t *)packet, length);
 #endif
  
-	addr = (uint32_t)packet;
+	addr = (ulong)packet;
 	end = roundup(addr + length, ARCH_DMA_MINALIGN);
 	addr &= ~(ARCH_DMA_MINALIGN - 1);
 	flush_dcache_range(addr, end);
  
 	writew(length, &fec->tbd_base[fec->tbd_index].data_length);
-	writel(addr, &fec->tbd_base[fec->tbd_index].data_pointer);
+	writel((uint32_t)addr, &fec->tbd_base[fec->tbd_index].data_pointer);
  
 	/*
 	 * update BD's status now
@@ -698,7 +703,7 @@
 	 * can start DMA.
 	 */
 	size = roundup(2 * sizeof(struct fec_bd), ARCH_DMA_MINALIGN);
-	addr = (uint32_t)fec->tbd_base;
+	addr = (ulong)fec->tbd_base;
 	flush_dcache_range(addr, addr + size);
  
 	/*
@@ -799,7 +804,7 @@
 	unsigned long ievent;
 	int frame_length, len = 0;
 	uint16_t bd_status;
-	uint32_t addr, size, end;
+	ulong addr, size, end;
 	int i;
 	ALLOC_CACHE_ALIGN_BUFFER(uchar, buff, FEC_MAX_PKT_SIZE);
  
@@ -854,7 +859,7 @@
 	 * the descriptor. The solution is to mark the whole cache line when all
 	 * descriptors in the cache line are processed.
 	 */
-	addr = (uint32_t)rbd;
+	addr = (ulong)rbd;
 	addr &= ~(ARCH_DMA_MINALIGN - 1);
 	size = roundup(sizeof(struct fec_bd), ARCH_DMA_MINALIGN);
 	invalidate_dcache_range(addr, addr + size);
@@ -882,8 +887,8 @@
 			len = frame_length;
 		} else {
 			if (bd_status & FEC_RBD_ERR)
-				debug("error frame: 0x%08x 0x%08x\n",
-				       addr, bd_status);
+				debug("error frame: 0x%08lx 0x%08x\n",
+				      addr, bd_status);
 		}
  
 		/*
@@ -895,7 +900,7 @@
 		size = RXDESC_PER_CACHELINE - 1;
 		if ((fec->rbd_index & size) == size) {
 			i = fec->rbd_index - size;
-			addr = (uint32_t)&fec->rbd_base[i];
+			addr = (ulong)&fec->rbd_base[i];
 			for (; i <= fec->rbd_index ; i++) {
 				fec_rbd_clean(i == (FEC_RBD_NUM - 1),
 					      &fec->rbd_base[i]);
@@ -922,6 +927,7 @@
 	unsigned int size;
 	int i;
 	uint8_t *data;
+	ulong addr;
  
 	/* Allocate TX descriptors. */
 	size = roundup(2 * sizeof(struct fec_bd), ARCH_DMA_MINALIGN);
  
@@ -950,11 +956,12 @@
  
 		memset(data, 0, size);
  
-		fec->rbd_base[i].data_pointer = (uint32_t)data;
+		addr = (ulong)data;
+		fec->rbd_base[i].data_pointer = (uint32_t)addr;
 		fec->rbd_base[i].status = FEC_RBD_EMPTY;
 		fec->rbd_base[i].data_length = 0;
 		/* Flush the buffer to memory. */
-		flush_dcache_range((uint32_t)data, (uint32_t)data + size);
+		flush_dcache_range(addr, addr + size);
 	}
  
 	/* Mark the last RBD to close the ring. */
@@ -966,8 +973,10 @@
 	return 0;
  
 err_ring:
-	for (; i >= 0; i--)
-		free((void *)fec->rbd_base[i].data_pointer);
+	for (; i >= 0; i--) {
+		addr = fec->rbd_base[i].data_pointer;
+		free((void *)addr);
+	}
 	free(fec->rbd_base);
 err_rx:
 	free(fec->tbd_base);
  
@@ -978,9 +987,12 @@
 static void fec_free_descs(struct fec_priv *fec)
 {
 	int i;
+	ulong addr;
  
-	for (i = 0; i < FEC_RBD_NUM; i++)
-		free((void *)fec->rbd_base[i].data_pointer);
+	for (i = 0; i < FEC_RBD_NUM; i++) {
+		addr = fec->rbd_base[i].data_pointer;
+		free((void *)addr);
+	}
 	free(fec->rbd_base);
 	free(fec->tbd_base);
 }
@@ -995,7 +1007,7 @@
 	struct fec_priv *priv = dev_get_priv(dev);
 	struct ethernet_regs *eth = priv->eth;
 #else
-	struct ethernet_regs *eth = (struct ethernet_regs *)base_addr;
+	struct ethernet_regs *eth = (struct ethernet_regs *)(ulong)base_addr;
 #endif
 	struct mii_dev *bus;
 	int ret;
@@ -1065,7 +1077,7 @@
 	edev->halt = fec_halt;
 	edev->write_hwaddr = fec_set_hwaddr;
  
-	fec->eth = (struct ethernet_regs *)base_addr;
+	fec->eth = (struct ethernet_regs *)(ulong)base_addr;
 	fec->bd = bd;
  
 	fec->xcv_type = CONFIG_FEC_XCV_TYPE;
...	...	@@ -284,7 +284,7 @@
284	284	static void fec_rbd_init(struct fec_priv *fec, int count, int dsize)
285	285	{
286	286	uint32_t size;
287		- uint8_t *data;
	287	+ ulong data;
288	288	int i;
289	289
290	290	/*
...	...	@@ -293,9 +293,9 @@
293	293	*/
294	294	size = roundup(dsize, ARCH_DMA_MINALIGN);
295	295	for (i = 0; i < count; i++) {
296		- data = (uint8_t *)fec->rbd_base[i].data_pointer;
297		- memset(data, 0, dsize);
298		- flush_dcache_range((uint32_t)data, (uint32_t)data + size);
	296	+ data = fec->rbd_base[i].data_pointer;
	297	+ memset((void *)data, 0, dsize);
	298	+ flush_dcache_range(data, data + size);
299	299
300	300	fec->rbd_base[i].status = FEC_RBD_EMPTY;
301	301	fec->rbd_base[i].data_length = 0;
...	...	@@ -305,8 +305,8 @@
305	305	fec->rbd_base[i - 1].status = FEC_RBD_WRAP \| FEC_RBD_EMPTY;
306	306	fec->rbd_index = 0;
307	307
308		- flush_dcache_range((unsigned)fec->rbd_base,
309		- (unsigned)fec->rbd_base + size);
	308	+ flush_dcache_range((ulong)fec->rbd_base,
	309	+ (ulong)fec->rbd_base + size);
310	310	}
311	311
312	312	/**
...	...	@@ -323,7 +323,7 @@
323	323	*/
324	324	static void fec_tbd_init(struct fec_priv *fec)
325	325	{
326		- unsigned addr = (unsigned)fec->tbd_base;
	326	+ ulong addr = (ulong)fec->tbd_base;
327	327	unsigned size = roundup(2 * sizeof(struct fec_bd),
328	328	ARCH_DMA_MINALIGN);
329	329
...	...	@@ -423,7 +423,7 @@
423	423	struct fec_priv fec = (struct fec_priv )edev->priv;
424	424	#endif
425	425	int speed;
426		- uint32_t addr, size;
	426	+ ulong addr, size;
427	427	int i;
428	428
429	429	debug("fec_open: fec_open(dev)\n");
...	...	@@ -439,7 +439,7 @@
439	439	/* Flush the descriptors into RAM */
440	440	size = roundup(FEC_RBD_NUM * sizeof(struct fec_bd),
441	441	ARCH_DMA_MINALIGN);
442		- addr = (uint32_t)fec->rbd_base;
	442	+ addr = (ulong)fec->rbd_base;
443	443	flush_dcache_range(addr, addr + size);
444	444
445	445	#ifdef FEC_QUIRK_ENET_MAC
...	...	@@ -533,8 +533,9 @@
533	533	#else
534	534	struct fec_priv fec = (struct fec_priv )dev->priv;
535	535	#endif
536		- uint32_t mib_ptr = (uint32_t)&fec->eth->rmon_t_drop;
537		- int i;
	536	+ u8 mib_ptr = (uint8_t )&fec->eth->rmon_t_drop;
	537	+ u8 *i;
	538	+ ulong addr;
538	539
539	540	/* Initialize MAC address */
540	541	#ifdef CONFIG_DM_ETH
541	542
...	...	@@ -574,9 +575,13 @@
574	575
575	576	/* size and address of each buffer */
576	577	writel(FEC_MAX_PKT_SIZE, &fec->eth->emrbr);
577		- writel((uint32_t)fec->tbd_base, &fec->eth->etdsr);
578		- writel((uint32_t)fec->rbd_base, &fec->eth->erdsr);
579	578
	579	+ addr = (ulong)fec->tbd_base;
	580	+ writel((uint32_t)addr, &fec->eth->etdsr);
	581	+
	582	+ addr = (ulong)fec->rbd_base;
	583	+ writel((uint32_t)addr, &fec->eth->erdsr);
	584	+
580	585	#ifndef CONFIG_PHYLIB
581	586	if (fec->xcv_type != SEVENWIRE)
582	587	miiphy_restart_aneg(dev);
...	...	@@ -640,8 +645,8 @@
640	645	#endif
641	646	{
642	647	unsigned int status;
643		- uint32_t size, end;
644		- uint32_t addr;
	648	+ u32 size;
	649	+ ulong addr, end;
645	650	int timeout = FEC_XFER_TIMEOUT;
646	651	int ret = 0;
647	652
648	653
...	...	@@ -672,13 +677,13 @@
672	677	swap_packet((uint32_t *)packet, length);
673	678	#endif
674	679
675		- addr = (uint32_t)packet;
	680	+ addr = (ulong)packet;
676	681	end = roundup(addr + length, ARCH_DMA_MINALIGN);
677	682	addr &= ~(ARCH_DMA_MINALIGN - 1);
678	683	flush_dcache_range(addr, end);
679	684
680	685	writew(length, &fec->tbd_base[fec->tbd_index].data_length);
681		- writel(addr, &fec->tbd_base[fec->tbd_index].data_pointer);
	686	+ writel((uint32_t)addr, &fec->tbd_base[fec->tbd_index].data_pointer);
682	687
683	688	/*
684	689	* update BD's status now
...	...	@@ -698,7 +703,7 @@
698	703	* can start DMA.
699	704	*/
700	705	size = roundup(2 * sizeof(struct fec_bd), ARCH_DMA_MINALIGN);
701		- addr = (uint32_t)fec->tbd_base;
	706	+ addr = (ulong)fec->tbd_base;
702	707	flush_dcache_range(addr, addr + size);
703	708
704	709	/*
...	...	@@ -799,7 +804,7 @@
799	804	unsigned long ievent;
800	805	int frame_length, len = 0;
801	806	uint16_t bd_status;
802		- uint32_t addr, size, end;
	807	+ ulong addr, size, end;
803	808	int i;
804	809	ALLOC_CACHE_ALIGN_BUFFER(uchar, buff, FEC_MAX_PKT_SIZE);
805	810
...	...	@@ -854,7 +859,7 @@
854	859	* the descriptor. The solution is to mark the whole cache line when all
855	860	* descriptors in the cache line are processed.
856	861	*/
857		- addr = (uint32_t)rbd;
	862	+ addr = (ulong)rbd;
858	863	addr &= ~(ARCH_DMA_MINALIGN - 1);
859	864	size = roundup(sizeof(struct fec_bd), ARCH_DMA_MINALIGN);
860	865	invalidate_dcache_range(addr, addr + size);
...	...	@@ -882,8 +887,8 @@
882	887	len = frame_length;
883	888	} else {
884	889	if (bd_status & FEC_RBD_ERR)
885		- debug("error frame: 0x%08x 0x%08x\n",
886		- addr, bd_status);
	890	+ debug("error frame: 0x%08lx 0x%08x\n",
	891	+ addr, bd_status);
887	892	}
888	893
889	894	/*
...	...	@@ -895,7 +900,7 @@
895	900	size = RXDESC_PER_CACHELINE - 1;
896	901	if ((fec->rbd_index & size) == size) {
897	902	i = fec->rbd_index - size;
898		- addr = (uint32_t)&fec->rbd_base[i];
	903	+ addr = (ulong)&fec->rbd_base[i];
899	904	for (; i <= fec->rbd_index ; i++) {
900	905	fec_rbd_clean(i == (FEC_RBD_NUM - 1),
901	906	&fec->rbd_base[i]);
...	...	@@ -922,6 +927,7 @@
922	927	unsigned int size;
923	928	int i;
924	929	uint8_t *data;
	930	+ ulong addr;
925	931
926	932	/* Allocate TX descriptors. */
927	933	size = roundup(2 * sizeof(struct fec_bd), ARCH_DMA_MINALIGN);
928	934
...	...	@@ -950,11 +956,12 @@
950	956
951	957	memset(data, 0, size);
952	958
953		- fec->rbd_base[i].data_pointer = (uint32_t)data;
	959	+ addr = (ulong)data;
	960	+ fec->rbd_base[i].data_pointer = (uint32_t)addr;
954	961	fec->rbd_base[i].status = FEC_RBD_EMPTY;
955	962	fec->rbd_base[i].data_length = 0;
956	963	/* Flush the buffer to memory. */
957		- flush_dcache_range((uint32_t)data, (uint32_t)data + size);
	964	+ flush_dcache_range(addr, addr + size);
958	965	}
959	966
960	967	/* Mark the last RBD to close the ring. */
...	...	@@ -966,8 +973,10 @@
966	973	return 0;
967	974
968	975	err_ring:
969		- for (; i >= 0; i--)
970		- free((void *)fec->rbd_base[i].data_pointer);
	976	+ for (; i >= 0; i--) {
	977	+ addr = fec->rbd_base[i].data_pointer;
	978	+ free((void *)addr);
	979	+ }
971	980	free(fec->rbd_base);
972	981	err_rx:
973	982	free(fec->tbd_base);
974	983
...	...	@@ -978,9 +987,12 @@
978	987	static void fec_free_descs(struct fec_priv *fec)
979	988	{
980	989	int i;
	990	+ ulong addr;
981	991
982		- for (i = 0; i < FEC_RBD_NUM; i++)
983		- free((void *)fec->rbd_base[i].data_pointer);
	992	+ for (i = 0; i < FEC_RBD_NUM; i++) {
	993	+ addr = fec->rbd_base[i].data_pointer;
	994	+ free((void *)addr);
	995	+ }
984	996	free(fec->rbd_base);
985	997	free(fec->tbd_base);
986	998	}
...	...	@@ -995,7 +1007,7 @@
995	1007	struct fec_priv *priv = dev_get_priv(dev);
996	1008	struct ethernet_regs *eth = priv->eth;
997	1009	#else
998		- struct ethernet_regs eth = (struct ethernet_regs )base_addr;
	1010	+ struct ethernet_regs eth = (struct ethernet_regs )(ulong)base_addr;
999	1011	#endif
1000	1012	struct mii_dev *bus;
1001	1013	int ret;
...	...	@@ -1065,7 +1077,7 @@
1065	1077	edev->halt = fec_halt;
1066	1078	edev->write_hwaddr = fec_set_hwaddr;
1067	1079
1068		- fec->eth = (struct ethernet_regs *)base_addr;
	1080	+ fec->eth = (struct ethernet_regs *)(ulong)base_addr;
1069	1081	fec->bd = bd;
1070	1082
1071	1083	fec->xcv_type = CONFIG_FEC_XCV_TYPE;