Commit f3a8546b8f1b24efbf7a5878ec915d69c5082cf1

Authored by Tim Harvey
Committed by Stefano Babic
1 parent f938500f2c

imx: ventana: make SD3_VSELECT board specific

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>

Showing 2 changed files with 18 additions and 14 deletions Side-by-side Diff

board/gateworks/gw_ventana/common.c
... ... @@ -143,12 +143,6 @@
143 143 * Baseboard specific GPIO
144 144 */
145 145  
146   -/* common to add baseboards */
147   -static iomux_v3_cfg_t const gw_gpio_pads[] = {
148   - /* SD3_VSELECT */
149   - IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
150   -};
151   -
152 146 /* prototype */
153 147 static iomux_v3_cfg_t const gwproto_gpio_pads[] = {
154 148 /* RS232_EN# */
... ... @@ -196,6 +190,8 @@
196 190 };
197 191  
198 192 static iomux_v3_cfg_t const gw52xx_gpio_pads[] = {
  193 + /* SD3_VSELECT */
  194 + IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
199 195 /* RS232_EN# */
200 196 IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
201 197 /* MSATA_EN */
... ... @@ -229,6 +225,8 @@
229 225 };
230 226  
231 227 static iomux_v3_cfg_t const gw53xx_gpio_pads[] = {
  228 + /* SD3_VSELECT */
  229 + IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
232 230 /* RS232_EN# */
233 231 IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
234 232 /* MSATA_EN */
... ... @@ -262,6 +260,8 @@
262 260 };
263 261  
264 262 static iomux_v3_cfg_t const gw54xx_gpio_pads[] = {
  263 + /* SD3_VSELECT */
  264 + IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
265 265 /* RS232_EN# */
266 266 IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
267 267 /* MSATA_EN */
268 268  
... ... @@ -338,11 +338,12 @@
338 338 };
339 339  
340 340 static iomux_v3_cfg_t const gw553x_gpio_pads[] = {
  341 + /* SD3_VSELECT */
  342 + IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
341 343 /* PANLEDG# */
342 344 IOMUX_PADS(PAD_KEY_COL2__GPIO4_IO10 | DIO_PAD_CFG),
343 345 /* PANLEDR# */
344 346 IOMUX_PADS(PAD_KEY_ROW2__GPIO4_IO11 | DIO_PAD_CFG),
345   -
346 347 /* VID_PWR */
347 348 IOMUX_PADS(PAD_CSI0_DATA_EN__GPIO5_IO20 | DIO_PAD_CFG),
348 349 /* PCI_RST# */
... ... @@ -629,6 +630,7 @@
629 630 .msata_en = GP_MSATA_SEL,
630 631 .rs232_en = GP_RS232_EN,
631 632 .otgpwr_en = IMX_GPIO_NR(3, 22),
  633 + .vsel_pin = IMX_GPIO_NR(6, 14),
632 634 },
633 635  
634 636 /* GW53xx */
... ... @@ -651,6 +653,7 @@
651 653 .msata_en = GP_MSATA_SEL,
652 654 .rs232_en = GP_RS232_EN,
653 655 .otgpwr_en = IMX_GPIO_NR(3, 22),
  656 + .vsel_pin = IMX_GPIO_NR(6, 14),
654 657 },
655 658  
656 659 /* GW54xx */
... ... @@ -675,6 +678,7 @@
675 678 .msata_en = GP_MSATA_SEL,
676 679 .rs232_en = GP_RS232_EN,
677 680 .otgpwr_en = IMX_GPIO_NR(3, 22),
  681 + .vsel_pin = IMX_GPIO_NR(6, 14),
678 682 },
679 683  
680 684 /* GW551x */
... ... @@ -721,6 +725,7 @@
721 725 .vidin_en = IMX_GPIO_NR(5, 20),
722 726 .wdis = IMX_GPIO_NR(7, 12),
723 727 .otgpwr_en = IMX_GPIO_NR(3, 22),
  728 + .vsel_pin = IMX_GPIO_NR(6, 14),
724 729 },
725 730 };
726 731  
... ... @@ -728,9 +733,6 @@
728 733 {
729 734 int i;
730 735  
731   - /* iomux common to all Ventana boards */
732   - SETUP_IOMUX_PADS(gw_gpio_pads);
733   -
734 736 if (board >= GW_UNKNOWN)
735 737 return;
736 738  
... ... @@ -827,9 +829,11 @@
827 829 }
828 830  
829 831 /* sense vselect pin to see if we support uhs-i */
830   - gpio_request(GP_SD3_VSELECT, "sd3_vselect");
831   - gpio_direction_input(GP_SD3_VSELECT);
832   - gpio_cfg[board].usd_vsel = !gpio_get_value(GP_SD3_VSELECT);
  832 + if (gpio_cfg[board].vsel_pin) {
  833 + gpio_request(gpio_cfg[board].vsel_pin, "sd3_vselect");
  834 + gpio_direction_input(gpio_cfg[board].vsel_pin);
  835 + gpio_cfg[board].usd_vsel = !gpio_get_value(gpio_cfg[board].vsel_pin);
  836 + }
833 837 }
834 838  
835 839 /* setup GPIO pinmux and default configuration per baseboard and env */
board/gateworks/gw_ventana/common.h
... ... @@ -16,7 +16,6 @@
16 16 #define GP_SD3_CD IMX_GPIO_NR(7, 0)
17 17 #define GP_RS232_EN IMX_GPIO_NR(2, 11)
18 18 #define GP_MSATA_SEL IMX_GPIO_NR(2, 8)
19   -#define GP_SD3_VSELECT IMX_GPIO_NR(6, 14)
20 19  
21 20 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
22 21 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
... ... @@ -79,6 +78,7 @@
79 78 int msata_en;
80 79 int rs232_en;
81 80 int otgpwr_en;
  81 + int vsel_pin;
82 82 /* various features */
83 83 bool usd_vsel;
84 84 };