Eric Lee / smarc-uboot

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Commit f57f70aab9d5ed7964f2f791829a2d780b788a7e

Authored by Wolfgang Denk
1 parent 3df5bea0b0
Exists in master and in 54 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

Support passing of OF flat trees to the kernel. 

Patch by Pantelis Antoniou, 04 Sep 2005

Showing 16 changed files with 313 additions and 219 deletions Side-by-side Diff

... ... @@ -2,6 +2,9 @@
2 2 Changes for U-Boot 1.1.4:
3 3 ======================================================================
4 4  
  5 +* Support passing of OF flat trees to the kernel.
  6 + Patch by Pantelis Antoniou, 04 Sep 2005
  7 +
5 8 * Cleanup
6 9  
7 10 * Add support for NetSilicon NS7520 processor.
... ... @@ -1598,6 +1598,9 @@
1598 1598 logodl_config : unconfig
1599 1599 @./mkconfig $(@:_config=) arm pxa logodl
1600 1600  
  1601 +pxa255_idp_config: unconfig
  1602 + @./mkconfig $(@:_config=) arm pxa pxa255_idp
  1603 +
1601 1604 wepep250_config : unconfig
1602 1605 @./mkconfig $(@:_config=) arm pxa wepep250
1603 1606  
... ... @@ -399,6 +399,20 @@
399 399 expect it to be in bytes, others in MB.
400 400 Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
401 401  
  402 + CONFIG_OF_FLAT_TREE
  403 +
  404 + New kernel versions are expecting firmware settings to be
  405 + passed using flat open firmware trees.
  406 + The environment variable "disable_of", when set, disables this
  407 + functionality.
  408 +
  409 + CONFIG_OF_FLAT_TREE_MAX_SIZE
  410 +
  411 + The maximum size of the constructed OF tree.
  412 +
  413 + OF_CPU - The proper name of the cpus node.
  414 + OF_TBCLK - The timebase frequency.
  415 +
402 416 - Serial Ports:
403 417 CFG_PL010_SERIAL
404 418  
... ... @@ -90,17 +90,17 @@
90 90 long mear1;
91 91 long emear1;
92 92  
93   - size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
  93 + size = get_ram_size (CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
94 94  
95 95 new_bank0_end = size - 1;
96   - mear1 = mpc824x_mpc107_getreg(MEAR1);
97   - emear1 = mpc824x_mpc107_getreg(EMEAR1);
  96 + mear1 = mpc824x_mpc107_getreg (MEAR1);
  97 + emear1 = mpc824x_mpc107_getreg (EMEAR1);
98 98 mear1 = (mear1 & 0xFFFFFF00) |
99 99 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
100 100 emear1 = (emear1 & 0xFFFFFF00) |
101 101 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
102   - mpc824x_mpc107_setreg(MEAR1, mear1);
103   - mpc824x_mpc107_setreg(EMEAR1, emear1);
  102 + mpc824x_mpc107_setreg (MEAR1, mear1);
  103 + mpc824x_mpc107_setreg (EMEAR1, emear1);
104 104  
105 105 return (size);
106 106 }
107 107  
... ... @@ -113,11 +113,11 @@
113 113 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
114 114 pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
115 115 PCI_ENET0_MEMADDR,
116   - PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
  116 + PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER } },
117 117 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x10, PCI_ANY_ID,
118 118 pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
119 119 PCI_ENET1_MEMADDR,
120   - PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
  120 + PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER } },
121 121 { }
122 122 };
123 123 #endif
124 124  
125 125  
126 126  
127 127  
128 128  
129 129  
130 130  
131 131  
132 132  
133 133  
134 134  
135 135  
... ... @@ -128,68 +128,66 @@
128 128 #endif
129 129 };
130 130  
131   -void pci_init_board(void)
  131 +void pci_init_board (void)
132 132 {
133   - pci_mpc824x_init(&hose);
  133 + pci_mpc824x_init (&hose);
134 134 }
135 135  
136   -int write_flash(char *addr, char value)
  136 +int write_flash (char *addr, char value)
137 137 {
138 138 char *adr = (char *)0xFF800000;
139 139 int cnt = 0;
140 140 char status,oldstatus;
141   - *(adr+0x55) = 0xAA;
142 141  
143   - udelay(1);
144   - *(adr+0xAA) = 0x55;
145   - udelay(1);
146   - *(adr+0x55) = 0xA0;
147   - udelay(1);
  142 + *(adr+0x55) = 0xAA; udelay (1);
  143 + *(adr+0xAA) = 0x55; udelay (1);
  144 + *(adr+0x55) = 0xA0; udelay (1);
148 145 *addr = value;
149 146  
150 147 status = *addr;
151   - do{
152   -
  148 + do {
153 149 oldstatus = status;
154 150 status = *addr;
155 151  
156   - if ((oldstatus & 0x40) == (status & 0x40)){
  152 + if ((oldstatus & 0x40) == (status & 0x40)) {
157 153 return 4;
158 154 }
159 155 cnt++;
160   - if (cnt > 10000){
  156 + if (cnt > 10000) {
161 157 return 2;
162 158 }
163   - }while( (status & 0x20) == 0 );
  159 + } while ( (status & 0x20) == 0 );
164 160  
165 161 oldstatus = *addr;
166 162 status = *addr;
167 163  
168   - if ((oldstatus & 0x40) == (status & 0x40)) return 0;
169   - else {
  164 + if ((oldstatus & 0x40) == (status & 0x40)) {
  165 + return 0;
  166 + } else {
170 167 *(adr+0x55) = 0xF0;
171 168 return 1;
172 169 }
173 170 }
174 171  
175   -unsigned update_flash(unsigned char* buf){
176   - switch((*buf) & 0x3){
177   - case TRY_WORKING:
178   - printf("found 3 and converted it to 2\n");
179   - write_flash(buf, (*buf) & 0xFE);
180   - *((unsigned char *)0xFF800000) = 0xF0;
181   - udelay(100);
182   - printf("buf [%#010x] %#010x\n",buf,(*buf));
183   - case BOOT_WORKING :
184   - return BOOT_WORKING;
  172 +unsigned update_flash (unsigned char *buf)
  173 +{
  174 + switch ((*buf) & 0x3) {
  175 + case TRY_WORKING:
  176 + printf ("found 3 and converted it to 2\n");
  177 + write_flash (buf, (*buf) & 0xFE);
  178 + *((unsigned char *)0xFF800000) = 0xF0;
  179 + udelay (100);
  180 + printf ("buf [%#010x] %#010x\n", buf, (*buf));
  181 + /* XXX - fall through??? */
  182 + case BOOT_WORKING :
  183 + return BOOT_WORKING;
185 184 }
186 185 return BOOT_DEFAULT;
187 186 }
188 187  
189   -unsigned scan_flash(void)
  188 +unsigned scan_flash (void)
190 189 {
191 190 char section[] = "kernel";
192   - ulong sp;
193 191 int cfgFileLen = (CFG_FLASH_ERASE_SECTOR_LENGTH >> 1);
194 192 int sectionPtr = 0;
195 193 int foundItem = 0; /* 0: None, 1: section found, 2: "=" found */
196 194  
197 195  
198 196  
199 197  
200 198  
201 199  
... ... @@ -198,57 +196,54 @@
198 196  
199 197 buf = (unsigned char*)(CFG_FLASH_RANGE_BASE + CFG_FLASH_RANGE_SIZE \
200 198 - CFG_FLASH_ERASE_SECTOR_LENGTH);
201   - for(bufPtr = 0; bufPtr < cfgFileLen; ++bufPtr){
  199 + for (bufPtr = 0; bufPtr < cfgFileLen; ++bufPtr) {
202 200 if ((buf[bufPtr]==0xFF) && (*(int*)(buf+bufPtr)==0xFFFFFFFF)) {
203 201 return BOOT_DEFAULT;
204 202 }
205   - switch(foundItem)
206   - {
207   - /* This is the scanning loop, we try to find a particular
208   - * quoted value
209   - */
210   - case 0:
211   - if((section[sectionPtr] == 0)){
212   - ++foundItem;
213   - }
214   - else if(buf[bufPtr] == section[sectionPtr]){
215   - ++sectionPtr;
216   - }
217   - else {
218   - sectionPtr = 0;
219   - }
220   - break;
221   - case 1:
  203 + /* This is the scanning loop, we try to find a particular
  204 + * quoted value
  205 + */
  206 + switch (foundItem) {
  207 + case 0:
  208 + if ((section[sectionPtr] == 0)) {
222 209 ++foundItem;
223   - break;
224   - case 2:
225   - ++foundItem;
226   - break;
227   - case 3:
228   - default:
229   - return update_flash(buf[bufPtr - 1]);
  210 + } else if (buf[bufPtr] == section[sectionPtr]) {
  211 + ++sectionPtr;
  212 + } else {
  213 + sectionPtr = 0;
  214 + }
  215 + break;
  216 + case 1:
  217 + ++foundItem;
  218 + break;
  219 + case 2:
  220 + ++foundItem;
  221 + break;
  222 + case 3:
  223 + default:
  224 + return update_flash (&buf[bufPtr - 1]);
230 225 }
231 226 }
232 227  
233   - printf("Failed to read %s\n",section);
  228 + printf ("Failed to read %s\n",section);
234 229 return BOOT_DEFAULT;
235 230 }
236 231  
237   -TSBootInfo* find_boot_info(void)
  232 +TSBootInfo* find_boot_info (void)
238 233 {
239   - unsigned bootimage = scan_flash();
240   - TSBootInfo* info = (TSBootInfo*)malloc(sizeof(TSBootInfo));
  234 + unsigned bootimage = scan_flash ();
  235 + TSBootInfo* info = (TSBootInfo*)malloc (sizeof(TSBootInfo));
241 236  
242   - switch(bootimage){
243   - case TRY_WORKING:
244   - info->address = CFG_WORKING_KERNEL_ADDRESS;
245   - break;
246   - case BOOT_WORKING :
247   - info->address = CFG_WORKING_KERNEL_ADDRESS;
248   - break;
249   - case BOOT_DEFAULT:
250   - default:
251   - info->address= CFG_DEFAULT_KERNEL_ADDRESS;
  237 + switch (bootimage) {
  238 + case TRY_WORKING:
  239 + info->address = CFG_WORKING_KERNEL_ADDRESS;
  240 + break;
  241 + case BOOT_WORKING :
  242 + info->address = CFG_WORKING_KERNEL_ADDRESS;
  243 + break;
  244 + case BOOT_DEFAULT:
  245 + default:
  246 + info->address= CFG_DEFAULT_KERNEL_ADDRESS;
252 247  
253 248 }
254 249 info->size = *((unsigned int *)(info->address ));
255 250  
256 251  
257 252  
258 253  
259 254  
260 255  
261 256  
262 257  
263 258  
264 259  
... ... @@ -256,43 +251,44 @@
256 251 return info;
257 252 }
258 253  
259   -void barcobcd_boot(void)
  254 +void barcobcd_boot (void)
260 255 {
261 256 TSBootInfo* start;
262 257 char *bootm_args[2];
263 258 char *buf;
264 259 int cnt;
  260 + extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
265 261  
266 262 buf = (char *)(0x00800000);
267 263 /* make certain there are enough chars to print the command line here!
268 264 */
269   - bootm_args[0]=(char *)malloc(16*sizeof(char));
270   - bootm_args[1]=(char *)malloc(16*sizeof(char));
  265 + bootm_args[0] = (char *)malloc (16*sizeof(char));
  266 + bootm_args[1] = (char *)malloc (16*sizeof(char));
271 267  
272   - start = find_boot_info();
  268 + start = find_boot_info ();
273 269  
274   - printf("Booting kernel at address %#10x with size %#10x\n",
  270 + printf ("Booting kernel at address %#10x with size %#10x\n",
275 271 start->address, start->size);
276 272  
277 273 /* give length of the kernel image to bootm */
278   - sprintf(bootm_args[0],"%x",start->size);
  274 + sprintf (bootm_args[0],"%x",start->size);
279 275 /* give address of the kernel image to bootm */
280   - sprintf(bootm_args[1],"%x",buf);
  276 + sprintf (bootm_args[1],"%x",buf);
281 277  
282   - printf("flash address: %#10x\n",start->address+8);
283   - printf("buf address: %#10x\n",buf);
  278 + printf ("flash address: %#10x\n",start->address+8);
  279 + printf ("buf address: %#10x\n",buf);
284 280  
285 281 /* aha, we reserve 8 bytes here... */
286   - for (cnt = 0; cnt < start->size ; cnt++){
  282 + for (cnt = 0; cnt < start->size ; cnt++) {
287 283 buf[cnt] = ((char *)start->address)[cnt+8];
288 284 }
289 285  
290 286 /* initialise RAM memory */
291 287 *((unsigned int *)0xFEC00000) = 0x00141A98;
292   - do_bootm(NULL,0,2,bootm_args);
  288 + do_bootm (NULL,0,2,bootm_args);
293 289 }
294 290  
295   -int barcobcd_boot_image(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  291 +int barcobcd_boot_image (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
296 292 {
297 293 #if 0
298 294 if (argc > 1) {
... ... @@ -300,7 +296,7 @@
300 296 return 1;
301 297 }
302 298 #endif
303   - barcobcd_boot();
  299 + barcobcd_boot ();
304 300  
305 301 return 0;
306 302 }
307 303  
308 304  
... ... @@ -308,19 +304,19 @@
308 304 /* Currently, boot_working and boot_default are the same command. This is
309 305 * left in here to see what we'll do in the future */
310 306  
311   -U_BOOT_CMD(
  307 +U_BOOT_CMD (
312 308 try_working, 1, 1, barcobcd_boot_image,
313 309 " try_working - check flash value and boot the appropriate image\n",
314 310 "\n"
315 311 );
316 312  
317   -U_BOOT_CMD(
  313 +U_BOOT_CMD (
318 314 boot_working, 1, 1, barcobcd_boot_image,
319 315 " boot_working - check flash value and boot the appropriate image\n",
320 316 "\n"
321 317 );
322 318  
323   -U_BOOT_CMD(
  319 +U_BOOT_CMD (
324 320 boot_default, 1, 1, barcobcd_boot_image,
325 321 " boot_default - check flash value and boot the appropriate image\n",
326 322 "\n"
327 323  
... ... @@ -328,14 +324,41 @@
328 324 /*
329 325 * We are not using serial communication, so just provide empty functions
330 326 */
331   -int serial_init(void){return 0;}
332   -void serial_setbrg(void){}
333   -void serial_putc(const char c){}
334   -void serial_puts(const char *c){}
335   -void serial_addr(unsigned int i){}
336   -int serial_getc(void){return 0;}
337   -int serial_tstc(void){return 0;}
  327 +int serial_init (void)
  328 +{
  329 + return 0;
  330 +}
  331 +void serial_setbrg (void)
  332 +{
  333 + return;
  334 +}
  335 +void serial_putc (const char c)
  336 +{
  337 + return;
  338 +}
  339 +void serial_puts (const char *c)
  340 +{
  341 + return;
  342 +}
  343 +void serial_addr (unsigned int i)
  344 +{
  345 + return;
  346 +}
  347 +int serial_getc (void)
  348 +{
  349 + return 0;
  350 +}
  351 +int serial_tstc (void)
  352 +{
  353 + return 0;
  354 +}
338 355  
339   -unsigned long post_word_load(void){return 0l;};
340   -void post_word_store(unsigned long val){}
  356 +unsigned long post_word_load (void)
  357 +{
  358 + return 0l;
  359 +}
  360 +void post_word_store (unsigned long val)
  361 +{
  362 + return;
  363 +}
... ... @@ -46,7 +46,7 @@
46 46 env_nand.o env_dataflash.o env_flash.o env_eeprom.o \
47 47 env_nvram.o env_nowhere.o \
48 48 exports.o \
49   - flash.o fpga.o \
  49 + flash.o fpga.o ft_build.o \
50 50 hush.o kgdb.o lcd.o lists.o lynxkdi.o \
51 51 memsize.o miiphybb.o miiphyutil.o \
52 52 s_record.o serial.o soft_i2c.o soft_spi.o spartan2.o spartan3.o \
... ... @@ -34,6 +34,10 @@
34 34 #include <environment.h>
35 35 #include <asm/byteorder.h>
36 36  
  37 +#ifdef CONFIG_OF_FLAT_TREE
  38 +#include <ft_build.h>
  39 +#endif
  40 +
37 41 /*cmd_boot.c*/
38 42 extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
39 43  
... ... @@ -489,6 +493,11 @@
489 493 }
490 494 #endif /* CONFIG_SILENT_CONSOLE */
491 495  
  496 +#ifdef CONFIG_OF_FLAT_TREE
  497 +extern const unsigned char oftree_dtb[];
  498 +extern const unsigned int oftree_dtb_len;
  499 +#endif
  500 +
492 501 #ifdef CONFIG_PPC
493 502 static void
494 503 do_bootm_linux (cmd_tbl_t *cmdtp, int flag,
... ... @@ -511,6 +520,9 @@
511 520 bd_t *kbd;
512 521 void (*kernel)(bd_t *, ulong, ulong, ulong, ulong);
513 522 image_header_t *hdr = &header;
  523 +#ifdef CONFIG_OF_FLAT_TREE
  524 + char *of_flat_tree;
  525 +#endif
514 526  
515 527 if ((s = getenv ("initrd_high")) != NULL) {
516 528 /* a value of "no" or a similar string will act like 0,
517 529  
518 530  
... ... @@ -776,15 +788,26 @@
776 788 initrd_end = 0;
777 789 }
778 790  
  791 +#ifdef CONFIG_OF_FLAT_TREE
  792 + if (initrd_start == 0)
  793 + of_flat_tree = (char *)(((ulong)kbd - OF_FLAT_TREE_MAX_SIZE -
  794 + sizeof(bd_t)) & ~0xF);
  795 + else
  796 + of_flat_tree = (char *)((initrd_start - OF_FLAT_TREE_MAX_SIZE -
  797 + sizeof(bd_t)) & ~0xF);
  798 +#endif
779 799  
780 800 debug ("## Transferring control to Linux (at address %08lx) ...\n",
781 801 (ulong)kernel);
782 802  
783 803 SHOW_BOOT_PROGRESS (15);
784 804  
  805 +#ifndef CONFIG_OF_FLAT_TREE
  806 +
785 807 #if defined(CFG_INIT_RAM_LOCK) && !defined(CONFIG_E500)
786 808 unlock_ram_in_cache();
787 809 #endif
  810 +
788 811 /*
789 812 * Linux Kernel Parameters:
790 813 * r3: ptr to board info data
... ... @@ -794,6 +817,25 @@
794 817 * r7: End of command line string
795 818 */
796 819 (*kernel) (kbd, initrd_start, initrd_end, cmd_start, cmd_end);
  820 +
  821 +#else
  822 + ft_setup(of_flat_tree, OF_FLAT_TREE_MAX_SIZE, kbd);
  823 + /* ft_dump_blob(of_flat_tree); */
  824 +
  825 +#if defined(CFG_INIT_RAM_LOCK) && !defined(CONFIG_E500)
  826 + unlock_ram_in_cache();
  827 +#endif
  828 + /*
  829 + * Linux Kernel Parameters:
  830 + * r3: ptr to OF flat tree, followed by the board info data
  831 + * r4: initrd_start or 0 if no initrd
  832 + * r5: initrd_end - unused if r4 is 0
  833 + * r6: Start of command line string
  834 + * r7: End of command line string
  835 + */
  836 + (*kernel) ((bd_t *)of_flat_tree, initrd_start, initrd_end, cmd_start, cmd_end);
  837 +
  838 +#endif
797 839 }
798 840 #endif /* CONFIG_PPC */
799 841  
... ... @@ -318,11 +318,20 @@
318 318 do_iopset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
319 319 {
320 320 uint rcode = 0;
  321 + iopin_t iopin;
321 322 static uint port = 0;
322 323 static uint pin = 0;
323 324 static uint value = 0;
324   - static enum { DIR, PAR, SOR, ODR, DAT, INT } cmd = DAT;
325   - iopin_t iopin;
  325 + static enum {
  326 + DIR,
  327 + PAR,
  328 + SOR,
  329 + ODR,
  330 + DAT,
  331 +#if defined(CONFIG_8xx)
  332 + INT
  333 +#endif
  334 + } cmd = DAT;
326 335  
327 336 if (argc != 5) {
328 337 puts ("iopset PORT PIN CMD VALUE\n");
cpu/arm920t/at91rm9200/ether.c
Diff comments   View file @ f57f70a
... ... @@ -184,7 +184,7 @@
184 184  
185 185 /* Init Ehternet buffers */
186 186 for (i = 0; i < RBF_FRAMEMAX; i++) {
187   - rbfdt[i].addr = rbf_framebuf[i];
  187 + rbfdt[i].addr = (unsigned long)rbf_framebuf[i];
188 188 rbfdt[i].size = 0;
189 189 }
190 190 rbfdt[RBF_FRAMEMAX - 1].addr |= RBF_WRAP;
include/configs/AP1000.h
Diff comments   View file @ f57f70a
... ... @@ -24,19 +24,19 @@
24 24  
25 25 #undef DEBUG
26 26  
27   -#define CONFIG_405 1 /* This is a PPC405 CPU */
28   -#define CONFIG_4xx 1 /* ...member of PPC4xx family */
  27 +#define CONFIG_405 1 /* This is a PPC405 CPU */
  28 +#define CONFIG_4xx 1 /* ...member of PPC4xx family */
29 29  
30   -#define CONFIG_AP1000 1 /* ...on an AP1000 board */
  30 +#define CONFIG_AP1000 1 /* ...on an AP1000 board */
31 31  
32   -#define CONFIG_PCI 1
  32 +#define CONFIG_PCI 1
33 33  
34   -#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
35   -#define CFG_PROMPT "0> "
  34 +#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
  35 +#define CFG_PROMPT "0> "
36 36 #define CFG_PROMPT_HUSH_PS2 "> "
37 37  
38   -#define CONFIG_COMMAND_EDIT 1
39   -#define CONFIG_COMMAND_HISTORY 1
  38 +#define CONFIG_COMMAND_EDIT 1
  39 +#define CONFIG_COMMAND_HISTORY 1
40 40 #define CONFIG_COMPLETE_ADDRESSES 1
41 41  
42 42 #define CFG_ENV_IS_IN_FLASH 1
43 43  
... ... @@ -50,10 +50,10 @@
50 50 #endif
51 51 #endif
52 52  
53   -#define CONFIG_BAUDRATE 57600
54   -#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
  53 +#define CONFIG_BAUDRATE 57600
  54 +#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
55 55  
56   -#define CONFIG_BOOTCOMMAND "" /* autoboot command */
  56 +#define CONFIG_BOOTCOMMAND "" /* autoboot command */
57 57  
58 58 /* Size (bytes) of interrupt driven serial port buffer.
59 59 * Set to 0 to use polling instead of interrupts.
60 60  
61 61  
62 62  
63 63  
64 64  
65 65  
66 66  
67 67  
68 68  
69 69  
... ... @@ -61,48 +61,47 @@
61 61 */
62 62 #undef CONFIG_SERIAL_SOFTWARE_FIFO
63 63  
64   -#define CONFIG_BOOTARGS "console=ttyS0,57600"
  64 +#define CONFIG_BOOTARGS "console=ttyS0,57600"
65 65  
66   -#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
67   -#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
  66 +#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
  67 +#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
68 68  
69   -#define CONFIG_COMMANDS ( (CONFIG_CMD_DFL & \
70   - (~CFG_CMD_RTC) & ~(CFG_CMD_I2C)) | \
71   - CFG_CMD_IRQ | \
72   - CFG_CMD_PCI | \
73   - CFG_CMD_DHCP | \
74   - CFG_CMD_ASKENV | \
75   - CFG_CMD_ELF | \
76   - CFG_CMD_PING | \
77   - CFG_CMD_MVENV \
  69 +#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
  70 + CFG_CMD_ASKENV | \
  71 + CFG_CMD_DHCP | \
  72 + CFG_CMD_ELF | \
  73 + CFG_CMD_IRQ | \
  74 + CFG_CMD_MVENV | \
  75 + CFG_CMD_PCI | \
  76 + CFG_CMD_PING \
78 77 )
79 78  
80 79 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
81 80 #include <cmd_confdefs.h>
82 81  
83   -#undef CONFIG_WATCHDOG /* watchdog disabled */
  82 +#undef CONFIG_WATCHDOG /* watchdog disabled */
84 83  
85   -#define CONFIG_SYS_CLK_FREQ 30000000
  84 +#define CONFIG_SYS_CLK_FREQ 30000000
86 85  
87   -#define CONFIG_SPD_EEPROM 1 /* use SPD EEPROM for setup */
  86 +#define CONFIG_SPD_EEPROM 1 /* use SPD EEPROM for setup */
88 87  
89 88 /*
90 89 * Miscellaneous configurable options
91 90 */
92   -#define CFG_LONGHELP /* undef to save memory */
  91 +#define CFG_LONGHELP /* undef to save memory */
93 92 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
94   -#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
  93 +#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
95 94 #else
96   -#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
  95 +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
97 96 #endif
98 97 /* usually: (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) */
99   -#define CFG_PBSIZE (CFG_CBSIZE+4+16) /* Print Buffer Size */
100   -#define CFG_MAXARGS 16 /* max number of command args */
101   -#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
  98 +#define CFG_PBSIZE (CFG_CBSIZE+4+16) /* Print Buffer Size */
  99 +#define CFG_MAXARGS 16 /* max number of command args */
  100 +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
102 101  
103   -#define CFG_ALT_MEMTEST 1
104   -#define CFG_MEMTEST_START 0x00400000 /* memtest works on */
105   -#define CFG_MEMTEST_END 0x01000000 /* 4 ... 16 MB in DRAM */
  102 +#define CFG_ALT_MEMTEST 1
  103 +#define CFG_MEMTEST_START 0x00400000 /* memtest works on */
  104 +#define CFG_MEMTEST_END 0x01000000 /* 4 ... 16 MB in DRAM */
106 105  
107 106 /*
108 107 * If CFG_EXT_SERIAL_CLOCK, then the UART divisor is 1.
109 108  
110 109  
111 110  
112 111  
113 112  
114 113  
115 114  
116 115  
117 116  
118 117  
119 118  
120 119  
121 120  
122 121  
... ... @@ -113,84 +112,84 @@
113 112 * If CFG_405_UART_ERRATA_59 and 200MHz CPU clock,
114 113 * set Linux BASE_BAUD to 403200.
115 114 */
116   -#undef CFG_EXT_SERIAL_CLOCK /* external serial clock */
117   -#undef CFG_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
  115 +#undef CFG_EXT_SERIAL_CLOCK /* external serial clock */
  116 +#undef CFG_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
118 117  
119   -#define CFG_NS16550_CLK 40000000
120   -#define CFG_DUART_CHAN 0
121   -#define CFG_NS16550_COM1 (0x4C000000 + 0x1000)
122   -#define CFG_NS16550_COM2 (0x4C800000 + 0x1000)
123   -#define CFG_NS16550_REG_SIZE 4
124   -#define CFG_NS16550 1
125   -#define CFG_INIT_CHAN1 1
126   -#define CFG_INIT_CHAN2 0
  118 +#define CFG_NS16550_CLK 40000000
  119 +#define CFG_DUART_CHAN 0
  120 +#define CFG_NS16550_COM1 (0x4C000000 + 0x1000)
  121 +#define CFG_NS16550_COM2 (0x4C800000 + 0x1000)
  122 +#define CFG_NS16550_REG_SIZE 4
  123 +#define CFG_NS16550 1
  124 +#define CFG_INIT_CHAN1 1
  125 +#define CFG_INIT_CHAN2 0
127 126  
128 127 /* The following table includes the supported baudrates */
129 128 #define CFG_BAUDRATE_TABLE \
130 129 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
131 130  
132   -#define CFG_LOAD_ADDR 0x00100000 /* default load address */
133   -#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
  131 +#define CFG_LOAD_ADDR 0x00200000 /* default load address */
  132 +#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
134 133  
135   -#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
  134 +#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
136 135  
137 136 /*-----------------------------------------------------------------------
138 137 * Start addresses for the final memory configuration
139 138 * (Set up by the startup code)
140 139 * Please note that CFG_SDRAM_BASE _must_ start at 0
141 140 */
142   -#define CFG_SDRAM_BASE 0x00000000
143   -#define CFG_FLASH_BASE 0x20000000
144   -#define CFG_MONITOR_BASE TEXT_BASE
145   -#define CFG_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */
146   -#define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
  141 +#define CFG_SDRAM_BASE 0x00000000
  142 +#define CFG_FLASH_BASE 0x20000000
  143 +#define CFG_MONITOR_BASE TEXT_BASE
  144 +#define CFG_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */
  145 +#define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
147 146  
148 147 /*
149 148 * For booting Linux, the board info and command line data
150 149 * have to be in the first 8 MB of memory, since this is
151 150 * the maximum mapped by the Linux kernel during initialization.
152 151 */
153   -#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
  152 +#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
154 153 /*-----------------------------------------------------------------------
155 154 * FLASH organization
156 155 */
157   -#define CFG_FLASH_CFI 1
158   -#define CFG_PROGFLASH_BASE CFG_FLASH_BASE
159   -#define CFG_CONFFLASH_BASE 0x24000000
  156 +#define CFG_FLASH_CFI 1
  157 +#define CFG_PROGFLASH_BASE CFG_FLASH_BASE
  158 +#define CFG_CONFFLASH_BASE 0x24000000
160 159  
161   -#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
162   -#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
  160 +#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
  161 +#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
163 162  
164 163 #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
165   -#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
  164 +#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
166 165  
167   -#define CFG_FLASH_PROTECTION 1 /* use hardware protection */
  166 +#define CFG_FLASH_PROTECTION 1 /* use hardware protection */
168 167  
169 168 /* BEG ENVIRONNEMENT FLASH */
170 169 #ifdef CFG_ENV_IS_IN_FLASH
171   -#define CFG_ENV_OFFSET 0x00040000 /* Offset of Environment Sector */
172   -#define CFG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */
173   -#define CFG_ENV_SECT_SIZE 0x20000 /* see README - env sector total size */
  170 +#define CFG_ENV_OFFSET 0x00040000 /* Offset of Environment Sector */
  171 +#define CFG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */
  172 +#define CFG_ENV_SECT_SIZE 0x20000 /* see README - env sector total size */
174 173 #endif
175 174 /* END ENVIRONNEMENT FLASH */
176 175 /*-----------------------------------------------------------------------
177 176 * NVRAM organization
178 177 */
179   -#define CFG_NVRAM_BASE_ADDR 0xf0000000 /* NVRAM base address */
180   -#define CFG_NVRAM_SIZE 0x1ff8 /* NVRAM size */
  178 +#define CFG_NVRAM_BASE_ADDR 0xf0000000 /* NVRAM base address */
  179 +#define CFG_NVRAM_SIZE 0x1ff8 /* NVRAM size */
181 180  
182 181 #ifdef CFG_ENV_IS_IN_NVRAM
183   -#define CFG_ENV_SIZE 0x1000 /* Size of Environment vars */
  182 +#define CFG_ENV_SIZE 0x1000 /* Size of Environment vars */
184 183 #define CFG_ENV_ADDR \
185 184 (CFG_NVRAM_BASE_ADDR+CFG_NVRAM_SIZE-CFG_ENV_SIZE) /* Env */
186 185 #endif
187 186 /*-----------------------------------------------------------------------
188 187 * Cache Configuration
189 188 */
190   -#define CFG_DCACHE_SIZE 16384
191   -#define CFG_CACHELINE_SIZE 32
  189 +#define CFG_DCACHE_SIZE 16384
  190 +#define CFG_CACHELINE_SIZE 32
192 191 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
193   -#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
  192 +#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
194 193 #endif
195 194  
196 195 /*
197 196  
... ... @@ -199,11 +198,11 @@
199 198 * BR0/1 and OR0/1 (FLASH)
200 199 */
201 200  
202   -#define FLASH_BASE0_PRELIM CFG_FLASH_BASE /* FLASH bank #0 */
203   -#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
  201 +#define FLASH_BASE0_PRELIM CFG_FLASH_BASE /* FLASH bank #0 */
  202 +#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
204 203  
205 204 /* Configuration Port location */
206   -#define CONFIG_PORT_ADDR 0xF0000500
  205 +#define CONFIG_PORT_ADDR 0xF0000500
207 206  
208 207 /*-----------------------------------------------------------------------
209 208 * Definitions for initial stack pointer and data area (in DPRAM)
... ... @@ -211,8 +210,8 @@
211 210  
212 211 #define CFG_INIT_RAM_ADDR 0x400000 /* inside of SDRAM */
213 212 #define CFG_INIT_RAM_END 0x2000 /* End of used area in RAM */
214   -#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
215   -#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
  213 +#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
  214 +#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
216 215 #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
217 216  
218 217 /*-----------------------------------------------------------------------
219 218  
220 219  
221 220  
... ... @@ -226,26 +225,26 @@
226 225 *
227 226 * Boot Flags
228 227 */
229   -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
230   -#define BOOTFLAG_WARM 0x02 /* Software reboot */
  228 +#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
  229 +#define BOOTFLAG_WARM 0x02 /* Software reboot */
231 230  
232 231 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
233 232 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
234   -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
  233 +#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
235 234 #endif
236 235  
237 236 /* JFFS2 stuff */
238 237  
239   -#define CFG_JFFS2_FIRST_BANK 0
240   -#define CFG_JFFS2_NUM_BANKS 1
241   -#define CFG_JFFS2_FIRST_SECTOR 1
  238 +#define CFG_JFFS2_FIRST_BANK 0
  239 +#define CFG_JFFS2_NUM_BANKS 1
  240 +#define CFG_JFFS2_FIRST_SECTOR 1
242 241  
243 242 #define CONFIG_NET_MULTI
244 243 #define CONFIG_E1000
245 244  
246   -#define CFG_ETH_DEV_FN 0x0800
247   -#define CFG_ETH_IOBASE 0x31000000
248   -#define CFG_ETH_MEMBASE 0x32000000
  245 +#define CFG_ETH_DEV_FN 0x0800
  246 +#define CFG_ETH_IOBASE 0x31000000
  247 +#define CFG_ETH_MEMBASE 0x32000000
249 248  
250 249 #endif /* __CONFIG_H */
include/configs/NC650.h
Diff comments   View file @ f57f70a
... ... @@ -99,19 +99,17 @@
99 99 #define SCL 0x1000 /* PA 3 */
100 100 #define SDA 0x2000 /* PA 2 */
101 101  
102   -#define PAR immr->im_ioport.iop_papar
103   -#define DIR immr->im_ioport.iop_padir
104   -#define DAT immr->im_ioport.iop_padat
105   -
106   -#define I2C_INIT {PAR &= ~(SCL | SDA); DIR |= SCL;}
107   -#define I2C_ACTIVE (DIR |= SDA)
108   -#define I2C_TRISTATE (DIR &= ~SDA)
109   -#define I2C_READ ((DAT & SDA) != 0)
110   -#define I2C_SDA(bit) if (bit) DAT |= SDA; \
111   - else DAT &= ~SDA
112   -#define I2C_SCL(bit) if (bit) DAT |= SCL; \
113   - else DAT &= ~SCL
114   -#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
  102 +#define __I2C_DIR immr->im_ioport.iop_padir
  103 +#define __I2C_DAT immr->im_ioport.iop_padat
  104 +#define __I2C_PAR immr->im_ioport.iop_papar
  105 +#define I2C_INIT { __I2C_PAR &= ~(SDA|SCL); \
  106 + __I2C_DIR |= (SDA|SCL); }
  107 +#define I2C_READ ((__I2C_DAT & SDA) ? 1 : 0)
  108 +#define I2C_SDA(x) { if (x) __I2C_DAT |= SDA; else __I2C_DAT &= ~SDA; }
  109 +#define I2C_SCL(x) { if (x) __I2C_DAT |= SCL; else __I2C_DAT &= ~SCL; }
  110 +#define I2C_DELAY { udelay(5); }
  111 +#define I2C_ACTIVE { __I2C_DIR |= SDA; }
  112 +#define I2C_TRISTATE { __I2C_DIR &= ~SDA; }
115 113  
116 114 #define CONFIG_RTC_PCF8563
117 115 #define CFG_I2C_RTC_ADDR 0x51
include/configs/PM854.h
Diff comments   View file @ f57f70a
... ... @@ -235,7 +235,7 @@
235 235 #define CONFIG_NET_MULTI
236 236 #define CONFIG_PCI_PNP /* do pci plug-and-play */
237 237  
238   -#define CONFIG_EEPRO100
  238 +/* #define CONFIG_EEPRO100 XXX - FIXME: conflicts when CONFIG_MII is enabled */
239 239 #define CONFIG_E1000
240 240 #undef CONFIG_TULIP
241 241  
include/configs/TOP860.h
Diff comments   View file @ f57f70a
... ... @@ -181,17 +181,20 @@
181 181 #if defined (CONFIG_SOFT_I2C)
182 182 #define SDA 0x00010
183 183 #define SCL 0x00020
184   -#define DIR immr->im_cpm.cp_pbdir
185   -#define DAT immr->im_cpm.cp_pbdat
186   -#define PAR immr->im_cpm.cp_pbpar
187   -#define ODR immr->im_cpm.cp_pbodr
188   -#define I2C_INIT {PAR&=~(SDA|SCL);ODR&=~(SDA|SCL);DAT|=(SDA|SCL);DIR|=(SDA|SCL);}
189   -#define I2C_READ ((DAT&SDA)?1:0)
190   -#define I2C_SDA(x) {if(x)DAT|=SDA;else DAT&=~SDA;}
191   -#define I2C_SCL(x) {if(x)DAT|=SCL;else DAT&=~SCL;}
192   -#define I2C_DELAY {udelay(5);}
193   -#define I2C_ACTIVE {DIR|=SDA;}
194   -#define I2C_TRISTATE {DIR&=~SDA;}
  184 +#define __I2C_DIR immr->im_cpm.cp_pbdir
  185 +#define __I2C_DAT immr->im_cpm.cp_pbdat
  186 +#define __I2C_PAR immr->im_cpm.cp_pbpar
  187 +#define __I2C_ODR immr->im_cpm.cp_pbodr
  188 +#define I2C_INIT { __I2C_PAR &= ~(SDA|SCL); \
  189 + __I2C_ODR &= ~(SDA|SCL); \
  190 + __I2C_DAT |= (SDA|SCL); \
  191 + __I2C_DIR|=(SDA|SCL); }
  192 +#define I2C_READ ((__I2C_DAT & SDA) ? 1 : 0)
  193 +#define I2C_SDA(x) { if (x) __I2C_DAT |= SDA; else __I2C_DAT &= ~SDA; }
  194 +#define I2C_SCL(x) { if (x) __I2C_DAT |= SCL; else __I2C_DAT &= ~SCL; }
  195 +#define I2C_DELAY { udelay(5); }
  196 +#define I2C_ACTIVE { __I2C_DIR |= SDA; }
  197 +#define I2C_TRISTATE { __I2C_DIR &= ~SDA; }
195 198 #endif
196 199  
197 200 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
include/configs/TQM5200.h
Diff comments   View file @ f57f70a
... ... @@ -83,7 +83,7 @@
83 83 #define CONFIG_PCI_IO_SIZE 0x01000000
84 84  
85 85 #define CONFIG_NET_MULTI 1
86   -#define CONFIG_EEPRO100 1
  86 +/* #define CONFIG_EEPRO100 XXX - FIXME: conflicts when CONFIG_MII is enabled */
87 87 #define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
88 88 #define CONFIG_NS8382X 1
89 89 #endif /* CONFIG_STK52XX */
include/configs/TQM8560.h
Diff comments   View file @ f57f70a
... ... @@ -283,7 +283,7 @@
283 283 #define CONFIG_NET_MULTI
284 284 #define CONFIG_PCI_PNP /* do pci plug-and-play */
285 285  
286   -#define CONFIG_EEPRO100
  286 +/* #define CONFIG_EEPRO100 XXX - FIXME: conflicts when CONFIG_MII is enabled */
287 287 #undef CONFIG_TULIP
288 288  
289 289 #if !defined(CONFIG_PCI_PNP)
include/configs/barco.h
Diff comments   View file @ f57f70a
... ... @@ -162,7 +162,7 @@
162 162 #define CFG_ENV_IS_IN_FLASH 1
163 163 #define CFG_ENV_OFFSET 0x000047A4 /* Offset of Environment Sector */
164 164 #define CFG_ENV_SIZE 0x00002000 /* Total Size of Environment Sector */
165   -#define ENV_CRC 0x8BF6F24B
  165 +/* #define ENV_CRC 0x8BF6F24B XXX - FIXME: gets defined automatically */
166 166  
167 167 #define CFG_MALLOC_LEN (512 << 10) /* Reserve 512 kB for malloc() */
168 168  
include/configs/o2dnt.h
Diff comments   View file @ f57f70a
... ... @@ -69,7 +69,7 @@
69 69 #define CFG_XLB_PIPELINING 1
70 70  
71 71 #define CONFIG_NET_MULTI 1
72   -#define CONFIG_EEPRO100 1
  72 +/* #define CONFIG_EEPRO100 XXX - FIXME: conflicts when CONFIG_MII is enabled */
73 73 #define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
74 74 #define CONFIG_NS8382X 1
75 75