sf: Adopt flash table INFO macro from Linux

INFO macro make flash table entries more adjustable like adding new flash_info attributes, update ID length bytes and so on and more over it will sync to Linux way of defining flash_info attributes. - Add JEDEC_ID - Add JEDEC_EXT macro - Add JEDEC_MFR - spi_flash_params => spi_flash_info - params => info Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Jagan Teki <jagan@openedev.com>

sf: Adopt flash table INFO macro from Linux
INFO macro make flash table entries more adjustable like adding new flash_info attributes, update ID length bytes and so on and more over it will sync to Linux way of defining flash_info attributes. - Add JEDEC_ID - Add JEDEC_EXT macro - Add JEDEC_MFR - spi_flash_params => spi_flash_info - params => info Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Jagan Teki <jagan@openedev.com>
Jagan Teki
1 parent ebfa18cb3d
Showing 5 changed files with 214 additions and 180 deletions Side-by-side Diff
drivers/mtd/spi/sandbox.c
drivers/mtd/spi/sf_internal.h
drivers/mtd/spi/sf_params.c
drivers/mtd/spi/spi_flash.c
include/linux/err.h
@@ -88,7 +88,7 @@
 	/* The current flash status (see STAT_XXX defines above) */
 	u16 status;
 	/* Data describing the flash we're emulating */
-	const struct spi_flash_params *data;
+	const struct spi_flash_info *data;
 	/* The file on disk to serv up data from */
 	int fd;
 };
@@ -112,7 +112,7 @@
 	struct sandbox_spi_flash *sbsf = dev_get_priv(dev);
 	const char *file;
 	size_t len, idname_len;
-	const struct spi_flash_params *data;
+	const struct spi_flash_info *data;
 	struct sandbox_spi_flash_plat_data *pdata = dev_get_platdata(dev);
 	struct sandbox_state *state = state_get_current();
 	struct udevice *bus = dev->parent;
@@ -168,7 +168,7 @@
 	}
 	debug("%s: device='%s'\n", __func__, spec);
  
-	for (data = spi_flash_params_table; data->name; data++) {
+	for (data = spi_flash_ids; data->name; data++) {
 		len = strlen(data->name);
 		if (idname_len != len)
 			continue;
@@ -359,7 +359,9 @@
 			debug(" id: off:%u tx:", sbsf->off);
 			if (sbsf->off < IDCODE_LEN) {
 				/* Extract correct byte from ID 0x00aabbcc */
-				id = sbsf->data->jedec >>
+				id = ((((sbsf->data)->id[0]) << 16) |
+					(((sbsf->data)->id[1]) << 8 |
+					((sbsf->data)->id[2]))) >>
 					(8 * (IDCODE_LEN - 1 - sbsf->off));
 			} else {
 				id = 0;
@@ -103,24 +103,36 @@
 #define CMD_SPANSION_RDAR	0x65 /* Read any device register */
 #define CMD_SPANSION_WRAR	0x71 /* Write any device register */
 #endif
+
+#define JEDEC_MFR(info)		((info)->id[0])
+#define JEDEC_ID(info)		(((info)->id[1]) << 8 | ((info)->id[2]))
+#define JEDEC_EXT(info)		(((info)->id[3]) << 8 | ((info)->id[4]))
+
 /**
- * struct spi_flash_params - SPI/QSPI flash device params structure
+ * struct spi_flash_info - SPI/QSPI flash device params structure
  *
  * @name:		Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
- * @jedec:		Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
- * @ext_jedec:		Device ext_jedec ID
  * @sector_size:	Isn't necessarily a sector size from vendor,
  *			the size listed here is what works with CMD_ERASE_64K
  * @nr_sectors:		No.of sectors on this device
  * @flags:		Important param, for flash specific behaviour
  */
-struct spi_flash_params {
+struct spi_flash_info {
 	const char *name;
-	u32 jedec;
-	u16 ext_jedec;
+
+	/*
+	 * This array stores the ID bytes.
+	 * The first three bytes are the JEDIC ID.
+	 * JEDEC ID zero means "no ID" (mostly older chips).
+	 */
+	u8		id[5];
+	u8		id_len;
+
 	u32 sector_size;
 	u32 nr_sectors;
  
+	u16 page_size;
+
 	u16 flags;
 #define SECT_4K			BIT(0)
 #define E_FSR			BIT(1)
@@ -133,7 +145,7 @@
 #define RD_FULL			(RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO)
 };
  
-extern const struct spi_flash_params spi_flash_params_table[];
+extern const struct spi_flash_info spi_flash_ids[];
  
 /* Send a single-byte command to the device and read the response */
 int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);
@@ -12,125 +12,140 @@
  
 #include "sf_internal.h"
  
+/* Used when the "_ext_id" is two bytes at most */
+#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags)	\
+		.id = {							\
+			((_jedec_id) >> 16) & 0xff,			\
+			((_jedec_id) >> 8) & 0xff,			\
+			(_jedec_id) & 0xff,				\
+			((_ext_id) >> 8) & 0xff,			\
+			(_ext_id) & 0xff,				\
+			},						\
+		.id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))),	\
+		.sector_size = (_sector_size),				\
+		.nr_sectors = (_n_sectors),				\
+		.page_size = 256,					\
+		.flags = (_flags),
+
 /* SPI/QSPI flash device params structure */
-const struct spi_flash_params spi_flash_params_table[] = {
+const struct spi_flash_info spi_flash_ids[] = {
 #ifdef CONFIG_SPI_FLASH_ATMEL		/* ATMEL */
-	{"AT45DB011D",	   0x1f2200, 0x0,	64 * 1024,     4, SECT_4K},
-	{"AT45DB021D",	   0x1f2300, 0x0,	64 * 1024,     8, SECT_4K},
-	{"AT45DB041D",	   0x1f2400, 0x0,	64 * 1024,     8, SECT_4K},
-	{"AT45DB081D",	   0x1f2500, 0x0,	64 * 1024,    16, SECT_4K},
-	{"AT45DB161D",	   0x1f2600, 0x0,	64 * 1024,    32, SECT_4K},
-	{"AT45DB321D",	   0x1f2700, 0x0,	64 * 1024,    64, SECT_4K},
-	{"AT45DB641D",	   0x1f2800, 0x0,	64 * 1024,   128, SECT_4K},
-	{"AT25DF321A",     0x1f4701, 0x0,	64 * 1024,    64, SECT_4K},
-	{"AT25DF321",      0x1f4700, 0x0,	64 * 1024,    64, SECT_4K},
-	{"AT26DF081A",     0x1f4501, 0x0,	64 * 1024,    16, SECT_4K},
+	{"AT45DB011D",	   INFO(0x1f2200, 0x0, 64 * 1024,     4, SECT_4K) },
+	{"AT45DB021D",	   INFO(0x1f2300, 0x0, 64 * 1024,     8, SECT_4K) },
+	{"AT45DB041D",	   INFO(0x1f2400, 0x0, 64 * 1024,     8, SECT_4K) },
+	{"AT45DB081D",	   INFO(0x1f2500, 0x0, 64 * 1024,    16, SECT_4K) },
+	{"AT45DB161D",	   INFO(0x1f2600, 0x0, 64 * 1024,    32, SECT_4K) },
+	{"AT45DB321D",	   INFO(0x1f2700, 0x0, 64 * 1024,    64, SECT_4K) },
+	{"AT45DB641D",	   INFO(0x1f2800, 0x0, 64 * 1024,   128, SECT_4K) },
+	{"AT25DF321A",     INFO(0x1f4701, 0x0, 64 * 1024,    64, SECT_4K) },
+	{"AT25DF321",      INFO(0x1f4700, 0x0, 64 * 1024,    64, SECT_4K) },
+	{"AT26DF081A",     INFO(0x1f4501, 0x0, 64 * 1024,    16, SECT_4K) },
 #endif
 #ifdef CONFIG_SPI_FLASH_EON		/* EON */
-	{"EN25Q32B",	   0x1c3016, 0x0,	64 * 1024,    64, 0},
-	{"EN25Q64",	   0x1c3017, 0x0,	64 * 1024,   128, SECT_4K},
-	{"EN25Q128B",	   0x1c3018, 0x0,       64 * 1024,   256, 0},
-	{"EN25S64",	   0x1c3817, 0x0,	64 * 1024,   128, 0},
+	{"EN25Q32B",	   INFO(0x1c3016, 0x0, 64 * 1024,    64, 0) },
+	{"EN25Q64",	   INFO(0x1c3017, 0x0, 64 * 1024,   128, SECT_4K) },
+	{"EN25Q128B",	   INFO(0x1c3018, 0x0, 64 * 1024,   256, 0) },
+	{"EN25S64",	   INFO(0x1c3817, 0x0, 64 * 1024,   128, 0) },
 #endif
 #ifdef CONFIG_SPI_FLASH_GIGADEVICE	/* GIGADEVICE */
-	{"GD25Q64B",	   0xc84017, 0x0,	64 * 1024,   128, SECT_4K},
-	{"GD25LQ32",	   0xc86016, 0x0,	64 * 1024,    64, SECT_4K},
+	{"GD25Q64B",	   INFO(0xc84017, 0x0, 64 * 1024,   128, SECT_4K) },
+	{"GD25LQ32",	   INFO(0xc86016, 0x0, 64 * 1024,    64, SECT_4K) },
 #endif
 #ifdef CONFIG_SPI_FLASH_ISSI		/* ISSI */
-	{"IS25LP032",	   0x9d6016, 0x0,	64 * 1024,    64, 0},
-	{"IS25LP064",	   0x9d6017, 0x0,	64 * 1024,   128, 0},
-	{"IS25LP128",	   0x9d6018, 0x0,	64 * 1024,   256, 0},
+	{"IS25LP032",	   INFO(0x9d6016, 0x0, 64 * 1024,    64, 0) },
+	{"IS25LP064",	   INFO(0x9d6017, 0x0, 64 * 1024,   128, 0) },
+	{"IS25LP128",	   INFO(0x9d6018, 0x0, 64 * 1024,   256, 0) },
 #endif
 #ifdef CONFIG_SPI_FLASH_MACRONIX	/* MACRONIX */
-	{"MX25L2006E",	   0xc22012, 0x0,	64 * 1024,     4, 0},
-	{"MX25L4005",	   0xc22013, 0x0,	64 * 1024,     8, 0},
-	{"MX25L8005",	   0xc22014, 0x0,	64 * 1024,    16, 0},
-	{"MX25L1605D",	   0xc22015, 0x0,	64 * 1024,    32, 0},
-	{"MX25L3205D",	   0xc22016, 0x0,	64 * 1024,    64, 0},
-	{"MX25L6405D",	   0xc22017, 0x0,	64 * 1024,   128, 0},
-	{"MX25L12805",	   0xc22018, 0x0,	64 * 1024,   256, RD_FULL | WR_QPP},
-	{"MX25L25635F",	   0xc22019, 0x0,	64 * 1024,   512, RD_FULL | WR_QPP},
-	{"MX25L51235F",	   0xc2201a, 0x0,	64 * 1024,  1024, RD_FULL | WR_QPP},
-	{"MX25L12855E",	   0xc22618, 0x0,	64 * 1024,   256, RD_FULL | WR_QPP},
+	{"MX25L2006E",	   INFO(0xc22012, 0x0, 64 * 1024,     4, 0) },
+	{"MX25L4005",	   INFO(0xc22013, 0x0, 64 * 1024,     8, 0) },
+	{"MX25L8005",	   INFO(0xc22014, 0x0, 64 * 1024,    16, 0) },
+	{"MX25L1605D",	   INFO(0xc22015, 0x0, 64 * 1024,    32, 0) },
+	{"MX25L3205D",	   INFO(0xc22016, 0x0, 64 * 1024,    64, 0) },
+	{"MX25L6405D",	   INFO(0xc22017, 0x0, 64 * 1024,   128, 0) },
+	{"MX25L12805",	   INFO(0xc22018, 0x0, 64 * 1024,   256, RD_FULL | WR_QPP) },
+	{"MX25L25635F",	   INFO(0xc22019, 0x0, 64 * 1024,   512, RD_FULL | WR_QPP) },
+	{"MX25L51235F",	   INFO(0xc2201a, 0x0, 64 * 1024,  1024, RD_FULL | WR_QPP) },
+	{"MX25L12855E",	   INFO(0xc22618, 0x0, 64 * 1024,   256, RD_FULL | WR_QPP) },
 #endif
 #ifdef CONFIG_SPI_FLASH_SPANSION	/* SPANSION */
-	{"S25FL008A",	   0x010213, 0x0,	64 * 1024,    16, 0},
-	{"S25FL016A",	   0x010214, 0x0,	64 * 1024,    32, 0},
-	{"S25FL032A",	   0x010215, 0x0,	64 * 1024,    64, 0},
-	{"S25FL064A",	   0x010216, 0x0,	64 * 1024,   128, 0},
-	{"S25FL116K",	   0x014015, 0x0,	64 * 1024,   128, 0},
-	{"S25FL164K",	   0x014017, 0x0140,	64 * 1024,   128, 0},
-	{"S25FL128P_256K", 0x012018, 0x0300,   256 * 1024,    64, RD_FULL | WR_QPP},
-	{"S25FL128P_64K",  0x012018, 0x0301,    64 * 1024,   256, RD_FULL | WR_QPP},
-	{"S25FL032P",	   0x010215, 0x4d00,    64 * 1024,    64, RD_FULL | WR_QPP},
-	{"S25FL064P",	   0x010216, 0x4d00,    64 * 1024,   128, RD_FULL | WR_QPP},
-	{"S25FL128S_256K", 0x012018, 0x4d00,   256 * 1024,    64, RD_FULL | WR_QPP},
-	{"S25FL128S_64K",  0x012018, 0x4d01,    64 * 1024,   256, RD_FULL | WR_QPP},
-	{"S25FL256S_256K", 0x010219, 0x4d00,   256 * 1024,   128, RD_FULL | WR_QPP},
-	{"S25FL256S_64K",  0x010219, 0x4d01,	64 * 1024,   512, RD_FULL | WR_QPP},
-	{"S25FS512S",      0x010220, 0x4D00,   128 * 1024,   512, RD_FULL | WR_QPP},
-	{"S25FL512S_256K", 0x010220, 0x4d00,   256 * 1024,   256, RD_FULL | WR_QPP},
-	{"S25FL512S_64K",  0x010220, 0x4d01,    64 * 1024,  1024, RD_FULL | WR_QPP},
-	{"S25FL512S_512K", 0x010220, 0x4f00,   256 * 1024,   256, RD_FULL | WR_QPP},
+	{"S25FL008A",	   INFO(0x010213, 0x0, 64 * 1024,    16, 0) },
+	{"S25FL016A",	   INFO(0x010214, 0x0, 64 * 1024,    32, 0) },
+	{"S25FL032A",	   INFO(0x010215, 0x0, 64 * 1024,    64, 0) },
+	{"S25FL064A",	   INFO(0x010216, 0x0, 64 * 1024,   128, 0) },
+	{"S25FL116K",	   INFO(0x014015, 0x0, 64 * 1024,   128, 0) },
+	{"S25FL164K",	   INFO(0x014017, 0x0140,  64 * 1024,   128, 0) },
+	{"S25FL128P_256K", INFO(0x012018, 0x0300, 256 * 1024,    64, RD_FULL | WR_QPP) },
+	{"S25FL128P_64K",  INFO(0x012018, 0x0301,  64 * 1024,   256, RD_FULL | WR_QPP) },
+	{"S25FL032P",	   INFO(0x010215, 0x4d00,  64 * 1024,    64, RD_FULL | WR_QPP) },
+	{"S25FL064P",	   INFO(0x010216, 0x4d00,  64 * 1024,   128, RD_FULL | WR_QPP) },
+	{"S25FL128S_256K", INFO(0x012018, 0x4d00, 256 * 1024,    64, RD_FULL | WR_QPP) },
+	{"S25FL128S_64K",  INFO(0x012018, 0x4d01,  64 * 1024,   256, RD_FULL | WR_QPP) },
+	{"S25FL256S_256K", INFO(0x010219, 0x4d00, 256 * 1024,   128, RD_FULL | WR_QPP) },
+	{"S25FL256S_64K",  INFO(0x010219, 0x4d01,  64 * 1024,   512, RD_FULL | WR_QPP) },
+	{"S25FS512S",      INFO(0x010220, 0x4D00, 128 * 1024,   512, RD_FULL | WR_QPP) },
+	{"S25FL512S_256K", INFO(0x010220, 0x4d00, 256 * 1024,   256, RD_FULL | WR_QPP) },
+	{"S25FL512S_64K",  INFO(0x010220, 0x4d01,  64 * 1024,  1024, RD_FULL | WR_QPP) },
+	{"S25FL512S_512K", INFO(0x010220, 0x4f00, 256 * 1024,   256, RD_FULL | WR_QPP) },
 #endif
 #ifdef CONFIG_SPI_FLASH_STMICRO		/* STMICRO */
-	{"M25P10",	   0x202011, 0x0,	32 * 1024,     4, 0},
-	{"M25P20",	   0x202012, 0x0,       64 * 1024,     4, 0},
-	{"M25P40",	   0x202013, 0x0,       64 * 1024,     8, 0},
-	{"M25P80",	   0x202014, 0x0,       64 * 1024,    16, 0},
-	{"M25P16",	   0x202015, 0x0,       64 * 1024,    32, 0},
-	{"M25PE16",	   0x208015, 0x1000,    64 * 1024,    32, 0},
-	{"M25PX16",	   0x207115, 0x1000,    64 * 1024,    32, RD_QUAD | RD_DUAL},
-	{"M25P32",	   0x202016, 0x0,       64 * 1024,    64, 0},
-	{"M25P64",	   0x202017, 0x0,       64 * 1024,   128, 0},
-	{"M25P128",	   0x202018, 0x0,      256 * 1024,    64, 0},
-	{"M25PX64",	   0x207117, 0x0,       64 * 1024,   128, SECT_4K},
-	{"N25Q016A",       0x20bb15, 0x0,	64 * 1024,    32, SECT_4K},
-	{"N25Q32",	   0x20ba16, 0x0,       64 * 1024,    64, RD_FULL | WR_QPP | SECT_4K},
-	{"N25Q32A",	   0x20bb16, 0x0,       64 * 1024,    64, RD_FULL | WR_QPP | SECT_4K},
-	{"N25Q64",	   0x20ba17, 0x0,       64 * 1024,   128, RD_FULL | WR_QPP | SECT_4K},
-	{"N25Q64A",	   0x20bb17, 0x0,       64 * 1024,   128, RD_FULL | WR_QPP | SECT_4K},
-	{"N25Q128",	   0x20ba18, 0x0,       64 * 1024,   256, RD_FULL | WR_QPP},
-	{"N25Q128A",	   0x20bb18, 0x0,       64 * 1024,   256, RD_FULL | WR_QPP},
-	{"N25Q256",	   0x20ba19, 0x0,       64 * 1024,   512, RD_FULL | WR_QPP | SECT_4K},
-	{"N25Q256A",	   0x20bb19, 0x0,       64 * 1024,   512, RD_FULL | WR_QPP | SECT_4K},
-	{"N25Q512",	   0x20ba20, 0x0,       64 * 1024,  1024, RD_FULL | WR_QPP | E_FSR | SECT_4K},
-	{"N25Q512A",	   0x20bb20, 0x0,       64 * 1024,  1024, RD_FULL | WR_QPP | E_FSR | SECT_4K},
-	{"N25Q1024",	   0x20ba21, 0x0,       64 * 1024,  2048, RD_FULL | WR_QPP | E_FSR | SECT_4K},
-	{"N25Q1024A",	   0x20bb21, 0x0,       64 * 1024,  2048, RD_FULL | WR_QPP | E_FSR | SECT_4K},
+	{"M25P10",	   INFO(0x202011, 0x0, 32 * 1024,     4, 0) },
+	{"M25P20",	   INFO(0x202012, 0x0, 64 * 1024,     4, 0) },
+	{"M25P40",	   INFO(0x202013, 0x0, 64 * 1024,     8, 0) },
+	{"M25P80",	   INFO(0x202014, 0x0, 64 * 1024,    16, 0) },
+	{"M25P16",	   INFO(0x202015, 0x0, 64 * 1024,    32, 0) },
+	{"M25PE16",	   INFO(0x208015, 0x1000, 64 * 1024, 32, 0) },
+	{"M25PX16",	   INFO(0x207115, 0x1000, 64 * 1024, 32, RD_QUAD | RD_DUAL) },
+	{"M25P32",	   INFO(0x202016, 0x0,  64 * 1024,    64, 0) },
+	{"M25P64",	   INFO(0x202017, 0x0,  64 * 1024,   128, 0) },
+	{"M25P128",	   INFO(0x202018, 0x0, 256 * 1024,    64, 0) },
+	{"M25PX64",	   INFO(0x207117, 0x0,  64 * 1024,   128, SECT_4K) },
+	{"N25Q016A",       INFO(0x20bb15, 0x0,	64 * 1024,    32, SECT_4K) },
+	{"N25Q32",	   INFO(0x20ba16, 0x0,  64 * 1024,    64, RD_FULL | WR_QPP | SECT_4K) },
+	{"N25Q32A",	   INFO(0x20bb16, 0x0,  64 * 1024,    64, RD_FULL | WR_QPP | SECT_4K) },
+	{"N25Q64",	   INFO(0x20ba17, 0x0,  64 * 1024,   128, RD_FULL | WR_QPP | SECT_4K) },
+	{"N25Q64A",	   INFO(0x20bb17, 0x0,  64 * 1024,   128, RD_FULL | WR_QPP | SECT_4K) },
+	{"N25Q128",	   INFO(0x20ba18, 0x0,  64 * 1024,   256, RD_FULL | WR_QPP) },
+	{"N25Q128A",	   INFO(0x20bb18, 0x0,  64 * 1024,   256, RD_FULL | WR_QPP) },
+	{"N25Q256",	   INFO(0x20ba19, 0x0,  64 * 1024,   512, RD_FULL | WR_QPP | SECT_4K) },
+	{"N25Q256A",	   INFO(0x20bb19, 0x0,  64 * 1024,   512, RD_FULL | WR_QPP | SECT_4K) },
+	{"N25Q512",	   INFO(0x20ba20, 0x0,  64 * 1024,  1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
+	{"N25Q512A",	   INFO(0x20bb20, 0x0,  64 * 1024,  1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
+	{"N25Q1024",	   INFO(0x20ba21, 0x0,  64 * 1024,  2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
+	{"N25Q1024A",	   INFO(0x20bb21, 0x0,  64 * 1024,  2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) },
 #endif
 #ifdef CONFIG_SPI_FLASH_SST		/* SST */
-	{"SST25VF040B",	   0xbf258d, 0x0,	64 * 1024,     8, SECT_4K | SST_WR},
-	{"SST25VF080B",	   0xbf258e, 0x0,	64 * 1024,    16, SECT_4K | SST_WR},
-	{"SST25VF016B",	   0xbf2541, 0x0,	64 * 1024,    32, SECT_4K | SST_WR},
-	{"SST25VF032B",	   0xbf254a, 0x0,	64 * 1024,    64, SECT_4K | SST_WR},
-	{"SST25VF064C",	   0xbf254b, 0x0,	64 * 1024,   128, SECT_4K},
-	{"SST25WF512",	   0xbf2501, 0x0,	64 * 1024,     1, SECT_4K | SST_WR},
-	{"SST25WF010",	   0xbf2502, 0x0,	64 * 1024,     2, SECT_4K | SST_WR},
-	{"SST25WF020",	   0xbf2503, 0x0,	64 * 1024,     4, SECT_4K | SST_WR},
-	{"SST25WF040",	   0xbf2504, 0x0,	64 * 1024,     8, SECT_4K | SST_WR},
-	{"SST25WF040B",	   0x621613, 0x0,	64 * 1024,     8, SECT_4K},
-	{"SST25WF080",	   0xbf2505, 0x0,	64 * 1024,    16, SECT_4K | SST_WR},
+	{"SST25VF040B",	   INFO(0xbf258d, 0x0,	64 * 1024,     8, SECT_4K | SST_WR) },
+	{"SST25VF080B",	   INFO(0xbf258e, 0x0,	64 * 1024,    16, SECT_4K | SST_WR) },
+	{"SST25VF016B",	   INFO(0xbf2541, 0x0,	64 * 1024,    32, SECT_4K | SST_WR) },
+	{"SST25VF032B",	   INFO(0xbf254a, 0x0,	64 * 1024,    64, SECT_4K | SST_WR) },
+	{"SST25VF064C",	   INFO(0xbf254b, 0x0,	64 * 1024,   128, SECT_4K) },
+	{"SST25WF512",	   INFO(0xbf2501, 0x0,	64 * 1024,     1, SECT_4K | SST_WR) },
+	{"SST25WF010",	   INFO(0xbf2502, 0x0,	64 * 1024,     2, SECT_4K | SST_WR) },
+	{"SST25WF020",	   INFO(0xbf2503, 0x0,	64 * 1024,     4, SECT_4K | SST_WR) },
+	{"SST25WF040",	   INFO(0xbf2504, 0x0,	64 * 1024,     8, SECT_4K | SST_WR) },
+	{"SST25WF040B",	   INFO(0x621613, 0x0,	64 * 1024,     8, SECT_4K) },
+	{"SST25WF080",	   INFO(0xbf2505, 0x0,	64 * 1024,    16, SECT_4K | SST_WR) },
 #endif
 #ifdef CONFIG_SPI_FLASH_WINBOND		/* WINBOND */
-	{"W25P80",	   0xef2014, 0x0,	64 * 1024,    16, 0},
-	{"W25P16",	   0xef2015, 0x0,	64 * 1024,    32, 0},
-	{"W25P32",	   0xef2016, 0x0,	64 * 1024,    64, 0},
-	{"W25X40",	   0xef3013, 0x0,	64 * 1024,     8, SECT_4K},
-	{"W25X16",	   0xef3015, 0x0,	64 * 1024,    32, SECT_4K},
-	{"W25X32",	   0xef3016, 0x0,	64 * 1024,    64, SECT_4K},
-	{"W25X64",	   0xef3017, 0x0,	64 * 1024,   128, SECT_4K},
-	{"W25Q80BL",	   0xef4014, 0x0,	64 * 1024,    16, RD_FULL | WR_QPP | SECT_4K},
-	{"W25Q16CL",	   0xef4015, 0x0,	64 * 1024,    32, RD_FULL | WR_QPP | SECT_4K},
-	{"W25Q32BV",	   0xef4016, 0x0,	64 * 1024,    64, RD_FULL | WR_QPP | SECT_4K},
-	{"W25Q64CV",	   0xef4017, 0x0,	64 * 1024,   128, RD_FULL | WR_QPP | SECT_4K},
-	{"W25Q128BV",	   0xef4018, 0x0,	64 * 1024,   256, RD_FULL | WR_QPP | SECT_4K},
-	{"W25Q256",	   0xef4019, 0x0,	64 * 1024,   512, RD_FULL | WR_QPP | SECT_4K},
-	{"W25Q80BW",	   0xef5014, 0x0,	64 * 1024,    16, RD_FULL | WR_QPP | SECT_4K},
-	{"W25Q16DW",	   0xef6015, 0x0,	64 * 1024,    32, RD_FULL | WR_QPP | SECT_4K},
-	{"W25Q32DW",	   0xef6016, 0x0,	64 * 1024,    64, RD_FULL | WR_QPP | SECT_4K},
-	{"W25Q64DW",	   0xef6017, 0x0,	64 * 1024,   128, RD_FULL | WR_QPP | SECT_4K},
-	{"W25Q128FW",	   0xef6018, 0x0,	64 * 1024,   256, RD_FULL | WR_QPP | SECT_4K},
+	{"W25P80",	   INFO(0xef2014, 0x0,	64 * 1024,    16, 0) },
+	{"W25P16",	   INFO(0xef2015, 0x0,	64 * 1024,    32, 0) },
+	{"W25P32",	   INFO(0xef2016, 0x0,	64 * 1024,    64, 0) },
+	{"W25X40",	   INFO(0xef3013, 0x0,	64 * 1024,     8, SECT_4K) },
+	{"W25X16",	   INFO(0xef3015, 0x0,	64 * 1024,    32, SECT_4K) },
+	{"W25X32",	   INFO(0xef3016, 0x0,	64 * 1024,    64, SECT_4K) },
+	{"W25X64",	   INFO(0xef3017, 0x0,	64 * 1024,   128, SECT_4K) },
+	{"W25Q80BL",	   INFO(0xef4014, 0x0,	64 * 1024,    16, RD_FULL | WR_QPP | SECT_4K) },
+	{"W25Q16CL",	   INFO(0xef4015, 0x0,	64 * 1024,    32, RD_FULL | WR_QPP | SECT_4K) },
+	{"W25Q32BV",	   INFO(0xef4016, 0x0,	64 * 1024,    64, RD_FULL | WR_QPP | SECT_4K) },
+	{"W25Q64CV",	   INFO(0xef4017, 0x0,	64 * 1024,   128, RD_FULL | WR_QPP | SECT_4K) },
+	{"W25Q128BV",	   INFO(0xef4018, 0x0,	64 * 1024,   256, RD_FULL | WR_QPP | SECT_4K) },
+	{"W25Q256",	   INFO(0xef4019, 0x0,	64 * 1024,   512, RD_FULL | WR_QPP | SECT_4K) },
+	{"W25Q80BW",	   INFO(0xef5014, 0x0,	64 * 1024,    16, RD_FULL | WR_QPP | SECT_4K) },
+	{"W25Q16DW",	   INFO(0xef6015, 0x0,	64 * 1024,    32, RD_FULL | WR_QPP | SECT_4K) },
+	{"W25Q32DW",	   INFO(0xef6016, 0x0,	64 * 1024,    64, RD_FULL | WR_QPP | SECT_4K) },
+	{"W25Q64DW",	   INFO(0xef6017, 0x0,	64 * 1024,   128, RD_FULL | WR_QPP | SECT_4K) },
+	{"W25Q128FW",	   INFO(0xef6018, 0x0,	64 * 1024,   256, RD_FULL | WR_QPP | SECT_4K) },
 #endif
 	{},	/* Empty entry to terminate the list */
 	/*
@@ -165,7 +165,8 @@
 	return flash->bank_curr;
 }
  
-static int spi_flash_read_bar(struct spi_flash *flash, u8 idcode0)
+static int spi_flash_read_bar(struct spi_flash *flash,
+			      const struct spi_flash_info *info)
 {
 	u8 curr_bank = 0;
 	int ret;
@@ -173,7 +174,7 @@
 	if (flash->size <= SPI_FLASH_16MB_BOUN)
 		goto bar_end;
  
-	switch (idcode0) {
+	switch (JEDEC_MFR(info)) {
 	case SPI_FLASH_CFI_MFR_SPANSION:
 		flash->bank_read_cmd = CMD_BANKADDR_BRRD;
 		flash->bank_write_cmd = CMD_BANKADDR_BRWR;
  
@@ -924,9 +925,35 @@
 }
 #endif
  
-static int set_quad_mode(struct spi_flash *flash, u8 idcode0)
+static const struct spi_flash_info *spi_flash_read_id(struct spi_flash *flash)
 {
-	switch (idcode0) {
+	int				tmp;
+	u8				id[5];
+	const struct spi_flash_info	*info;
+
+	tmp = spi_flash_cmd(flash->spi, CMD_READ_ID, id, 5);
+	if (tmp < 0) {
+		printf("SF: error %d reading JEDEC ID\n", tmp);
+		return ERR_PTR(tmp);
+	}
+
+	info = spi_flash_ids;
+	for (; info->name != NULL; info++) {
+		if (info->id_len) {
+			if (!memcmp(info->id, id, info->id_len))
+				return info;
+		}
+	}
+
+	printf("SF: unrecognized JEDEC id bytes: %02x, %02x, %02x\n",
+	       id[0], id[1], id[2]);
+	return ERR_PTR(-ENODEV);
+}
+
+static int set_quad_mode(struct spi_flash *flash,
+			 const struct spi_flash_info *info)
+{
+	switch (JEDEC_MFR(info)) {
 #ifdef CONFIG_SPI_FLASH_MACRONIX
 	case SPI_FLASH_CFI_MFR_MACRONIX:
 		return macronix_quad_enable(flash);
@@ -941,7 +968,8 @@
 		return micron_quad_enable(flash);
 #endif
 	default:
-		printf("SF: Need set QEB func for %02x flash\n", idcode0);
+		printf("SF: Need set QEB func for %02x flash\n",
+		       JEDEC_MFR(info));
 		return -1;
 	}
 }
  
  
@@ -1011,46 +1039,13 @@
 int spi_flash_scan(struct spi_flash *flash)
 {
 	struct spi_slave *spi = flash->spi;
-	const struct spi_flash_params *params;
-	u16 jedec, ext_jedec;
-	u8 idcode[5];
-	int ret;
+	const struct spi_flash_info *info = NULL;
+	int ret = -1;
  
-	/* Read the ID codes */
-	ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
-	if (ret) {
-		printf("SF: Failed to get idcodes\n");
-		return ret;
-	}
+	info = spi_flash_read_id(flash);
+	if (IS_ERR_OR_NULL(info))
+		return -ENOENT;
  
-#ifdef DEBUG
-	printf("SF: Got idcodes\n");
-	print_buffer(0, idcode, 1, sizeof(idcode), 0);
-#endif
-
-	jedec = idcode[1] << 8 | idcode[2];
-	ext_jedec = idcode[3] << 8 | idcode[4];
-
-	/* Validate params from spi_flash_params table */
-	params = spi_flash_params_table;
-	for (; params->name != NULL; params++) {
-		if ((params->jedec >> 16) == idcode[0]) {
-			if ((params->jedec & 0xFFFF) == jedec) {
-				if (params->ext_jedec == 0)
-					break;
-				else if (params->ext_jedec == ext_jedec)
-					break;
-			}
-		}
-	}
-
-	if (!params->name) {
-		printf("SF: Unsupported flash IDs: ");
-		printf("manuf %02x, jedec %04x, ext_jedec %04x\n",
-		       idcode[0], jedec, ext_jedec);
-		return -EPROTONOSUPPORT;
-	}
-
 #ifdef CONFIG_SPI_FLASH_SPANSION
 	/*
 	 * The S25FS-S family physical sectors may be configured as a
  
  
@@ -1065,11 +1060,17 @@
 	 * sector that is not overlaid by the parameter sectors.
 	 * The uniform sector erase command has no effect on parameter sectors.
 	 */
-	if ((jedec == 0x0219 || (jedec == 0x0220)) &&
-	    (ext_jedec & 0xff00) == 0x4d00) {
+	if ((JEDEC_ID(info) == 0x0219 || (JEDEC_ID(info) == 0x0220)) &&
+	    (JEDEC_EXT(info) & 0xff00) == 0x4d00) {
 		int ret;
+		u8 idcode[5];
 		u8 id[6];
  
+		/* Read the ID codes again, 5 bytes */
+		ret = spi_flash_cmd(flash->spi, CMD_READ_ID, idcode, sizeof(idcode));
+		if (ret)
+			return -EIO;
+
 		/* Read the ID codes again, 6 bytes */
 		ret = spi_flash_cmd(flash->spi, CMD_READ_ID, id, sizeof(id));
 		if (ret)
  
  
@@ -1088,18 +1089,18 @@
 	}
 #endif
 	/* Flash powers up read-only, so clear BP# bits */
-	if (idcode[0] == SPI_FLASH_CFI_MFR_ATMEL ||
-	    idcode[0] == SPI_FLASH_CFI_MFR_MACRONIX ||
-	    idcode[0] == SPI_FLASH_CFI_MFR_SST)
+	if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_ATMEL ||
+	    JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX ||
+	    JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST)
 		write_sr(flash, 0);
  
 	/* Assign spi data */
-	flash->name = params->name;
+	flash->name = info->name;
 	flash->memory_map = spi->memory_map;
 	flash->dual_flash = spi->option;
  
 	/* Assign spi flash flags */
-	if (params->flags & SST_WR)
+	if (info->flags & SST_WR)
 		flash->flags |= SNOR_F_SST_WR;
  
 	/* Assign spi_flash ops */
@@ -1118,7 +1119,7 @@
 #endif
  
 	/* lock hooks are flash specific - assign them based on idcode0 */
-	switch (idcode[0]) {
+	switch (JEDEC_MFR(info)) {
 #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
 	case SPI_FLASH_CFI_MFR_STMICRO:
 	case SPI_FLASH_CFI_MFR_SST:
  
  
  
  
@@ -1128,28 +1129,26 @@
 #endif
 		break;
 	default:
-		debug("SF: Lock ops not supported for %02x flash\n", idcode[0]);
+		debug("SF: Lock ops not supported for %02x flash\n", JEDEC_MFR(info));
 	}
  
 	/* Compute the flash size */
 	flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0;
+	flash->page_size = info->page_size;
 	/*
 	 * The Spansion S25FL032P and S25FL064P have 256b pages, yet use the
 	 * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with
 	 * the 0x4d00 Extended JEDEC code have 512b pages. All of the others
 	 * have 256b pages.
 	 */
-	if (ext_jedec == 0x4d00) {
-		if ((jedec == 0x0215) || (jedec == 0x216) || (jedec == 0x220))
-			flash->page_size = 256;
-		else
+	if (JEDEC_EXT(info) == 0x4d00) {
+		if ((JEDEC_ID(info) != 0x0215) &&
+		    (JEDEC_ID(info) != 0x0216))
 			flash->page_size = 512;
-	} else {
-		flash->page_size = 256;
 	}
 	flash->page_size <<= flash->shift;
-	flash->sector_size = params->sector_size << flash->shift;
-	flash->size = flash->sector_size * params->nr_sectors << flash->shift;
+	flash->sector_size = info->sector_size << flash->shift;
+	flash->size = flash->sector_size * info->nr_sectors << flash->shift;
 #ifdef CONFIG_SF_DUAL_FLASH
 	if (flash->dual_flash & SF_DUAL_STACKED_FLASH)
 		flash->size <<= 1;
@@ -1157,7 +1156,7 @@
  
 #ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS
 	/* Compute erase sector and command */
-	if (params->flags & SECT_4K) {
+	if (info->flags & SECT_4K) {
 		flash->erase_cmd = CMD_ERASE_4K;
 		flash->erase_size = 4096 << flash->shift;
 	} else
  
  
@@ -1174,13 +1173,13 @@
 	flash->read_cmd = CMD_READ_ARRAY_FAST;
 	if (spi->mode & SPI_RX_SLOW)
 		flash->read_cmd = CMD_READ_ARRAY_SLOW;
-	else if (spi->mode & SPI_RX_QUAD && params->flags & RD_QUAD)
+	else if (spi->mode & SPI_RX_QUAD && info->flags & RD_QUAD)
 		flash->read_cmd = CMD_READ_QUAD_OUTPUT_FAST;
-	else if (spi->mode & SPI_RX_DUAL && params->flags & RD_DUAL)
+	else if (spi->mode & SPI_RX_DUAL && info->flags & RD_DUAL)
 		flash->read_cmd = CMD_READ_DUAL_OUTPUT_FAST;
  
 	/* Look for write commands */
-	if (params->flags & WR_QPP && spi->mode & SPI_TX_QUAD)
+	if (info->flags & WR_QPP && spi->mode & SPI_TX_QUAD)
 		flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
 	else
 		/* Go for default supported write cmd */
  
@@ -1190,9 +1189,10 @@
 	if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) ||
 	    (flash->read_cmd == CMD_READ_QUAD_IO_FAST) ||
 	    (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) {
-		ret = set_quad_mode(flash, idcode[0]);
+		ret = set_quad_mode(flash, info);
 		if (ret) {
-			debug("SF: Fail to set QEB for %02x\n", idcode[0]);
+			debug("SF: Fail to set QEB for %02x\n",
+			      JEDEC_MFR(info));
 			return -EINVAL;
 		}
 	}
  
@@ -1217,13 +1217,13 @@
 	}
  
 #ifdef CONFIG_SPI_FLASH_STMICRO
-	if (params->flags & E_FSR)
+	if (info->flags & E_FSR)
 		flash->flags |= SNOR_F_USE_FSR;
 #endif
  
 	/* Configure the BAR - discover bank cmds and read current bank */
 #ifdef CONFIG_SPI_FLASH_BAR
-	ret = spi_flash_read_bar(flash, idcode[0]);
+	ret = spi_flash_read_bar(flash, info);
 	if (ret < 0)
 		return ret;
 #endif
@@ -36,6 +36,11 @@
 	return IS_ERR_VALUE((unsigned long)ptr);
 }
  
+static inline bool IS_ERR_OR_NULL(const void *ptr)
+{
+	return !ptr || IS_ERR_VALUE((unsigned long)ptr);
+}
+
 /**
  * ERR_CAST - Explicitly cast an error-valued pointer to another pointer type
  * @ptr: The pointer to cast.
...	...	@@ -88,7 +88,7 @@
88	88	/* The current flash status (see STAT_XXX defines above) */
89	89	u16 status;
90	90	/* Data describing the flash we're emulating */
91		- const struct spi_flash_params *data;
	91	+ const struct spi_flash_info *data;
92	92	/* The file on disk to serv up data from */
93	93	int fd;
94	94	};
...	...	@@ -112,7 +112,7 @@
112	112	struct sandbox_spi_flash *sbsf = dev_get_priv(dev);
113	113	const char *file;
114	114	size_t len, idname_len;
115		- const struct spi_flash_params *data;
	115	+ const struct spi_flash_info *data;
116	116	struct sandbox_spi_flash_plat_data *pdata = dev_get_platdata(dev);
117	117	struct sandbox_state *state = state_get_current();
118	118	struct udevice *bus = dev->parent;
...	...	@@ -168,7 +168,7 @@
168	168	}
169	169	debug("%s: device='%s'\n", __func__, spec);
170	170
171		- for (data = spi_flash_params_table; data->name; data++) {
	171	+ for (data = spi_flash_ids; data->name; data++) {
172	172	len = strlen(data->name);
173	173	if (idname_len != len)
174	174	continue;
...	...	@@ -359,7 +359,9 @@
359	359	debug(" id: off:%u tx:", sbsf->off);
360	360	if (sbsf->off < IDCODE_LEN) {
361	361	/* Extract correct byte from ID 0x00aabbcc */
362		- id = sbsf->data->jedec >>
	362	+ id = ((((sbsf->data)->id[0]) << 16) \|
	363	+ (((sbsf->data)->id[1]) << 8 \|
	364	+ ((sbsf->data)->id[2]))) >>
363	365	(8 * (IDCODE_LEN - 1 - sbsf->off));
364	366	} else {
365	367	id = 0;
...	...	@@ -103,24 +103,36 @@
103	103	#define CMD_SPANSION_RDAR 0x65 /* Read any device register */
104	104	#define CMD_SPANSION_WRAR 0x71 /* Write any device register */
105	105	#endif
	106	+
	107	+#define JEDEC_MFR(info) ((info)->id[0])
	108	+#define JEDEC_ID(info) (((info)->id[1]) << 8 \| ((info)->id[2]))
	109	+#define JEDEC_EXT(info) (((info)->id[3]) << 8 \| ((info)->id[4]))
	110	+
106	111	/**
107		- * struct spi_flash_params - SPI/QSPI flash device params structure
	112	+ * struct spi_flash_info - SPI/QSPI flash device params structure
108	113	*
109	114	* @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
110		- * @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
111		- * @ext_jedec: Device ext_jedec ID
112	115	* @sector_size: Isn't necessarily a sector size from vendor,
113	116	* the size listed here is what works with CMD_ERASE_64K
114	117	* @nr_sectors: No.of sectors on this device
115	118	* @flags: Important param, for flash specific behaviour
116	119	*/
117		-struct spi_flash_params {
	120	+struct spi_flash_info {
118	121	const char *name;
119		- u32 jedec;
120		- u16 ext_jedec;
	122	+
	123	+ /*
	124	+ * This array stores the ID bytes.
	125	+ * The first three bytes are the JEDIC ID.
	126	+ * JEDEC ID zero means "no ID" (mostly older chips).
	127	+ */
	128	+ u8 id[5];
	129	+ u8 id_len;
	130	+
121	131	u32 sector_size;
122	132	u32 nr_sectors;
123	133
	134	+ u16 page_size;
	135	+
124	136	u16 flags;
125	137	#define SECT_4K BIT(0)
126	138	#define E_FSR BIT(1)
...	...	@@ -133,7 +145,7 @@
133	145	#define RD_FULL (RD_QUAD \| RD_DUAL \| RD_QUADIO \| RD_DUALIO)
134	146	};
135	147
136		-extern const struct spi_flash_params spi_flash_params_table[];
	148	+extern const struct spi_flash_info spi_flash_ids[];
137	149
138	150	/* Send a single-byte command to the device and read the response */
139	151	int spi_flash_cmd(struct spi_slave spi, u8 cmd, void response, size_t len);
...	...	@@ -12,125 +12,140 @@
12	12
13	13	#include "sf_internal.h"
14	14
	15	+/* Used when the "_ext_id" is two bytes at most */
	16	+#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
	17	+ .id = { \
	18	+ ((_jedec_id) >> 16) & 0xff, \
	19	+ ((_jedec_id) >> 8) & 0xff, \
	20	+ (_jedec_id) & 0xff, \
	21	+ ((_ext_id) >> 8) & 0xff, \
	22	+ (_ext_id) & 0xff, \
	23	+ }, \
	24	+ .id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))), \
	25	+ .sector_size = (_sector_size), \
	26	+ .nr_sectors = (_n_sectors), \
	27	+ .page_size = 256, \
	28	+ .flags = (_flags),
	29	+
15	30	/* SPI/QSPI flash device params structure */
16		-const struct spi_flash_params spi_flash_params_table[] = {
	31	+const struct spi_flash_info spi_flash_ids[] = {
17	32	#ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
18		- {"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, SECT_4K},
19		- {"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, SECT_4K},
20		- {"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, SECT_4K},
21		- {"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, SECT_4K},
22		- {"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, SECT_4K},
23		- {"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, SECT_4K},
24		- {"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, SECT_4K},
25		- {"AT25DF321A", 0x1f4701, 0x0, 64 * 1024, 64, SECT_4K},
26		- {"AT25DF321", 0x1f4700, 0x0, 64 * 1024, 64, SECT_4K},
27		- {"AT26DF081A", 0x1f4501, 0x0, 64 * 1024, 16, SECT_4K},
	33	+ {"AT45DB011D", INFO(0x1f2200, 0x0, 64 * 1024, 4, SECT_4K) },
	34	+ {"AT45DB021D", INFO(0x1f2300, 0x0, 64 * 1024, 8, SECT_4K) },
	35	+ {"AT45DB041D", INFO(0x1f2400, 0x0, 64 * 1024, 8, SECT_4K) },
	36	+ {"AT45DB081D", INFO(0x1f2500, 0x0, 64 * 1024, 16, SECT_4K) },
	37	+ {"AT45DB161D", INFO(0x1f2600, 0x0, 64 * 1024, 32, SECT_4K) },
	38	+ {"AT45DB321D", INFO(0x1f2700, 0x0, 64 * 1024, 64, SECT_4K) },
	39	+ {"AT45DB641D", INFO(0x1f2800, 0x0, 64 * 1024, 128, SECT_4K) },
	40	+ {"AT25DF321A", INFO(0x1f4701, 0x0, 64 * 1024, 64, SECT_4K) },
	41	+ {"AT25DF321", INFO(0x1f4700, 0x0, 64 * 1024, 64, SECT_4K) },
	42	+ {"AT26DF081A", INFO(0x1f4501, 0x0, 64 * 1024, 16, SECT_4K) },
28	43	#endif
29	44	#ifdef CONFIG_SPI_FLASH_EON /* EON */
30		- {"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, 0},
31		- {"EN25Q64", 0x1c3017, 0x0, 64 * 1024, 128, SECT_4K},
32		- {"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, 0},
33		- {"EN25S64", 0x1c3817, 0x0, 64 * 1024, 128, 0},
	45	+ {"EN25Q32B", INFO(0x1c3016, 0x0, 64 * 1024, 64, 0) },
	46	+ {"EN25Q64", INFO(0x1c3017, 0x0, 64 * 1024, 128, SECT_4K) },
	47	+ {"EN25Q128B", INFO(0x1c3018, 0x0, 64 * 1024, 256, 0) },
	48	+ {"EN25S64", INFO(0x1c3817, 0x0, 64 * 1024, 128, 0) },
34	49	#endif
35	50	#ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
36		- {"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, SECT_4K},
37		- {"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, SECT_4K},
	51	+ {"GD25Q64B", INFO(0xc84017, 0x0, 64 * 1024, 128, SECT_4K) },
	52	+ {"GD25LQ32", INFO(0xc86016, 0x0, 64 * 1024, 64, SECT_4K) },
38	53	#endif
39	54	#ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */
40		- {"IS25LP032", 0x9d6016, 0x0, 64 * 1024, 64, 0},
41		- {"IS25LP064", 0x9d6017, 0x0, 64 * 1024, 128, 0},
42		- {"IS25LP128", 0x9d6018, 0x0, 64 * 1024, 256, 0},
	55	+ {"IS25LP032", INFO(0x9d6016, 0x0, 64 * 1024, 64, 0) },
	56	+ {"IS25LP064", INFO(0x9d6017, 0x0, 64 * 1024, 128, 0) },
	57	+ {"IS25LP128", INFO(0x9d6018, 0x0, 64 * 1024, 256, 0) },
43	58	#endif
44	59	#ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
45		- {"MX25L2006E", 0xc22012, 0x0, 64 * 1024, 4, 0},
46		- {"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, 0},
47		- {"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, 0},
48		- {"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, 0},
49		- {"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, 0},
50		- {"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, 0},
51		- {"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256, RD_FULL \| WR_QPP},
52		- {"MX25L25635F", 0xc22019, 0x0, 64 * 1024, 512, RD_FULL \| WR_QPP},
53		- {"MX25L51235F", 0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL \| WR_QPP},
54		- {"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256, RD_FULL \| WR_QPP},
	60	+ {"MX25L2006E", INFO(0xc22012, 0x0, 64 * 1024, 4, 0) },
	61	+ {"MX25L4005", INFO(0xc22013, 0x0, 64 * 1024, 8, 0) },
	62	+ {"MX25L8005", INFO(0xc22014, 0x0, 64 * 1024, 16, 0) },
	63	+ {"MX25L1605D", INFO(0xc22015, 0x0, 64 * 1024, 32, 0) },
	64	+ {"MX25L3205D", INFO(0xc22016, 0x0, 64 * 1024, 64, 0) },
	65	+ {"MX25L6405D", INFO(0xc22017, 0x0, 64 * 1024, 128, 0) },
	66	+ {"MX25L12805", INFO(0xc22018, 0x0, 64 * 1024, 256, RD_FULL \| WR_QPP) },
	67	+ {"MX25L25635F", INFO(0xc22019, 0x0, 64 * 1024, 512, RD_FULL \| WR_QPP) },
	68	+ {"MX25L51235F", INFO(0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL \| WR_QPP) },
	69	+ {"MX25L12855E", INFO(0xc22618, 0x0, 64 * 1024, 256, RD_FULL \| WR_QPP) },
55	70	#endif
56	71	#ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
57		- {"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, 0},
58		- {"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, 0},
59		- {"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, 0},
60		- {"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, 0},
61		- {"S25FL116K", 0x014015, 0x0, 64 * 1024, 128, 0},
62		- {"S25FL164K", 0x014017, 0x0140, 64 * 1024, 128, 0},
63		- {"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, RD_FULL \| WR_QPP},
64		- {"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, RD_FULL \| WR_QPP},
65		- {"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, RD_FULL \| WR_QPP},
66		- {"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, RD_FULL \| WR_QPP},
67		- {"S25FL128S_256K", 0x012018, 0x4d00, 256 * 1024, 64, RD_FULL \| WR_QPP},
68		- {"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, RD_FULL \| WR_QPP},
69		- {"S25FL256S_256K", 0x010219, 0x4d00, 256 * 1024, 128, RD_FULL \| WR_QPP},
70		- {"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, RD_FULL \| WR_QPP},
71		- {"S25FS512S", 0x010220, 0x4D00, 128 * 1024, 512, RD_FULL \| WR_QPP},
72		- {"S25FL512S_256K", 0x010220, 0x4d00, 256 * 1024, 256, RD_FULL \| WR_QPP},
73		- {"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL \| WR_QPP},
74		- {"S25FL512S_512K", 0x010220, 0x4f00, 256 * 1024, 256, RD_FULL \| WR_QPP},
	72	+ {"S25FL008A", INFO(0x010213, 0x0, 64 * 1024, 16, 0) },
	73	+ {"S25FL016A", INFO(0x010214, 0x0, 64 * 1024, 32, 0) },
	74	+ {"S25FL032A", INFO(0x010215, 0x0, 64 * 1024, 64, 0) },
	75	+ {"S25FL064A", INFO(0x010216, 0x0, 64 * 1024, 128, 0) },
	76	+ {"S25FL116K", INFO(0x014015, 0x0, 64 * 1024, 128, 0) },
	77	+ {"S25FL164K", INFO(0x014017, 0x0140, 64 * 1024, 128, 0) },
	78	+ {"S25FL128P_256K", INFO(0x012018, 0x0300, 256 * 1024, 64, RD_FULL \| WR_QPP) },
	79	+ {"S25FL128P_64K", INFO(0x012018, 0x0301, 64 * 1024, 256, RD_FULL \| WR_QPP) },
	80	+ {"S25FL032P", INFO(0x010215, 0x4d00, 64 * 1024, 64, RD_FULL \| WR_QPP) },
	81	+ {"S25FL064P", INFO(0x010216, 0x4d00, 64 * 1024, 128, RD_FULL \| WR_QPP) },
	82	+ {"S25FL128S_256K", INFO(0x012018, 0x4d00, 256 * 1024, 64, RD_FULL \| WR_QPP) },
	83	+ {"S25FL128S_64K", INFO(0x012018, 0x4d01, 64 * 1024, 256, RD_FULL \| WR_QPP) },
	84	+ {"S25FL256S_256K", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL \| WR_QPP) },
	85	+ {"S25FL256S_64K", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL \| WR_QPP) },
	86	+ {"S25FS512S", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL \| WR_QPP) },
	87	+ {"S25FL512S_256K", INFO(0x010220, 0x4d00, 256 * 1024, 256, RD_FULL \| WR_QPP) },
	88	+ {"S25FL512S_64K", INFO(0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL \| WR_QPP) },
	89	+ {"S25FL512S_512K", INFO(0x010220, 0x4f00, 256 * 1024, 256, RD_FULL \| WR_QPP) },
75	90	#endif
76	91	#ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */
77		- {"M25P10", 0x202011, 0x0, 32 * 1024, 4, 0},
78		- {"M25P20", 0x202012, 0x0, 64 * 1024, 4, 0},
79		- {"M25P40", 0x202013, 0x0, 64 * 1024, 8, 0},
80		- {"M25P80", 0x202014, 0x0, 64 * 1024, 16, 0},
81		- {"M25P16", 0x202015, 0x0, 64 * 1024, 32, 0},
82		- {"M25PE16", 0x208015, 0x1000, 64 * 1024, 32, 0},
83		- {"M25PX16", 0x207115, 0x1000, 64 * 1024, 32, RD_QUAD \| RD_DUAL},
84		- {"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0},
85		- {"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0},
86		- {"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0},
87		- {"M25PX64", 0x207117, 0x0, 64 * 1024, 128, SECT_4K},
88		- {"N25Q016A", 0x20bb15, 0x0, 64 * 1024, 32, SECT_4K},
89		- {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, RD_FULL \| WR_QPP \| SECT_4K},
90		- {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, RD_FULL \| WR_QPP \| SECT_4K},
91		- {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, RD_FULL \| WR_QPP \| SECT_4K},
92		- {"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, RD_FULL \| WR_QPP \| SECT_4K},
93		- {"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, RD_FULL \| WR_QPP},
94		- {"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, RD_FULL \| WR_QPP},
95		- {"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, RD_FULL \| WR_QPP \| SECT_4K},
96		- {"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, RD_FULL \| WR_QPP \| SECT_4K},
97		- {"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL \| WR_QPP \| E_FSR \| SECT_4K},
98		- {"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL \| WR_QPP \| E_FSR \| SECT_4K},
99		- {"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL \| WR_QPP \| E_FSR \| SECT_4K},
100		- {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL \| WR_QPP \| E_FSR \| SECT_4K},
	92	+ {"M25P10", INFO(0x202011, 0x0, 32 * 1024, 4, 0) },
	93	+ {"M25P20", INFO(0x202012, 0x0, 64 * 1024, 4, 0) },
	94	+ {"M25P40", INFO(0x202013, 0x0, 64 * 1024, 8, 0) },
	95	+ {"M25P80", INFO(0x202014, 0x0, 64 * 1024, 16, 0) },
	96	+ {"M25P16", INFO(0x202015, 0x0, 64 * 1024, 32, 0) },
	97	+ {"M25PE16", INFO(0x208015, 0x1000, 64 * 1024, 32, 0) },
	98	+ {"M25PX16", INFO(0x207115, 0x1000, 64 * 1024, 32, RD_QUAD \| RD_DUAL) },
	99	+ {"M25P32", INFO(0x202016, 0x0, 64 * 1024, 64, 0) },
	100	+ {"M25P64", INFO(0x202017, 0x0, 64 * 1024, 128, 0) },
	101	+ {"M25P128", INFO(0x202018, 0x0, 256 * 1024, 64, 0) },
	102	+ {"M25PX64", INFO(0x207117, 0x0, 64 * 1024, 128, SECT_4K) },
	103	+ {"N25Q016A", INFO(0x20bb15, 0x0, 64 * 1024, 32, SECT_4K) },
	104	+ {"N25Q32", INFO(0x20ba16, 0x0, 64 * 1024, 64, RD_FULL \| WR_QPP \| SECT_4K) },
	105	+ {"N25Q32A", INFO(0x20bb16, 0x0, 64 * 1024, 64, RD_FULL \| WR_QPP \| SECT_4K) },
	106	+ {"N25Q64", INFO(0x20ba17, 0x0, 64 * 1024, 128, RD_FULL \| WR_QPP \| SECT_4K) },
	107	+ {"N25Q64A", INFO(0x20bb17, 0x0, 64 * 1024, 128, RD_FULL \| WR_QPP \| SECT_4K) },
	108	+ {"N25Q128", INFO(0x20ba18, 0x0, 64 * 1024, 256, RD_FULL \| WR_QPP) },
	109	+ {"N25Q128A", INFO(0x20bb18, 0x0, 64 * 1024, 256, RD_FULL \| WR_QPP) },
	110	+ {"N25Q256", INFO(0x20ba19, 0x0, 64 * 1024, 512, RD_FULL \| WR_QPP \| SECT_4K) },
	111	+ {"N25Q256A", INFO(0x20bb19, 0x0, 64 * 1024, 512, RD_FULL \| WR_QPP \| SECT_4K) },
	112	+ {"N25Q512", INFO(0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL \| WR_QPP \| E_FSR \| SECT_4K) },
	113	+ {"N25Q512A", INFO(0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL \| WR_QPP \| E_FSR \| SECT_4K) },
	114	+ {"N25Q1024", INFO(0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL \| WR_QPP \| E_FSR \| SECT_4K) },
	115	+ {"N25Q1024A", INFO(0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL \| WR_QPP \| E_FSR \| SECT_4K) },
101	116	#endif
102	117	#ifdef CONFIG_SPI_FLASH_SST /* SST */
103		- {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, SECT_4K \| SST_WR},
104		- {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, SECT_4K \| SST_WR},
105		- {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, SECT_4K \| SST_WR},
106		- {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, SECT_4K \| SST_WR},
107		- {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, SECT_4K},
108		- {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, SECT_4K \| SST_WR},
109		- {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, SECT_4K \| SST_WR},
110		- {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, SECT_4K \| SST_WR},
111		- {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, SECT_4K \| SST_WR},
112		- {"SST25WF040B", 0x621613, 0x0, 64 * 1024, 8, SECT_4K},
113		- {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, SECT_4K \| SST_WR},
	118	+ {"SST25VF040B", INFO(0xbf258d, 0x0, 64 * 1024, 8, SECT_4K \| SST_WR) },
	119	+ {"SST25VF080B", INFO(0xbf258e, 0x0, 64 * 1024, 16, SECT_4K \| SST_WR) },
	120	+ {"SST25VF016B", INFO(0xbf2541, 0x0, 64 * 1024, 32, SECT_4K \| SST_WR) },
	121	+ {"SST25VF032B", INFO(0xbf254a, 0x0, 64 * 1024, 64, SECT_4K \| SST_WR) },
	122	+ {"SST25VF064C", INFO(0xbf254b, 0x0, 64 * 1024, 128, SECT_4K) },
	123	+ {"SST25WF512", INFO(0xbf2501, 0x0, 64 * 1024, 1, SECT_4K \| SST_WR) },
	124	+ {"SST25WF010", INFO(0xbf2502, 0x0, 64 * 1024, 2, SECT_4K \| SST_WR) },
	125	+ {"SST25WF020", INFO(0xbf2503, 0x0, 64 * 1024, 4, SECT_4K \| SST_WR) },
	126	+ {"SST25WF040", INFO(0xbf2504, 0x0, 64 * 1024, 8, SECT_4K \| SST_WR) },
	127	+ {"SST25WF040B", INFO(0x621613, 0x0, 64 * 1024, 8, SECT_4K) },
	128	+ {"SST25WF080", INFO(0xbf2505, 0x0, 64 * 1024, 16, SECT_4K \| SST_WR) },
114	129	#endif
115	130	#ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */
116		- {"W25P80", 0xef2014, 0x0, 64 * 1024, 16, 0},
117		- {"W25P16", 0xef2015, 0x0, 64 * 1024, 32, 0},
118		- {"W25P32", 0xef2016, 0x0, 64 * 1024, 64, 0},
119		- {"W25X40", 0xef3013, 0x0, 64 * 1024, 8, SECT_4K},
120		- {"W25X16", 0xef3015, 0x0, 64 * 1024, 32, SECT_4K},
121		- {"W25X32", 0xef3016, 0x0, 64 * 1024, 64, SECT_4K},
122		- {"W25X64", 0xef3017, 0x0, 64 * 1024, 128, SECT_4K},
123		- {"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, RD_FULL \| WR_QPP \| SECT_4K},
124		- {"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, RD_FULL \| WR_QPP \| SECT_4K},
125		- {"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, RD_FULL \| WR_QPP \| SECT_4K},
126		- {"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, RD_FULL \| WR_QPP \| SECT_4K},
127		- {"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, RD_FULL \| WR_QPP \| SECT_4K},
128		- {"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, RD_FULL \| WR_QPP \| SECT_4K},
129		- {"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, RD_FULL \| WR_QPP \| SECT_4K},
130		- {"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, RD_FULL \| WR_QPP \| SECT_4K},
131		- {"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, RD_FULL \| WR_QPP \| SECT_4K},
132		- {"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, RD_FULL \| WR_QPP \| SECT_4K},
133		- {"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, RD_FULL \| WR_QPP \| SECT_4K},
	131	+ {"W25P80", INFO(0xef2014, 0x0, 64 * 1024, 16, 0) },
	132	+ {"W25P16", INFO(0xef2015, 0x0, 64 * 1024, 32, 0) },
	133	+ {"W25P32", INFO(0xef2016, 0x0, 64 * 1024, 64, 0) },
	134	+ {"W25X40", INFO(0xef3013, 0x0, 64 * 1024, 8, SECT_4K) },
	135	+ {"W25X16", INFO(0xef3015, 0x0, 64 * 1024, 32, SECT_4K) },
	136	+ {"W25X32", INFO(0xef3016, 0x0, 64 * 1024, 64, SECT_4K) },
	137	+ {"W25X64", INFO(0xef3017, 0x0, 64 * 1024, 128, SECT_4K) },
	138	+ {"W25Q80BL", INFO(0xef4014, 0x0, 64 * 1024, 16, RD_FULL \| WR_QPP \| SECT_4K) },
	139	+ {"W25Q16CL", INFO(0xef4015, 0x0, 64 * 1024, 32, RD_FULL \| WR_QPP \| SECT_4K) },
	140	+ {"W25Q32BV", INFO(0xef4016, 0x0, 64 * 1024, 64, RD_FULL \| WR_QPP \| SECT_4K) },
	141	+ {"W25Q64CV", INFO(0xef4017, 0x0, 64 * 1024, 128, RD_FULL \| WR_QPP \| SECT_4K) },
	142	+ {"W25Q128BV", INFO(0xef4018, 0x0, 64 * 1024, 256, RD_FULL \| WR_QPP \| SECT_4K) },
	143	+ {"W25Q256", INFO(0xef4019, 0x0, 64 * 1024, 512, RD_FULL \| WR_QPP \| SECT_4K) },
	144	+ {"W25Q80BW", INFO(0xef5014, 0x0, 64 * 1024, 16, RD_FULL \| WR_QPP \| SECT_4K) },
	145	+ {"W25Q16DW", INFO(0xef6015, 0x0, 64 * 1024, 32, RD_FULL \| WR_QPP \| SECT_4K) },
	146	+ {"W25Q32DW", INFO(0xef6016, 0x0, 64 * 1024, 64, RD_FULL \| WR_QPP \| SECT_4K) },
	147	+ {"W25Q64DW", INFO(0xef6017, 0x0, 64 * 1024, 128, RD_FULL \| WR_QPP \| SECT_4K) },
	148	+ {"W25Q128FW", INFO(0xef6018, 0x0, 64 * 1024, 256, RD_FULL \| WR_QPP \| SECT_4K) },
134	149	#endif
135	150	{}, /* Empty entry to terminate the list */
136	151	/*
...	...	@@ -165,7 +165,8 @@
165	165	return flash->bank_curr;
166	166	}
167	167
168		-static int spi_flash_read_bar(struct spi_flash *flash, u8 idcode0)
	168	+static int spi_flash_read_bar(struct spi_flash *flash,
	169	+ const struct spi_flash_info *info)
169	170	{
170	171	u8 curr_bank = 0;
171	172	int ret;
...	...	@@ -173,7 +174,7 @@
173	174	if (flash->size <= SPI_FLASH_16MB_BOUN)
174	175	goto bar_end;
175	176
176		- switch (idcode0) {
	177	+ switch (JEDEC_MFR(info)) {
177	178	case SPI_FLASH_CFI_MFR_SPANSION:
178	179	flash->bank_read_cmd = CMD_BANKADDR_BRRD;
179	180	flash->bank_write_cmd = CMD_BANKADDR_BRWR;
180	181
...	...	@@ -924,9 +925,35 @@
924	925	}
925	926	#endif
926	927
927		-static int set_quad_mode(struct spi_flash *flash, u8 idcode0)
	928	+static const struct spi_flash_info spi_flash_read_id(struct spi_flash flash)
928	929	{
929		- switch (idcode0) {
	930	+ int tmp;
	931	+ u8 id[5];
	932	+ const struct spi_flash_info *info;
	933	+
	934	+ tmp = spi_flash_cmd(flash->spi, CMD_READ_ID, id, 5);
	935	+ if (tmp < 0) {
	936	+ printf("SF: error %d reading JEDEC ID\n", tmp);
	937	+ return ERR_PTR(tmp);
	938	+ }
	939	+
	940	+ info = spi_flash_ids;
	941	+ for (; info->name != NULL; info++) {
	942	+ if (info->id_len) {
	943	+ if (!memcmp(info->id, id, info->id_len))
	944	+ return info;
	945	+ }
	946	+ }
	947	+
	948	+ printf("SF: unrecognized JEDEC id bytes: %02x, %02x, %02x\n",
	949	+ id[0], id[1], id[2]);
	950	+ return ERR_PTR(-ENODEV);
	951	+}
	952	+
	953	+static int set_quad_mode(struct spi_flash *flash,
	954	+ const struct spi_flash_info *info)
	955	+{
	956	+ switch (JEDEC_MFR(info)) {
930	957	#ifdef CONFIG_SPI_FLASH_MACRONIX
931	958	case SPI_FLASH_CFI_MFR_MACRONIX:
932	959	return macronix_quad_enable(flash);
...	...	@@ -941,7 +968,8 @@
941	968	return micron_quad_enable(flash);
942	969	#endif
943	970	default:
944		- printf("SF: Need set QEB func for %02x flash\n", idcode0);
	971	+ printf("SF: Need set QEB func for %02x flash\n",
	972	+ JEDEC_MFR(info));
945	973	return -1;
946	974	}
947	975	}
948	976
949	977
...	...	@@ -1011,46 +1039,13 @@
1011	1039	int spi_flash_scan(struct spi_flash *flash)
1012	1040	{
1013	1041	struct spi_slave *spi = flash->spi;
1014		- const struct spi_flash_params *params;
1015		- u16 jedec, ext_jedec;
1016		- u8 idcode[5];
1017		- int ret;
	1042	+ const struct spi_flash_info *info = NULL;
	1043	+ int ret = -1;
1018	1044
1019		- /* Read the ID codes */
1020		- ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
1021		- if (ret) {
1022		- printf("SF: Failed to get idcodes\n");
1023		- return ret;
1024		- }
	1045	+ info = spi_flash_read_id(flash);
	1046	+ if (IS_ERR_OR_NULL(info))
	1047	+ return -ENOENT;
1025	1048
1026		-#ifdef DEBUG
1027		- printf("SF: Got idcodes\n");
1028		- print_buffer(0, idcode, 1, sizeof(idcode), 0);
1029		-#endif
1030		-
1031		- jedec = idcode[1] << 8 \| idcode[2];
1032		- ext_jedec = idcode[3] << 8 \| idcode[4];
1033		-
1034		- /* Validate params from spi_flash_params table */
1035		- params = spi_flash_params_table;
1036		- for (; params->name != NULL; params++) {
1037		- if ((params->jedec >> 16) == idcode[0]) {
1038		- if ((params->jedec & 0xFFFF) == jedec) {
1039		- if (params->ext_jedec == 0)
1040		- break;
1041		- else if (params->ext_jedec == ext_jedec)
1042		- break;
1043		- }
1044		- }
1045		- }
1046		-
1047		- if (!params->name) {
1048		- printf("SF: Unsupported flash IDs: ");
1049		- printf("manuf %02x, jedec %04x, ext_jedec %04x\n",
1050		- idcode[0], jedec, ext_jedec);
1051		- return -EPROTONOSUPPORT;
1052		- }
1053		-
1054	1049	#ifdef CONFIG_SPI_FLASH_SPANSION
1055	1050	/*
1056	1051	* The S25FS-S family physical sectors may be configured as a
1057	1052
1058	1053
...	...	@@ -1065,11 +1060,17 @@
1065	1060	* sector that is not overlaid by the parameter sectors.
1066	1061	* The uniform sector erase command has no effect on parameter sectors.
1067	1062	*/
1068		- if ((jedec == 0x0219 \|\| (jedec == 0x0220)) &&
1069		- (ext_jedec & 0xff00) == 0x4d00) {
	1063	+ if ((JEDEC_ID(info) == 0x0219 \|\| (JEDEC_ID(info) == 0x0220)) &&
	1064	+ (JEDEC_EXT(info) & 0xff00) == 0x4d00) {
1070	1065	int ret;
	1066	+ u8 idcode[5];
1071	1067	u8 id[6];
1072	1068
	1069	+ /* Read the ID codes again, 5 bytes */
	1070	+ ret = spi_flash_cmd(flash->spi, CMD_READ_ID, idcode, sizeof(idcode));
	1071	+ if (ret)
	1072	+ return -EIO;
	1073	+
1073	1074	/* Read the ID codes again, 6 bytes */
1074	1075	ret = spi_flash_cmd(flash->spi, CMD_READ_ID, id, sizeof(id));
1075	1076	if (ret)
1076	1077
1077	1078
...	...	@@ -1088,18 +1089,18 @@
1088	1089	}
1089	1090	#endif
1090	1091	/* Flash powers up read-only, so clear BP# bits */
1091		- if (idcode[0] == SPI_FLASH_CFI_MFR_ATMEL \|\|
1092		- idcode[0] == SPI_FLASH_CFI_MFR_MACRONIX \|\|
1093		- idcode[0] == SPI_FLASH_CFI_MFR_SST)
	1092	+ if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_ATMEL \|\|
	1093	+ JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX \|\|
	1094	+ JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST)
1094	1095	write_sr(flash, 0);
1095	1096
1096	1097	/* Assign spi data */
1097		- flash->name = params->name;
	1098	+ flash->name = info->name;
1098	1099	flash->memory_map = spi->memory_map;
1099	1100	flash->dual_flash = spi->option;
1100	1101
1101	1102	/* Assign spi flash flags */
1102		- if (params->flags & SST_WR)
	1103	+ if (info->flags & SST_WR)
1103	1104	flash->flags \|= SNOR_F_SST_WR;
1104	1105
1105	1106	/* Assign spi_flash ops */
...	...	@@ -1118,7 +1119,7 @@
1118	1119	#endif
1119	1120
1120	1121	/* lock hooks are flash specific - assign them based on idcode0 */
1121		- switch (idcode[0]) {
	1122	+ switch (JEDEC_MFR(info)) {
1122	1123	#if defined(CONFIG_SPI_FLASH_STMICRO) \|\| defined(CONFIG_SPI_FLASH_SST)
1123	1124	case SPI_FLASH_CFI_MFR_STMICRO:
1124	1125	case SPI_FLASH_CFI_MFR_SST:
1125	1126
1126	1127
1127	1128
1128	1129
...	...	@@ -1128,28 +1129,26 @@
1128	1129	#endif
1129	1130	break;
1130	1131	default:
1131		- debug("SF: Lock ops not supported for %02x flash\n", idcode[0]);
	1132	+ debug("SF: Lock ops not supported for %02x flash\n", JEDEC_MFR(info));
1132	1133	}
1133	1134
1134	1135	/* Compute the flash size */
1135	1136	flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0;
	1137	+ flash->page_size = info->page_size;
1136	1138	/*
1137	1139	* The Spansion S25FL032P and S25FL064P have 256b pages, yet use the
1138	1140	* 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with
1139	1141	* the 0x4d00 Extended JEDEC code have 512b pages. All of the others
1140	1142	* have 256b pages.
1141	1143	*/
1142		- if (ext_jedec == 0x4d00) {
1143		- if ((jedec == 0x0215) \|\| (jedec == 0x216) \|\| (jedec == 0x220))
1144		- flash->page_size = 256;
1145		- else
	1144	+ if (JEDEC_EXT(info) == 0x4d00) {
	1145	+ if ((JEDEC_ID(info) != 0x0215) &&
	1146	+ (JEDEC_ID(info) != 0x0216))
1146	1147	flash->page_size = 512;
1147		- } else {
1148		- flash->page_size = 256;
1149	1148	}
1150	1149	flash->page_size <<= flash->shift;
1151		- flash->sector_size = params->sector_size << flash->shift;
1152		- flash->size = flash->sector_size * params->nr_sectors << flash->shift;
	1150	+ flash->sector_size = info->sector_size << flash->shift;
	1151	+ flash->size = flash->sector_size * info->nr_sectors << flash->shift;
1153	1152	#ifdef CONFIG_SF_DUAL_FLASH
1154	1153	if (flash->dual_flash & SF_DUAL_STACKED_FLASH)
1155	1154	flash->size <<= 1;
...	...	@@ -1157,7 +1156,7 @@
1157	1156
1158	1157	#ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS
1159	1158	/* Compute erase sector and command */
1160		- if (params->flags & SECT_4K) {
	1159	+ if (info->flags & SECT_4K) {
1161	1160	flash->erase_cmd = CMD_ERASE_4K;
1162	1161	flash->erase_size = 4096 << flash->shift;
1163	1162	} else
1164	1163
1165	1164
...	...	@@ -1174,13 +1173,13 @@
1174	1173	flash->read_cmd = CMD_READ_ARRAY_FAST;
1175	1174	if (spi->mode & SPI_RX_SLOW)
1176	1175	flash->read_cmd = CMD_READ_ARRAY_SLOW;
1177		- else if (spi->mode & SPI_RX_QUAD && params->flags & RD_QUAD)
	1176	+ else if (spi->mode & SPI_RX_QUAD && info->flags & RD_QUAD)
1178	1177	flash->read_cmd = CMD_READ_QUAD_OUTPUT_FAST;
1179		- else if (spi->mode & SPI_RX_DUAL && params->flags & RD_DUAL)
	1178	+ else if (spi->mode & SPI_RX_DUAL && info->flags & RD_DUAL)
1180	1179	flash->read_cmd = CMD_READ_DUAL_OUTPUT_FAST;
1181	1180
1182	1181	/* Look for write commands */
1183		- if (params->flags & WR_QPP && spi->mode & SPI_TX_QUAD)
	1182	+ if (info->flags & WR_QPP && spi->mode & SPI_TX_QUAD)
1184	1183	flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
1185	1184	else
1186	1185	/* Go for default supported write cmd */
1187	1186
...	...	@@ -1190,9 +1189,10 @@
1190	1189	if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) \|\|
1191	1190	(flash->read_cmd == CMD_READ_QUAD_IO_FAST) \|\|
1192	1191	(flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) {
1193		- ret = set_quad_mode(flash, idcode[0]);
	1192	+ ret = set_quad_mode(flash, info);
1194	1193	if (ret) {
1195		- debug("SF: Fail to set QEB for %02x\n", idcode[0]);
	1194	+ debug("SF: Fail to set QEB for %02x\n",
	1195	+ JEDEC_MFR(info));
1196	1196	return -EINVAL;
1197	1197	}
1198	1198	}
1199	1199
...	...	@@ -1217,13 +1217,13 @@
1217	1217	}
1218	1218
1219	1219	#ifdef CONFIG_SPI_FLASH_STMICRO
1220		- if (params->flags & E_FSR)
	1220	+ if (info->flags & E_FSR)
1221	1221	flash->flags \|= SNOR_F_USE_FSR;
1222	1222	#endif
1223	1223
1224	1224	/* Configure the BAR - discover bank cmds and read current bank */
1225	1225	#ifdef CONFIG_SPI_FLASH_BAR
1226		- ret = spi_flash_read_bar(flash, idcode[0]);
	1226	+ ret = spi_flash_read_bar(flash, info);
1227	1227	if (ret < 0)
1228	1228	return ret;
1229	1229	#endif
...	...	@@ -36,6 +36,11 @@
36	36	return IS_ERR_VALUE((unsigned long)ptr);
37	37	}
38	38
	39	+static inline bool IS_ERR_OR_NULL(const void *ptr)
	40	+{
	41	+ return !ptr \|\| IS_ERR_VALUE((unsigned long)ptr);
	42	+}
	43	+
39	44	/**
40	45	* ERR_CAST - Explicitly cast an error-valued pointer to another pointer type
41	46	* @ptr: The pointer to cast.