video: ipu reg: Correct reserved1 array size in struct ipu_cm

The array reserved1 as a placeholder in the structure ipu_cm should contain 4 32bit unsigned integer entries instead of 16 ones, because the placeholder is located bewteen the register IPU_CH_DB_MODE_SEL_1 and the register IPU_ALT_CH_DB_MODE_SEL_0 with the address offsets of 0x154 and 0x168 respectively. Reported-by: Robin Gong <b38343@freescale.com> Acked-by: Robin Gong <b38343@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Liu Ying <Ying.Liu@freescale.com>

video: ipu reg: Correct reserved1 array size in struct ipu_cm
The array reserved1 as a placeholder in the structure ipu_cm should contain 4 32bit unsigned integer entries instead of 16 ones, because the placeholder is located bewteen the register IPU_CH_DB_MODE_SEL_1 and the register IPU_ALT_CH_DB_MODE_SEL_0 with the address offsets of 0x154 and 0x168 respectively. Reported-by: Robin Gong <b38343@freescale.com> Acked-by: Robin Gong <b38343@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Liu Ying · Anatolij Gustschin
1 parent 7f673c99c2
Showing 1 changed file with 1 additions and 1 deletions Side-by-side Diff
drivers/video/ipu_regs.h
@@ -171,7 +171,7 @@
 	u32 gpr;
 	u32 reserved0[26];
 	u32 ch_db_mode_sel[2];
-	u32 reserved1[16];
+	u32 reserved1[4];
 	u32 alt_ch_db_mode_sel[2];
 	u32 reserved2[2];
 	u32 ch_trb_mode_sel[2];
...	...	@@ -171,7 +171,7 @@
171	171	u32 gpr;
172	172	u32 reserved0[26];
173	173	u32 ch_db_mode_sel[2];
174		- u32 reserved1[16];
	174	+ u32 reserved1[4];
175	175	u32 alt_ch_db_mode_sel[2];
176	176	u32 reserved2[2];
177	177	u32 ch_trb_mode_sel[2];