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Commit f7ec91745fba64432a20f971217e11c18dca722e

Authored by Hou Zhiqiang
Committed by Priyanka Jain
1 parent 7e66f62246
Exists in smarc_8mq_lf_v2020.04 and in 4 other branches pitx_8mp_lf_v2020.04, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc_8mp_lf_v2020.04

dts: powerpc: p2020rdb: Add eTSEC DT nodes 

P2020RDB implements 3 enhanced three-speed Ethernet controllers,
and the connection is shown below:
    eTSEC1: Connected to RGMII switch VSC7385
    eTSEC2: Connected to SGMII PHY VSC8221
    eTSEC3: Connected to SGMII PHY AR8021

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

Showing 8 changed files with 170 additions and 2 deletions Side-by-side Diff

arch/powerpc/dts/p2020-post.dtsi
Diff comments   View file @ f7ec917
... ... @@ -38,8 +38,12 @@
38 38 clock-frequency = <0>;
39 39 };
40 40  
41   - /include/ "pq3-i2c-0.dtsi"
42   - /include/ "pq3-i2c-1.dtsi"
  41 +/include/ "pq3-i2c-0.dtsi"
  42 +/include/ "pq3-i2c-1.dtsi"
  43 +
  44 +/include/ "pq3-etsec1-0.dtsi"
  45 +/include/ "pq3-etsec1-1.dtsi"
  46 +/include/ "pq3-etsec1-2.dtsi"
43 47 };
44 48  
45 49 /* PCIe controller base address 0x8000 */
arch/powerpc/dts/p2020rdb-pc.dts
Diff comments   View file @ f7ec917
... ... @@ -37,5 +37,6 @@
37 37 };
38 38 };
39 39  
  40 +/include/ "p2020rdb-pc.dtsi"
40 41 /include/ "p2020-post.dtsi"
arch/powerpc/dts/p2020rdb-pc.dtsi
Diff comments   View file @ f7ec917
  1 +// SPDX-License-Identifier: GPL-2.0+ OR X11
  2 +/*
  3 + * P2020 RDB-PC Device Tree Source stub (no addresses or top-level ranges)
  4 + *
  5 + * Copyright 2011 Freescale Semiconductor Inc.
  6 + * Copyright 2020 NXP
  7 + */
  8 +
  9 +&soc {
  10 + mdio@24520 {
  11 + phy0: ethernet-phy@0 {
  12 + interrupts = <3 1 0 0>;
  13 + reg = <0x0>;
  14 + };
  15 + phy1: ethernet-phy@1 {
  16 + interrupts = <2 1 0 0>;
  17 + reg = <0x1>;
  18 + };
  19 + };
  20 +
  21 + mdio@25520 {
  22 + tbi0: tbi-phy@11 {
  23 + reg = <0x11>;
  24 + device_type = "tbi-phy";
  25 + };
  26 + };
  27 +
  28 + mdio@26520 {
  29 + status = "disabled";
  30 + };
  31 +
  32 + enet0: ethernet@24000 {
  33 + phy-connection-type = "rgmii-id";
  34 + fixed-link {
  35 + speed = <1000>;
  36 + full-duplex;
  37 + };
  38 + };
  39 +
  40 + enet1: ethernet@25000 {
  41 + tbi-handle = <&tbi0>;
  42 + phy-handle = <&phy0>;
  43 + phy-connection-type = "sgmii";
  44 + };
  45 +
  46 + enet2: ethernet@26000 {
  47 + phy-handle = <&phy1>;
  48 + phy-connection-type = "rgmii-id";
  49 + };
  50 +};
arch/powerpc/dts/p2020rdb-pc_36b.dts
Diff comments   View file @ f7ec917
... ... @@ -37,5 +37,6 @@
37 37 };
38 38 };
39 39  
  40 +/include/ "p2020rdb-pc.dtsi"
40 41 /include/ "p2020-post.dtsi"
arch/powerpc/dts/pq3-etsec1-0.dtsi
Diff comments   View file @ f7ec917
  1 +// SPDX-License-Identifier: GPL-2.0+ OR X11
  2 +/*
  3 + * PQ3 eTSEC device tree stub [ @ offsets 0x24000 ]
  4 + *
  5 + * Copyright 2011-2012 Freescale Semiconductor Inc.
  6 + * Copyright 2020 NXP
  7 + */
  8 +
  9 +ethernet@24000 {
  10 + #address-cells = <1>;
  11 + #size-cells = <1>;
  12 + cell-index = <0>;
  13 + device_type = "network";
  14 + model = "eTSEC";
  15 + compatible = "gianfar";
  16 + reg = <0x24000 0x1000>;
  17 + ranges = <0x0 0x24000 0x1000>;
  18 + fsl,magic-packet;
  19 + local-mac-address = [ 00 00 00 00 00 00 ];
  20 + interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>;
  21 +};
  22 +
  23 +mdio@24520 {
  24 + #address-cells = <1>;
  25 + #size-cells = <0>;
  26 + compatible = "fsl,gianfar-mdio";
  27 + reg = <0x24520 0x20>;
  28 +};
arch/powerpc/dts/pq3-etsec1-1.dtsi
Diff comments   View file @ f7ec917
  1 +// SPDX-License-Identifier: GPL-2.0+ OR X11
  2 +/*
  3 + * PQ3 eTSEC device tree stub [ @ offsets 0x25000 ]
  4 + *
  5 + * Copyright 2011-2012 Freescale Semiconductor Inc.
  6 + * Copyright 2020 NXP
  7 + */
  8 +
  9 +ethernet@25000 {
  10 + #address-cells = <1>;
  11 + #size-cells = <1>;
  12 + cell-index = <1>;
  13 + device_type = "network";
  14 + model = "eTSEC";
  15 + compatible = "gianfar";
  16 + reg = <0x25000 0x1000>;
  17 + ranges = <0x0 0x25000 0x1000>;
  18 + fsl,magic-packet;
  19 + local-mac-address = [ 00 00 00 00 00 00 ];
  20 + interrupts = <35 2 0 0 36 2 0 0 40 2 0 0>;
  21 +};
  22 +
  23 +mdio@25520 {
  24 + #address-cells = <1>;
  25 + #size-cells = <0>;
  26 + compatible = "fsl,gianfar-tbi";
  27 + reg = <0x25520 0x20>;
  28 +};
arch/powerpc/dts/pq3-etsec1-2.dtsi
Diff comments   View file @ f7ec917
  1 +// SPDX-License-Identifier: GPL-2.0+ OR X11
  2 +/*
  3 + * PQ3 eTSEC device tree stub [ @ offsets 0x26000 ]
  4 + *
  5 + * Copyright 2011-2012 Freescale Semiconductor Inc.
  6 + * Copyright 2020 NXP
  7 + */
  8 +
  9 +ethernet@26000 {
  10 + #address-cells = <1>;
  11 + #size-cells = <1>;
  12 + cell-index = <2>;
  13 + device_type = "network";
  14 + model = "eTSEC";
  15 + compatible = "gianfar";
  16 + reg = <0x26000 0x1000>;
  17 + ranges = <0x0 0x26000 0x1000>;
  18 + fsl,magic-packet;
  19 + local-mac-address = [ 00 00 00 00 00 00 ];
  20 + interrupts = <31 2 0 0 32 2 0 0 33 2 0 0>;
  21 +};
  22 +
  23 +mdio@26520 {
  24 + #address-cells = <1>;
  25 + #size-cells = <0>;
  26 + compatible = "fsl,gianfar-tbi";
  27 + reg = <0x26520 0x20>;
  28 +};
arch/powerpc/dts/pq3-etsec1-3.dtsi
Diff comments   View file @ f7ec917
  1 +// SPDX-License-Identifier: GPL-2.0+ OR X11
  2 +/*
  3 + * PQ3 eTSEC device tree stub [ @ offsets 0x27000 ]
  4 + *
  5 + * Copyright 2011-2012 Freescale Semiconductor Inc.
  6 + * Copyright 2020 NXP
  7 + */
  8 +
  9 +ethernet@27000 {
  10 + #address-cells = <1>;
  11 + #size-cells = <1>;
  12 + cell-index = <3>;
  13 + device_type = "network";
  14 + model = "eTSEC";
  15 + compatible = "gianfar";
  16 + reg = <0x27000 0x1000>;
  17 + ranges = <0x0 0x27000 0x1000>;
  18 + fsl,magic-packet;
  19 + local-mac-address = [ 00 00 00 00 00 00 ];
  20 + interrupts = <37 2 0 0 38 2 0 0 39 2 0 0>;
  21 +};
  22 +
  23 +mdio@27520 {
  24 + #address-cells = <1>;
  25 + #size-cells = <0>;
  26 + compatible = "fsl,gianfar-tbi";
  27 + reg = <0x27520 0x20>;
  28 +};