Eric Lee / smarc-uboot

Download as
Browse Code »

Commit fab657f3ef9f064729b14d2da13d70c5bef178a2

Authored by Eddy Petrișor
Committed by Larisa Grigore
1 parent 423c3a1ff2
Exists in smarc_8mq_lf_v2020.04 and in 4 other branches pitx_8mp_lf_v2020.04, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc_8mp_lf_v2020.04

s32v234: MMU pages for flash0 and flash1 

Define pages to allow access to the flash memories
possibly accessible via QSPI.

Signed-off-by: Eddy Petrișor <eddy.petrisor@nxp.com>
Signed-off-by: Cosmin Stoica <cosmin.stoica@nxp.com>

Showing 3 changed files with 22 additions and 0 deletions Side-by-side Diff

arch/arm/include/asm/arch-s32v234/cpu.h
Diff comments   View file @ fab657f
... ... @@ -67,6 +67,12 @@
67 67 CONFIG_SYS_FSL_PERIPH_SIZE, MT_DEVICE_NGNRNE, PTE_BLOCK_NON_SHARE },
68 68 { CONFIG_SYS_FSL_DRAM_BASE2, CONFIG_SYS_FSL_DRAM_BASE2,
69 69 CONFIG_SYS_FSL_DRAM_SIZE2, MT_NORMAL_NC, PTE_BLOCK_OUTER_SHARE },
  70 + { CONFIG_SYS_FSL_FLASH0_BASE, CONFIG_SYS_FSL_FLASH0_BASE,
  71 + CONFIG_SYS_FSL_FLASH0_SIZE, MT_NORMAL_NC, PTE_BLOCK_OUTER_SHARE },
  72 +#ifdef CONFIG_SYS_FSL_FLASH1_BASE
  73 + { CONFIG_SYS_FSL_FLASH1_BASE, CONFIG_SYS_FSL_FLASH1_BASE,
  74 + CONFIG_SYS_FSL_FLASH1_SIZE, MT_NORMAL_NC, PTE_BLOCK_OUTER_SHARE },
  75 +#endif
70 76 };
71 77  
72 78 static const struct sys_mmu_table s32_final_mmu_table[] = {
... ... @@ -79,6 +85,12 @@
79 85 CONFIG_SYS_FSL_PERIPH_SIZE, MT_DEVICE_NGNRNE, PTE_BLOCK_NON_SHARE },
80 86 { CONFIG_SYS_FSL_DRAM_BASE2, CONFIG_SYS_FSL_DRAM_BASE2,
81 87 CONFIG_SYS_FSL_DRAM_SIZE2, MT_NORMAL, PTE_BLOCK_OUTER_SHARE },
  88 + { CONFIG_SYS_FSL_FLASH0_BASE, CONFIG_SYS_FSL_FLASH0_BASE,
  89 + CONFIG_SYS_FSL_FLASH0_SIZE, MT_NORMAL, PTE_BLOCK_OUTER_SHARE },
  90 +#ifdef CONFIG_SYS_FSL_FLASH1_BASE
  91 + { CONFIG_SYS_FSL_FLASH1_BASE, CONFIG_SYS_FSL_FLASH1_BASE,
  92 + CONFIG_SYS_FSL_FLASH1_SIZE, MT_NORMAL, PTE_BLOCK_OUTER_SHARE },
  93 +#endif
82 94 };
83 95  
84 96 #endif
include/configs/s32v234_common.h
Diff comments   View file @ fab657f
... ... @@ -90,6 +90,12 @@
90 90 #define LINFLEXUART_BASE LINFLEXD1_BASE_ADDR
91 91 #endif
92 92  
  93 +/* memory mapped external flash */
  94 +#define CONFIG_SYS_FSL_FLASH0_BASE 0x20000000
  95 +#define CONFIG_SYS_FSL_FLASH0_SIZE 0x10000000
  96 +#define CONFIG_SYS_FSL_FLASH1_BASE 0x60000000
  97 +#define CONFIG_SYS_FSL_FLASH1_SIZE 0x10000000
  98 +
93 99 /* Allow to overwrite serial and ethaddr */
94 100 #define CONFIG_ENV_OVERWRITE
95 101 #define CONFIG_SYS_UART_PORT (1)
scripts/config_whitelist.txt
Diff comments   View file @ fab657f
... ... @@ -2528,6 +2528,10 @@
2528 2528 CONFIG_SYS_FSL_ESDHC_NUM
2529 2529 CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
2530 2530 CONFIG_SYS_FSL_ESDHC_USE_PIO
  2531 +CONFIG_SYS_FSL_FLASH0_BASE
  2532 +CONFIG_SYS_FSL_FLASH0_SIZE
  2533 +CONFIG_SYS_FSL_FLASH1_BASE
  2534 +CONFIG_SYS_FSL_FLASH1_SIZE
2531 2535 CONFIG_SYS_FSL_FM
2532 2536 CONFIG_SYS_FSL_FM1_ADDR
2533 2537 CONFIG_SYS_FSL_FM1_DTSEC1_ADDR