Commit fbbd38001ff64915c03f1e16dd1425726bc44c2f

Authored by Philipp Tomsich
1 parent 9b0bc59366

rockchip: rk3368: spl: add SPL support

Adds SPL support for the RK3368 (assuming that our TPL stage has
initialised DRAM and set up the memory firewall).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Showing 2 changed files with 99 additions and 1 deletions Side-by-side Diff

arch/arm/mach-rockchip/Makefile
... ... @@ -18,7 +18,7 @@
18 18 obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o
19 19 obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o
20 20 obj-spl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o
21   -obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o
  21 +obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o
22 22 obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o
23 23  
24 24 ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
arch/arm/mach-rockchip/rk3368-board-spl.c
  1 +/*
  2 + * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
  3 + *
  4 + * SPDX-License-Identifier: GPL-2.0+
  5 + */
  6 +
  7 +#include <common.h>
  8 +#include <debug_uart.h>
  9 +#include <dm.h>
  10 +#include <dm/pinctrl.h>
  11 +#include <ram.h>
  12 +#include <spl.h>
  13 +#include <asm/io.h>
  14 +#include <asm/arch/cru_rk3368.h>
  15 +#include <asm/arch/grf_rk3368.h>
  16 +#include <asm/arch/hardware.h>
  17 +#include <asm/arch/periph.h>
  18 +#include <asm/arch/timer.h>
  19 +
  20 +DECLARE_GLOBAL_DATA_PTR;
  21 +
  22 +/*
  23 + * The ARMv8 generic timer uses the STIMER1 as its clock-source.
  24 + * Set up the STIMER1 to free-running (i.e. auto-reload) to start
  25 + * the generic timer counting (if we don't do this, udelay will not
  26 + * work and block indefinitively).
  27 + */
  28 +static void secure_timer_init(void)
  29 +{
  30 + struct rk_timer * const stimer1 =
  31 + (struct rk_timer * const)0xff830020;
  32 + const u32 TIMER_EN = BIT(0);
  33 +
  34 + writel(~0u, &stimer1->timer_load_count0);
  35 + writel(~0u, &stimer1->timer_load_count1);
  36 + writel(TIMER_EN, &stimer1->timer_ctrl_reg);
  37 +}
  38 +
  39 +void board_debug_uart_init(void)
  40 +{
  41 +}
  42 +
  43 +void board_init_f(ulong dummy)
  44 +{
  45 + struct udevice *pinctrl;
  46 + struct udevice *dev;
  47 + int ret;
  48 +
  49 + ret = spl_early_init();
  50 + if (ret) {
  51 + debug("spl_early_init() failed: %d\n", ret);
  52 + hang();
  53 + }
  54 +
  55 + /* Make sure the ARMv8 generic timer counts */
  56 + secure_timer_init();
  57 +
  58 + /* Set up our preloader console */
  59 + ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
  60 + if (ret) {
  61 + error("%s: pinctrl init failed: %d\n", __func__, ret);
  62 + hang();
  63 + }
  64 +
  65 + ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART0);
  66 + if (ret) {
  67 + error("%s: failed to set up console UART\n", __func__);
  68 + hang();
  69 + }
  70 +
  71 + preloader_console_init();
  72 +
  73 + ret = uclass_get_device(UCLASS_RAM, 0, &dev);
  74 + if (ret) {
  75 + debug("DRAM init failed: %d\n", ret);
  76 + return;
  77 + }
  78 +}
  79 +
  80 +u32 spl_boot_mode(const u32 boot_device)
  81 +{
  82 + return MMCSD_MODE_RAW;
  83 +}
  84 +
  85 +u32 spl_boot_device(void)
  86 +{
  87 + return BOOT_DEVICE_MMC1;
  88 +}
  89 +
  90 +#ifdef CONFIG_SPL_LOAD_FIT
  91 +int board_fit_config_name_match(const char *name)
  92 +{
  93 + /* Just empty function now - can't decide what to choose */
  94 + debug("%s: %s\n", __func__, name);
  95 +
  96 + return 0;
  97 +}
  98 +#endif