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Commit fc5ad4778d91dabbeca3bc05a78cb669686f0a9c

Authored by Adrian Alonso
Committed by Stefano Babic
1 parent e469719c8b
Exists in v2017.01-smarct4x and in 30 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

imx: cpu: move common chip revision id's 

Move common chip revision id's to main cpu header file
mx25 generic include cpu header for chip revision

Signed-off-by: Adrian Alonso <aalonso@freescale.com>

Showing 5 changed files with 13 additions and 19 deletions Side-by-side Diff

arch/arm/cpu/arm926ejs/mx25/generic.c
Diff comments   View file @ fc5ad47
... ... @@ -13,6 +13,7 @@
13 13 #include <div64.h>
14 14 #include <netdev.h>
15 15 #include <asm/io.h>
  16 +#include <asm/arch-imx/cpu.h>
16 17 #include <asm/arch/imx-regs.h>
17 18 #include <asm/arch/clock.h>
18 19  
arch/arm/include/asm/arch-imx/cpu.h
Diff comments   View file @ fc5ad47
... ... @@ -27,6 +27,18 @@
27 27 #define MXC_SOC_MX6 0x60
28 28 #define MXC_SOC_MX7 0x70
29 29  
  30 +#define CHIP_REV_1_0 0x10
  31 +#define CHIP_REV_1_1 0x11
  32 +#define CHIP_REV_1_2 0x12
  33 +#define CHIP_REV_1_5 0x15
  34 +#define CHIP_REV_2_0 0x20
  35 +#define CHIP_REV_2_5 0x25
  36 +#define CHIP_REV_3_0 0x30
  37 +
  38 +#define BOARD_REV_1_0 0x0
  39 +#define BOARD_REV_2_0 0x1
  40 +#define BOARD_VER_OFFSET 0x8
  41 +
30 42 #define CS0_128 0
31 43 #define CS0_64M_CS1_64M 1
32 44 #define CS0_64M_CS1_32M_CS2_32M 2
arch/arm/include/asm/arch-mx25/imx-regs.h
Diff comments   View file @ fc5ad47
... ... @@ -526,9 +526,5 @@
526 526 IMX_CSPI2_BASE, \
527 527 IMX_CSPI3_BASE
528 528  
529   -#define CHIP_REV_1_0 0x10
530   -#define CHIP_REV_1_1 0x11
531   -#define CHIP_REV_1_2 0x12
532   -
533 529 #endif /* _IMX_REGS_H */
arch/arm/include/asm/arch-mx5/imx-regs.h
Diff comments   View file @ fc5ad47
... ... @@ -291,17 +291,6 @@
291 291 #define DP_MFD_216 (4 - 1)
292 292 #define DP_MFN_216 3
293 293  
294   -#define CHIP_REV_1_0 0x10
295   -#define CHIP_REV_1_1 0x11
296   -#define CHIP_REV_2_0 0x20
297   -#define CHIP_REV_2_5 0x25
298   -#define CHIP_REV_3_0 0x30
299   -
300   -#define BOARD_REV_1_0 0x0
301   -#define BOARD_REV_2_0 0x1
302   -
303   -#define BOARD_VER_OFFSET 0x8
304   -
305 294 #define IMX_IIM_BASE (IIM_BASE_ADDR)
306 295  
307 296 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
arch/arm/include/asm/arch-mx6/imx-regs.h
Diff comments   View file @ fc5ad47
... ... @@ -325,10 +325,6 @@
325 325 #define WDOG3_BASE_ADDR (is_cpu_type(MXC_CPU_MX6UL) ? \
326 326 MX6UL_WDOG3_BASE_ADDR : MX6SX_WDOG3_BASE_ADDR)
327 327  
328   -#define CHIP_REV_1_0 0x10
329   -#define CHIP_REV_1_2 0x12
330   -#define CHIP_REV_1_5 0x15
331   -#define CHIP_REV_2_0 0x20
332 328 #if !(defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))
333 329 #define IRAM_SIZE 0x00040000
334 330 #else