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Commit fc5e5ceec4937773072a242cbef7a0f1e7db99e0

Authored by Wolfgang Denk
1 parent 6aac646f58
Exists in master and in 55 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, emb_lf_v2023.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

ARM: remove broken "dnp1110" board. 

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Alex Züpke <azu@sysgo.de>

Showing 9 changed files with 1 additions and 856 deletions Side-by-side Diff

... ... @@ -903,7 +903,6 @@
903 903 Alex Züpke <azu@sysgo.de>
904 904  
905 905 lart SA1100
906   - dnp1110 SA1110
907 906  
908 907 Syed Mohammed Khasim <sm.khasim@gmail.com>
909 908 Sughosh Ganu <urwithsughosh@gmail.com>
board/dnp1110/Makefile
View file @ fc5e5ce
1   -#
2   -# (C) Copyright 2000-2006
3   -# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4   -#
5   -# See file CREDITS for list of people who contributed to this
6   -# project.
7   -#
8   -# This program is free software; you can redistribute it and/or
9   -# modify it under the terms of the GNU General Public License as
10   -# published by the Free Software Foundation; either version 2 of
11   -# the License, or (at your option) any later version.
12   -#
13   -# This program is distributed in the hope that it will be useful,
14   -# but WITHOUT ANY WARRANTY; without even the implied warranty of
15   -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16   -# GNU General Public License for more details.
17   -#
18   -# You should have received a copy of the GNU General Public License
19   -# along with this program; if not, write to the Free Software
20   -# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21   -# MA 02111-1307 USA
22   -#
23   -
24   -include $(TOPDIR)/config.mk
25   -
26   -LIB = $(obj)lib$(BOARD).o
27   -
28   -COBJS := dnp1110.o flash.o
29   -SOBJS := lowlevel_init.o
30   -
31   -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
32   -OBJS := $(addprefix $(obj),$(COBJS))
33   -SOBJS := $(addprefix $(obj),$(SOBJS))
34   -
35   -$(LIB): $(obj).depend $(OBJS) $(SOBJS)
36   - $(call cmd_link_o_target, $(OBJS) $(SOBJS))
37   -
38   -clean:
39   - rm -f $(SOBJS) $(OBJS)
40   -
41   -distclean: clean
42   - rm -f $(LIB) core *.bak $(obj).depend
43   -
44   -#########################################################################
45   -
46   -# defines $(obj).depend target
47   -include $(SRCTREE)/rules.mk
48   -
49   -sinclude $(obj).depend
50   -
51   -#########################################################################
board/dnp1110/config.mk
View file @ fc5e5ce
1   -#
2   -# DNP/1110 board with SA1100 cpu
3   -#
4   -# http://www.dilnetpc.com
5   -#
6   -
7   -#
8   -# DILNETPC has 1 banks of 32 MB DRAM
9   -#
10   -# c000'0000
11   -#
12   -# Linux-Kernel is expected to be at c000'8000, entry c000'8000
13   -#
14   -# we load ourself to c1f8'0000, the upper 1 MB of the first (only) bank
15   -#
16   -
17   -CONFIG_SYS_TEXT_BASE = 0xc1f80000
board/dnp1110/dnp1110.c
View file @ fc5e5ce
1   -/*
2   - * (C) Copyright 2002
3   - * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4   - * Marius Groeger <mgroeger@sysgo.de>
5   - *
6   - * See file CREDITS for list of people who contributed to this
7   - * project.
8   - *
9   - * This program is free software; you can redistribute it and/or
10   - * modify it under the terms of the GNU General Public License as
11   - * published by the Free Software Foundation; either version 2 of
12   - * the License, or (at your option) any later version.
13   - *
14   - * This program is distributed in the hope that it will be useful,
15   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
16   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17   - * GNU General Public License for more details.
18   - *
19   - * You should have received a copy of the GNU General Public License
20   - * along with this program; if not, write to the Free Software
21   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22   - * MA 02111-1307 USA
23   - */
24   -
25   -#include <common.h>
26   -#include <netdev.h>
27   -#include <SA-1100.h>
28   -
29   -DECLARE_GLOBAL_DATA_PTR;
30   -
31   -/*
32   - * Miscelaneous platform dependent initialisations
33   - */
34   -
35   -int board_init (void)
36   -{
37   - /* memory and cpu-speed are setup before relocation */
38   - /* so we do _nothing_ here */
39   -
40   - /* arch number of DNP1110-Board */
41   - gd->bd->bi_arch_number = MACH_TYPE_DNP1110;
42   -
43   - /* flash vpp on */
44   - PPDR |= 0x80; /* assumes LCD controller is off */
45   - PPSR |= 0x80;
46   -
47   - return 0;
48   -}
49   -
50   -int dram_init (void)
51   -{
52   - gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
53   - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
54   -
55   - return (0);
56   -}
57   -
58   -#ifdef CONFIG_CMD_NET
59   -int board_eth_init(bd_t *bis)
60   -{
61   - int rc = 0;
62   -#ifdef CONFIG_SMC91111
63   - rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
64   -#endif
65   - return rc;
66   -}
67   -#endif
board/dnp1110/flash.c
View file @ fc5e5ce
1   -/*
2   - * (C) Copyright 2001
3   - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
4   - *
5   - * (C) Copyright 2001
6   - * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7   - *
8   - * See file CREDITS for list of people who contributed to this
9   - * project.
10   - *
11   - * This program is free software; you can redistribute it and/or
12   - * modify it under the terms of the GNU General Public License as
13   - * published by the Free Software Foundation; either version 2 of
14   - * the License, or (at your option) any later version.
15   - *
16   - * This program is distributed in the hope that it will be useful,
17   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
18   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19   - * GNU General Public License for more details.
20   - *
21   - * You should have received a copy of the GNU General Public License
22   - * along with this program; if not, write to the Free Software
23   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24   - * MA 02111-1307 USA
25   - */
26   -
27   -#include <common.h>
28   -#include <linux/byteorder/swab.h>
29   -
30   -
31   -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
32   -
33   -/* Board support for 1 or 2 flash devices */
34   -#undef FLASH_PORT_WIDTH32
35   -#define FLASH_PORT_WIDTH16
36   -
37   -#ifdef FLASH_PORT_WIDTH16
38   -#define FLASH_PORT_WIDTH ushort
39   -#define FLASH_PORT_WIDTHV vu_short
40   -#define SWAP(x) __swab16(x)
41   -#else
42   -#define FLASH_PORT_WIDTH ulong
43   -#define FLASH_PORT_WIDTHV vu_long
44   -#define SWAP(x) __swab32(x)
45   -#endif
46   -
47   -#define FPW FLASH_PORT_WIDTH
48   -#define FPWV FLASH_PORT_WIDTHV
49   -
50   -#define mb() __asm__ __volatile__ ("" : : : "memory")
51   -
52   -/*-----------------------------------------------------------------------
53   - * Functions
54   - */
55   -static ulong flash_get_size (FPW *addr, flash_info_t *info);
56   -static int write_data (flash_info_t *info, ulong dest, FPW data);
57   -static void flash_get_offsets (ulong base, flash_info_t *info);
58   -void inline spin_wheel(void);
59   -
60   -/*-----------------------------------------------------------------------
61   - */
62   -
63   -unsigned long flash_init (void)
64   -{
65   - int i;
66   - ulong size = 0;
67   -
68   - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++)
69   - {
70   - switch (i)
71   - {
72   - case 0:
73   - flash_get_size((FPW *)PHYS_FLASH_1, &flash_info[i]);
74   - flash_get_offsets(PHYS_FLASH_1, &flash_info[i]);
75   - break;
76   - default:
77   - panic("configured too many flash banks!\n");
78   - break;
79   - }
80   - size += flash_info[i].size;
81   - }
82   -
83   - /* Protect monitor and environment sectors
84   - */
85   - flash_protect(FLAG_PROTECT_SET,
86   - CONFIG_SYS_FLASH_BASE,
87   - CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
88   - &flash_info[0]);
89   -
90   - flash_protect(FLAG_PROTECT_SET,
91   - CONFIG_ENV_ADDR,
92   - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
93   - &flash_info[0]);
94   -
95   - return size;
96   -}
97   -
98   -/*-----------------------------------------------------------------------
99   - */
100   -static void flash_get_offsets (ulong base, flash_info_t *info)
101   -{
102   - int i;
103   -
104   - if (info->flash_id == FLASH_UNKNOWN) {
105   - return;
106   - }
107   -
108   - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
109   - for (i = 0; i < info->sector_count; i++) {
110   - info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
111   - info->protect[i] = 0;
112   - }
113   - }
114   -}
115   -
116   -/*-----------------------------------------------------------------------
117   - */
118   -void flash_print_info (flash_info_t *info)
119   -{
120   - int i;
121   -
122   - if (info->flash_id == FLASH_UNKNOWN) {
123   - printf ("missing or unknown FLASH type\n");
124   - return;
125   - }
126   -
127   - switch (info->flash_id & FLASH_VENDMASK) {
128   - case FLASH_MAN_INTEL: printf ("INTEL "); break;
129   - default: printf ("Unknown Vendor "); break;
130   - }
131   -
132   - switch (info->flash_id & FLASH_TYPEMASK) {
133   - case FLASH_28F128J3A:
134   - printf ("28F128J3A\n"); break;
135   - default: printf ("Unknown Chip Type\n"); break;
136   - }
137   -
138   - printf (" Size: %ld MB in %d Sectors\n",
139   - info->size >> 20, info->sector_count);
140   -
141   - printf (" Sector Start Addresses:");
142   - for (i=0; i<info->sector_count; ++i) {
143   - if ((i % 5) == 0)
144   - printf ("\n ");
145   - printf (" %08lX%s",
146   - info->start[i],
147   - info->protect[i] ? " (RO)" : " "
148   - );
149   - }
150   - printf ("\n");
151   - return;
152   -}
153   -
154   -/*
155   - * The following code cannot be run from FLASH!
156   - */
157   -static ulong flash_get_size (FPW *addr, flash_info_t *info)
158   -{
159   - volatile FPW value;
160   - /* Write auto select command: read Manufacturer ID */
161   - addr[0x5555] = (FPW)0x00AA00AA;
162   - addr[0x2AAA] = (FPW)0x00550055;
163   - addr[0x5555] = (FPW)0x00900090;
164   -
165   - mb();
166   - value = addr[0];
167   -
168   - switch (value) {
169   -
170   - case (FPW)INTEL_MANUFACT:
171   - info->flash_id = FLASH_MAN_INTEL;
172   - break;
173   -
174   - default:
175   - info->flash_id = FLASH_UNKNOWN;
176   - info->sector_count = 0;
177   - info->size = 0;
178   - addr[0] = (FPW)0x00FF00FF; /* restore read mode */
179   - return (0); /* no or unknown flash */
180   - }
181   -
182   - mb();
183   - value = addr[1]; /* device ID */
184   - switch (value) {
185   -
186   - case (FPW)INTEL_ID_28F128J3A:
187   - info->flash_id += FLASH_28F128J3A;
188   - info->sector_count = 128;
189   - info->size = 0x02000000;
190   - break; /* => 16 MB */
191   -
192   - default:
193   - info->flash_id = FLASH_UNKNOWN;
194   - break;
195   - }
196   -
197   - if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
198   - printf ("** ERROR: sector count %d > max (%d) **\n",
199   - info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
200   - info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
201   - }
202   -
203   - addr[0] = (FPW)0x00FF00FF; /* restore read mode */
204   -
205   - return (info->size);
206   -}
207   -
208   -
209   -/*-----------------------------------------------------------------------
210   - */
211   -
212   -int flash_erase (flash_info_t *info, int s_first, int s_last)
213   -{
214   - int flag, prot, sect;
215   - ulong type, start;
216   - int rcode = 0;
217   -
218   - if ((s_first < 0) || (s_first > s_last)) {
219   - if (info->flash_id == FLASH_UNKNOWN) {
220   - printf ("- missing\n");
221   - } else {
222   - printf ("- no sectors to erase\n");
223   - }
224   - return 1;
225   - }
226   -
227   - type = (info->flash_id & FLASH_VENDMASK);
228   - if ((type != FLASH_MAN_INTEL)) {
229   - printf ("Can't erase unknown flash type %08lx - aborted\n",
230   - info->flash_id);
231   - return 1;
232   - }
233   -
234   - prot = 0;
235   - for (sect=s_first; sect<=s_last; ++sect) {
236   - if (info->protect[sect]) {
237   - prot++;
238   - }
239   - }
240   -
241   - if (prot) {
242   - printf ("- Warning: %d protected sectors will not be erased!\n",
243   - prot);
244   - } else {
245   - printf ("\n");
246   - }
247   -
248   - /* Disable interrupts which might cause a timeout here */
249   - flag = disable_interrupts();
250   -
251   - /* Start erase on unprotected sectors */
252   - for (sect = s_first; sect<=s_last; sect++) {
253   - if (info->protect[sect] == 0) { /* not protected */
254   - FPWV *addr = (FPWV *)(info->start[sect]);
255   - FPW status;
256   -
257   - printf("Erasing sector %2d ... ", sect);
258   -
259   - /* arm simple, non interrupt dependent timer */
260   - start = get_timer(0);
261   -
262   - *addr = (FPW)0x00500050; /* clear status register */
263   - *addr = (FPW)0x00200020; /* erase setup */
264   - *addr = (FPW)0x00D000D0; /* erase confirm */
265   -
266   - while (((status = *addr) & (FPW)0x00800080) != (FPW)0x00800080) {
267   - if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
268   - printf ("Timeout\n");
269   - *addr = (FPW)0x00B000B0; /* suspend erase */
270   - *addr = (FPW)0x00FF00FF; /* reset to read mode */
271   - rcode = 1;
272   - break;
273   - }
274   - }
275   -
276   - *addr = (FPW)0x00500050; /* clear status register cmd. */
277   - *addr = (FPW)0x00FF00FF; /* resest to read mode */
278   -
279   - printf (" done\n");
280   - }
281   - }
282   - return rcode;
283   -}
284   -
285   -/*-----------------------------------------------------------------------
286   - * Copy memory to flash, returns:
287   - * 0 - OK
288   - * 1 - write timeout
289   - * 2 - Flash not erased
290   - * 4 - Flash not identified
291   - */
292   -
293   -int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
294   -{
295   - ulong cp, wp;
296   - FPW data;
297   - int count, i, l, rc, port_width;
298   -
299   - if (info->flash_id == FLASH_UNKNOWN) {
300   - return 4;
301   - }
302   -/* get lower word aligned address */
303   -#ifdef FLASH_PORT_WIDTH16
304   - wp = (addr & ~1);
305   - port_width = 2;
306   -#else
307   - wp = (addr & ~3);
308   - port_width = 4;
309   -#endif
310   -
311   - /*
312   - * handle unaligned start bytes
313   - */
314   - if ((l = addr - wp) != 0) {
315   - data = 0;
316   - for (i=0, cp=wp; i<l; ++i, ++cp) {
317   - data = (data << 8) | (*(uchar *)cp);
318   - }
319   - for (; i<port_width && cnt>0; ++i) {
320   - data = (data << 8) | *src++;
321   - --cnt;
322   - ++cp;
323   - }
324   - for (; cnt==0 && i<port_width; ++i, ++cp) {
325   - data = (data << 8) | (*(uchar *)cp);
326   - }
327   -
328   - if ((rc = write_data(info, wp, SWAP(data))) != 0) {
329   - return (rc);
330   - }
331   - wp += port_width;
332   - }
333   -
334   - /*
335   - * handle word aligned part
336   - */
337   - count = 0;
338   - while (cnt >= port_width) {
339   - data = 0;
340   - for (i=0; i<port_width; ++i) {
341   - data = (data << 8) | *src++;
342   - }
343   - if ((rc = write_data(info, wp, SWAP(data))) != 0) {
344   - return (rc);
345   - }
346   - wp += port_width;
347   - cnt -= port_width;
348   - if (count++ > 0x800)
349   - {
350   - spin_wheel();
351   - count = 0;
352   - }
353   - }
354   -
355   - if (cnt == 0) {
356   - return (0);
357   - }
358   -
359   - /*
360   - * handle unaligned tail bytes
361   - */
362   - data = 0;
363   - for (i=0, cp=wp; i<port_width && cnt>0; ++i, ++cp) {
364   - data = (data << 8) | *src++;
365   - --cnt;
366   - }
367   - for (; i<port_width; ++i, ++cp) {
368   - data = (data << 8) | (*(uchar *)cp);
369   - }
370   -
371   - return (write_data(info, wp, SWAP(data)));
372   -}
373   -
374   -/*-----------------------------------------------------------------------
375   - * Write a word or halfword to Flash, returns:
376   - * 0 - OK
377   - * 1 - write timeout
378   - * 2 - Flash not erased
379   - */
380   -static int write_data (flash_info_t *info, ulong dest, FPW data)
381   -{
382   - FPWV *addr = (FPWV *)dest;
383   - ulong status;
384   - int flag;
385   - ulong start;
386   -
387   - /* Check if Flash is (sufficiently) erased */
388   - if ((*addr & data) != data) {
389   - printf("not erased at %08lx (%x)\n",(ulong)addr,*addr);
390   - return (2);
391   - }
392   - /* Disable interrupts which might cause a timeout here */
393   - flag = disable_interrupts();
394   -
395   - *addr = (FPW)0x00400040; /* write setup */
396   - *addr = data;
397   -
398   - /* arm simple, non interrupt dependent timer */
399   - start = get_timer(0);
400   -
401   - /* wait while polling the status register */
402   - while (((status = *addr) & (FPW)0x00800080) != (FPW)0x00800080) {
403   - if (start = get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
404   - *addr = (FPW)0x00FF00FF; /* restore read mode */
405   - return (1);
406   - }
407   - }
408   -
409   - *addr = (FPW)0x00FF00FF; /* restore read mode */
410   -
411   - return (0);
412   -}
413   -
414   -void inline
415   -spin_wheel(void)
416   -{
417   - static int p=0;
418   - static char w[] = "\\/-";
419   -
420   - printf("\010%c", w[p]);
421   - (++p == 3) ? (p = 0) : 0;
422   -}
board/dnp1110/lowlevel_init.S
View file @ fc5e5ce
1   -/*
2   - * Memory Setup stuff - taken from blob memsetup.S
3   - *
4   - * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
5   - * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
6   - *
7   - * See file CREDITS for list of people who contributed to this
8   - * project.
9   - *
10   - * This program is free software; you can redistribute it and/or
11   - * modify it under the terms of the GNU General Public License as
12   - * published by the Free Software Foundation; either version 2 of
13   - * the License, or (at your option) any later version.
14   - *
15   - * This program is distributed in the hope that it will be useful,
16   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
17   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18   - * GNU General Public License for more details.
19   - *
20   - * You should have received a copy of the GNU General Public License
21   - * along with this program; if not, write to the Free Software
22   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23   - * MA 02111-1307 USA
24   - */
25   -
26   -
27   -#include "config.h"
28   -#include "version.h"
29   -
30   -
31   -/* some parameters for the board */
32   -
33   -MEM_BASE: .long 0xa0000000
34   -MEM_START: .long 0xc0000000
35   -
36   -#define MDCNFG 0x00
37   -#define MDCAS00 0x04 /* CAS waveform rotate reg 0 */
38   -#define MDCAS01 0x08 /* CAS waveform rotate reg 1 bank */
39   -#define MDCAS02 0x0C /* CAS waveform rotate reg 2 bank */
40   -#define MDREFR 0x1C /* DRAM refresh control reg */
41   -#define MDCAS20 0x20 /* CAS waveform rotate reg 0 bank */
42   -#define MDCAS21 0x24 /* CAS waveform rotate reg 1 bank */
43   -#define MDCAS22 0x28 /* CAS waveform rotate reg 2 bank */
44   -#define MECR 0x18 /* Expansion memory (PCMCIA) bus configuration register */
45   -#define MSC0 0x10 /* static memory control reg 0 */
46   -#define MSC1 0x14 /* static memory control reg 1 */
47   -#define MSC2 0x2C /* static memory control reg 2 */
48   -#define SMCNFG 0x30 /* SMROM configuration reg */
49   -
50   -mdcas00: .long 0x5555557F
51   -mdcas01: .long 0x55555555
52   -mdcas02: .long 0x55555555
53   -mdcas20: .long 0x5555557F
54   -mdcas21: .long 0x55555555
55   -mdcas22: .long 0x55555555
56   -mdcnfg: .long 0x0000B25C
57   -mdrefr: .long 0x007000C1
58   -mecr: .long 0x10841084
59   -msc0: .long 0x00004774
60   -msc1: .long 0x00000000
61   -msc2: .long 0x00000000
62   -smcnfg: .long 0x00000000
63   -
64   -/* setting up the memory */
65   -
66   -.globl lowlevel_init
67   -lowlevel_init:
68   -
69   - ldr r0, MEM_BASE
70   -
71   - /* Set up the DRAM */
72   -
73   - /* MDCAS00 */
74   - ldr r1, mdcas00
75   - str r1, [r0, #MDCAS00]
76   -
77   - /* MDCAS01 */
78   - ldr r1, mdcas01
79   - str r1, [r0, #MDCAS01]
80   -
81   - /* MDCAS02 */
82   - ldr r1, mdcas02
83   - str r1, [r0, #MDCAS02]
84   -
85   - /* MDCAS20 */
86   - ldr r1, mdcas20
87   - str r1, [r0, #MDCAS20]
88   -
89   - /* MDCAS21 */
90   - ldr r1, mdcas21
91   - str r1, [r0, #MDCAS21]
92   -
93   - /* MDCAS22 */
94   - ldr r1, mdcas22
95   - str r1, [r0, #MDCAS22]
96   -
97   - /* MDREFR */
98   - ldr r1, mdrefr
99   - str r1, [r0, #MDREFR]
100   -
101   - /* Set up PCMCIA space */
102   - ldr r1, mecr
103   - str r1, [r0, #MECR]
104   -
105   - /* Setup the flash memory and other */
106   - ldr r1, msc0
107   - str r1, [r0, #MSC0]
108   -
109   - ldr r1, msc1
110   - str r1, [r0, #MSC1]
111   -
112   - ldr r1, msc2
113   - str r1, [r0, #MSC2]
114   -
115   - ldr r1, smcnfg
116   - str r1, [r0, #SMCNFG]
117   -
118   - /* MDCNFG */
119   - ldr r1, mdcnfg
120   - bic r1, r1, #0x00000001
121   - str r1, [r0, #MDCNFG]
122   -
123   - /* Load something to activate bank */
124   - ldr r2, MEM_START
125   -.rept 8
126   - ldr r1, [r2]
127   -.endr
128   -
129   - /* MDCNFG */
130   - ldr r1, mdcnfg
131   - orr r1, r1, #0x00000001
132   - str r1, [r0, #MDCNFG]
133   -
134   - /* everything is fine now */
135   - mov pc, lr
... ... @@ -221,7 +221,6 @@
221 221 xm250 arm pxa
222 222 zipitz2 arm pxa
223 223 zylonite arm pxa
224   -dnp1110 arm sa1100
225 224 gcplus arm sa1100
226 225 jornada arm sa1100
227 226 lart arm sa1100
doc/README.scrapyard
Diff comments   View file @ fc5e5ce
... ... @@ -11,6 +11,7 @@
11 11  
12 12 Board Arch CPU removed Commit last known maintainer/contact
13 13 =============================================================================
  14 +dnp1110 arm sa1100 - 2011-09-05 Alex Züpke <azu@sysgo.de>
14 15 SMN42 arm arm720t - 2011-09-05
15 16 at91rm9200dk arm arm920t 1c85752 2011-07-17
16 17 m501sk arm arm920t b1a2bd4 2011-07-17
include/configs/dnp1110.h
View file @ fc5e5ce
1   -/*
2   - * (C) Copyright 2002
3   - * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4   - * Rolf Offermanns <rof@sysgo.de>
5   - *
6   - * Configuation settings for the SSV DNP1110 board.
7   - *
8   - * See file CREDITS for list of people who contributed to this
9   - * project.
10   - *
11   - * This program is free software; you can redistribute it and/or
12   - * modify it under the terms of the GNU General Public License as
13   - * published by the Free Software Foundation; either version 2 of
14   - * the License, or (at your option) any later version.
15   - *
16   - * This program is distributed in the hope that it will be useful,
17   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
18   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19   - * GNU General Public License for more details.
20   - *
21   - * You should have received a copy of the GNU General Public License
22   - * along with this program; if not, write to the Free Software
23   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24   - * MA 02111-1307 USA
25   - */
26   -
27   -#ifndef __CONFIG_H
28   -#define __CONFIG_H
29   -
30   -/*
31   - * If we are developing, we might want to start armboot from ram
32   - * so we MUST NOT initialize critical regs like mem-timing ...
33   - */
34   -#define CONFIG_SKIP_LOWLEVEL_INIT 1
35   -
36   -/*
37   - * High Level Configuration Options
38   - * (easy to change)
39   - */
40   -#define CONFIG_SA1110 1 /* This is an SA1110 CPU */
41   -#define CONFIG_DNP1110 1 /* on an DNP/1110 Board */
42   -
43   -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
44   -/* we will never enable dcache, because we have to setup MMU first */
45   -#define CONFIG_SYS_DCACHE_OFF
46   -
47   -/*
48   - * Size of malloc() pool
49   - */
50   -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
51   -
52   -/*
53   - * Hardware drivers
54   - */
55   -#define CONFIG_NET_MULTI
56   -#define CONFIG_SMC91111
57   -#define CONFIG_SMC91111_BASE 0x20000300
58   -
59   -
60   -/*
61   - * select serial console configuration
62   - */
63   -#define CONFIG_SA1100_SERIAL
64   -#define CONFIG_SERIAL1 1 /* we use SERIAL 1 */
65   -
66   -/* allow to overwrite serial and ethaddr */
67   -#define CONFIG_ENV_OVERWRITE
68   -
69   -#define CONFIG_BAUDRATE 115200
70   -
71   -
72   -/*
73   - * BOOTP options
74   - */
75   -#define CONFIG_BOOTP_BOOTFILESIZE
76   -#define CONFIG_BOOTP_BOOTPATH
77   -#define CONFIG_BOOTP_GATEWAY
78   -#define CONFIG_BOOTP_HOSTNAME
79   -
80   -
81   -/*
82   - * Command line configuration.
83   - */
84   -#include <config_cmd_default.h>
85   -
86   -
87   -#define CONFIG_BOOTDELAY 3
88   -#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,115200"
89   -#define CONFIG_ETHADDR 02:80:ad:20:31:b8
90   -#define CONFIG_NETMASK 255.255.0.0
91   -#define CONFIG_IPADDR 172.22.2.23
92   -#define CONFIG_SERVERIP 172.22.2.22
93   -#define CONFIG_BOOTFILE "dnp1110"
94   -#define CONFIG_BOOTCOMMAND "tftp; bootm"
95   -
96   -#if defined(CONFIG_CMD_KGDB)
97   -#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
98   -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
99   -#endif
100   -
101   -/*
102   - * Miscellaneous configurable options
103   - */
104   -#define CONFIG_SYS_LONGHELP /* undef to save memory */
105   -#define CONFIG_SYS_PROMPT "DNP1110 # " /* Monitor Command Prompt */
106   -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
107   -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
108   -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
109   -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
110   -
111   -#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */
112   -#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
113   -
114   -#define CONFIG_SYS_LOAD_ADDR 0xc0200000 /* default load address */
115   -
116   -#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */
117   -#define CONFIG_SYS_CPUSPEED 0x0b /* set core clock to 220 MHz */
118   -
119   - /* valid baudrates */
120   -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
121   -
122   -/*-----------------------------------------------------------------------
123   - * Stack sizes
124   - *
125   - * The stack sizes are set up in start.S using the settings below
126   - */
127   -#define CONFIG_STACKSIZE (128*1024) /* regular stack */
128   -#ifdef CONFIG_USE_IRQ
129   -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
130   -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
131   -#endif
132   -
133   -/*-----------------------------------------------------------------------
134   - * Physical Memory Map
135   - */
136   -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 banks of DRAM */
137   -#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */
138   -#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
139   -
140   -
141   -#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
142   -#define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */
143   -#define PHYS_FLASH_BANK_SIZE 0x01000000 /* 32 MB Banks */
144   -#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */
145   -
146   -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
147   -
148   -/*-----------------------------------------------------------------------
149   - * FLASH and environment organization
150   - */
151   -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
152   -#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
153   -
154   -/* timeout values are in ticks */
155   -#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
156   -#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
157   -
158   -#define CONFIG_ENV_IS_IN_FLASH 1
159   -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0xF80000) /* Addr of Environment Sector */
160   -#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
161   -
162   -#endif /* __CONFIG_H */