Eric Lee / smarc-uboot

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Commit fc8991c61c393ce6a9d3dfc97cb56dbbd9e8cbba

Authored by Hans de Goede
1 parent 948603d4d6
Exists in v2017.01-smarct4x and in 29 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-n7.1.2_2.0.0-ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

sunxi: Fix gmac not working due to cpu_eth_init no longer being called 

cpu_eth_init is no longer called for dm enabled eth drivers, this
was causing the sunxi gmac eth controller to no longer work in u-boot.

This commit fixes this by calling the clock, reset and pinmux setup
function from s_init() and enabling the phy power pin (if any) from
board_init().

The enabling of phy power cannot be done from s_init because it uses dm
and dm is not ready yet at this point.

Note that the mdelay is dropped as the phy gets enabled much earlier
now, so it is no longer needed.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Tested-by: Karsten Merker <merker@debian.org>
Tested-by: Michael Haas <haas@computerlinguist.org>

Showing 4 changed files with 12 additions and 41 deletions Side-by-side Diff

arch/arm/cpu/armv7/sunxi/board.c
Diff comments   View file @ fc8991c
... ... @@ -152,6 +152,7 @@
152 152 timer_init();
153 153 gpio_init();
154 154 i2c_init_board();
  155 + eth_init_board();
155 156 }
156 157  
157 158 #ifdef CONFIG_SPL_BUILD
... ... @@ -257,33 +258,6 @@
257 258 {
258 259 /* Enable D-cache. I-cache is already enabled in start.S */
259 260 dcache_enable();
260   -}
261   -#endif
262   -
263   -#ifdef CONFIG_CMD_NET
264   -/*
265   - * Initializes on-chip ethernet controllers.
266   - * to override, implement board_eth_init()
267   - */
268   -int cpu_eth_init(bd_t *bis)
269   -{
270   - __maybe_unused int rc;
271   -
272   -#ifdef CONFIG_MACPWR
273   - gpio_request(CONFIG_MACPWR, "macpwr");
274   - gpio_direction_output(CONFIG_MACPWR, 1);
275   - mdelay(200);
276   -#endif
277   -
278   -#ifdef CONFIG_SUNXI_GMAC
279   - rc = sunxi_gmac_initialize(bis);
280   - if (rc < 0) {
281   - printf("sunxi: failed to initialize gmac\n");
282   - return rc;
283   - }
284   -#endif
285   -
286   - return 0;
287 261 }
288 262 #endif
arch/arm/include/asm/arch-sunxi/sys_proto.h
Diff comments   View file @ fc8991c
... ... @@ -24,7 +24,11 @@
24 24 void return_to_fel(uint32_t lr, uint32_t sp);
25 25  
26 26 /* Board / SoC level designware gmac init */
27   -int sunxi_gmac_initialize(bd_t *bis);
  27 +#if !defined CONFIG_SPL_BUILD && defined CONFIG_SUNXI_GMAC
  28 +void eth_init_board(void);
  29 +#else
  30 +static inline void eth_init_board(void) {}
  31 +#endif
28 32  
29 33 #endif
... ... @@ -90,6 +90,11 @@
90 90 if (ret)
91 91 return ret;
92 92  
  93 +#ifdef CONFIG_MACPWR
  94 + gpio_request(CONFIG_MACPWR, "macpwr");
  95 + gpio_direction_output(CONFIG_MACPWR, 1);
  96 +#endif
  97 +
93 98 /* Uses dm gpio code so do this here and not in i2c_init_board() */
94 99 return soft_i2c_board_init();
95 100 }
... ... @@ -6,7 +6,7 @@
6 6 #include <asm/arch/clock.h>
7 7 #include <asm/arch/gpio.h>
8 8  
9   -int sunxi_gmac_initialize(bd_t *bis)
  9 +void eth_init_board(void)
10 10 {
11 11 int pin;
12 12 struct sunxi_ccm_reg *const ccm =
... ... @@ -78,18 +78,6 @@
78 78 sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC);
79 79 for (pin = SUNXI_GPA(26); pin <= SUNXI_GPA(27); pin++)
80 80 sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC);
81   -#endif
82   -
83   -#ifdef CONFIG_DM_ETH
84   - return 0;
85   -#else
86   -# ifdef CONFIG_RGMII
87   - return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_RGMII);
88   -# elif defined CONFIG_GMII
89   - return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_GMII);
90   -# else
91   - return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_MII);
92   -# endif
93 81 #endif
94 82 }