Merge branch 'master' of git://git.denx.de/u-boot-arm

Tom Rini
2 parents f3a05c8f94 8bc347e2ec
Showing 9 changed files Side-by-side Diff
Kconfig
arch/arm/Kconfig
arch/arm/cpu/armv7/Kconfig
arch/arm/cpu/armv7/exynos/Kconfig
arch/arm/lib/bootm.c
board/sunxi/Kconfig
include/configs/arndale.h
include/configs/sun7i.h
include/configs/vexpress_ca15_tc2.h
@@ -58,6 +58,14 @@
  
 endmenu		# General setup
  
+menuconfig EXPERT
+        bool "Configure standard U-Boot features (expert users)"
+        help
+          This option allows certain base U-Boot options and settings
+          to be disabled or tweaked. This is for specialized
+          environments which can tolerate a "non-standard" U-Boot.
+          Only use this if you really know what you are doing.
+
 menu "Boot images"
  
 config SPL_BUILD
@@ -415,6 +415,8 @@
 config TARGET_VEXPRESS_CA15_TC2
 	bool "Support vexpress_ca15_tc2"
 	select CPU_V7
+	select CPU_V7_HAS_NONSEC
+	select CPU_V7_HAS_VIRT
  
 config TARGET_VEXPRESS_CA5X2
 	bool "Support vexpress_ca5x2"
@@ -825,6 +827,8 @@
 source "arch/arm/cpu/arm926ejs/versatile/Kconfig"
  
 source "arch/arm/cpu/armv7/zynq/Kconfig"
+
+source "arch/arm/cpu/armv7/Kconfig"
  
 source "board/aristainetos/Kconfig"
 source "board/BuR/kwb/Kconfig"
+if CPU_V7
+
+config CPU_V7_HAS_NONSEC
+        bool
+
+config CPU_V7_HAS_VIRT
+        bool
+
+config ARMV7_NONSEC
+	boolean "Enable support for booting in non-secure mode" if EXPERT
+	depends on CPU_V7_HAS_NONSEC
+	default y
+	---help---
+	Say Y here to enable support for booting in non-secure / SVC mode.
+
+config ARMV7_BOOT_SEC_DEFAULT
+	boolean "Boot in secure mode by default" if EXPERT
+	depends on ARMV7_NONSEC
+	default n
+	---help---
+	Say Y here to boot in secure mode by default even if non-secure mode
+	is supported. This option is useful to boot kernels which do not
+	suppport booting in non-secure mode. Only set this if you need it.
+	This can be overriden at run-time by setting the bootm_boot_mode env.
+	variable to "sec" or "nonsec".
+
+config ARMV7_VIRT
+	boolean "Enable support for hardware virtualization" if EXPERT
+	depends on CPU_V7_HAS_VIRT && ARMV7_NONSEC
+	default y
+	---help---
+	Say Y here to boot in hypervisor (HYP) mode when booting non-secure.
+
+endif
@@ -26,6 +26,8 @@
  
 config TARGET_ARNDALE
 	bool "Exynos5250 Arndale board"
+	select CPU_V7_HAS_NONSEC
+	select CPU_V7_HAS_VIRT
 	select SUPPORT_SPL
 	select OF_CONTROL if !SPL_BUILD
  
@@ -237,6 +237,26 @@
 	}
 }
  
+#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
+static bool boot_nonsec(void)
+{
+	char *s = getenv("bootm_boot_mode");
+#ifdef CONFIG_ARMV7_BOOT_SEC_DEFAULT
+	bool nonsec = false;
+#else
+	bool nonsec = true;
+#endif
+
+	if (s && !strcmp(s, "sec"))
+		nonsec = false;
+
+	if (s && !strcmp(s, "nonsec"))
+		nonsec = true;
+
+	return nonsec;
+}
+#endif
+
 /* Subcommand: GO */
 static void boot_jump_linux(bootm_headers_t *images, int flag)
 {
  
@@ -285,12 +305,13 @@
  
 	if (!fake) {
 #if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
-		armv7_init_nonsec();
-		secure_ram_addr(_do_nonsec_entry)(kernel_entry,
-						  0, machid, r2);
-#else
-		kernel_entry(0, machid, r2);
+		if (boot_nonsec()) {
+			armv7_init_nonsec();
+			secure_ram_addr(_do_nonsec_entry)(kernel_entry,
+							  0, machid, r2);
+		} else
 #endif
+			kernel_entry(0, machid, r2);
 	}
 #endif
 }
@@ -21,6 +21,8 @@
 config MACH_SUN7I
 	bool "sun7i (Allwinner A20)"
 	select CPU_V7
+	select CPU_V7_HAS_NONSEC
+	select CPU_V7_HAS_VIRT
 	select SUPPORT_SPL
  
 config MACH_SUN8I
@@ -60,7 +60,5 @@
 /* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */
 #define CONFIG_ARM_GIC_BASE_ADDRESS	0x10480000
  
-#define CONFIG_ARMV7_VIRT
-
 #endif	/* __CONFIG_H */
@@ -22,8 +22,6 @@
 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
 #endif
  
-#define CONFIG_ARMV7_VIRT		1
-#define CONFIG_ARMV7_NONSEC		1
 #define CONFIG_ARMV7_PSCI		1
 #define CONFIG_ARMV7_PSCI_NR_CPUS	2
 #define CONFIG_ARMV7_SECURE_BASE	SUNXI_SRAM_B_BASE
@@ -18,7 +18,5 @@
 #define CONFIG_SYSFLAGS_ADDR	0x1c010030
 #define CONFIG_SMP_PEN_ADDR	CONFIG_SYSFLAGS_ADDR
  
-#define CONFIG_ARMV7_VIRT
-
 #endif
...	...	@@ -58,6 +58,14 @@
58	58
59	59	endmenu # General setup
60	60
	61	+menuconfig EXPERT
	62	+ bool "Configure standard U-Boot features (expert users)"
	63	+ help
	64	+ This option allows certain base U-Boot options and settings
	65	+ to be disabled or tweaked. This is for specialized
	66	+ environments which can tolerate a "non-standard" U-Boot.
	67	+ Only use this if you really know what you are doing.
	68	+
61	69	menu "Boot images"
62	70
63	71	config SPL_BUILD
...	...	@@ -415,6 +415,8 @@
415	415	config TARGET_VEXPRESS_CA15_TC2
416	416	bool "Support vexpress_ca15_tc2"
417	417	select CPU_V7
	418	+ select CPU_V7_HAS_NONSEC
	419	+ select CPU_V7_HAS_VIRT
418	420
419	421	config TARGET_VEXPRESS_CA5X2
420	422	bool "Support vexpress_ca5x2"
...	...	@@ -825,6 +827,8 @@
825	827	source "arch/arm/cpu/arm926ejs/versatile/Kconfig"
826	828
827	829	source "arch/arm/cpu/armv7/zynq/Kconfig"
	830	+
	831	+source "arch/arm/cpu/armv7/Kconfig"
828	832
829	833	source "board/aristainetos/Kconfig"
830	834	source "board/BuR/kwb/Kconfig"
	1	+if CPU_V7
	2	+
	3	+config CPU_V7_HAS_NONSEC
	4	+ bool
	5	+
	6	+config CPU_V7_HAS_VIRT
	7	+ bool
	8	+
	9	+config ARMV7_NONSEC
	10	+ boolean "Enable support for booting in non-secure mode" if EXPERT
	11	+ depends on CPU_V7_HAS_NONSEC
	12	+ default y
	13	+ ---help---
	14	+ Say Y here to enable support for booting in non-secure / SVC mode.
	15	+
	16	+config ARMV7_BOOT_SEC_DEFAULT
	17	+ boolean "Boot in secure mode by default" if EXPERT
	18	+ depends on ARMV7_NONSEC
	19	+ default n
	20	+ ---help---
	21	+ Say Y here to boot in secure mode by default even if non-secure mode
	22	+ is supported. This option is useful to boot kernels which do not
	23	+ suppport booting in non-secure mode. Only set this if you need it.
	24	+ This can be overriden at run-time by setting the bootm_boot_mode env.
	25	+ variable to "sec" or "nonsec".
	26	+
	27	+config ARMV7_VIRT
	28	+ boolean "Enable support for hardware virtualization" if EXPERT
	29	+ depends on CPU_V7_HAS_VIRT && ARMV7_NONSEC
	30	+ default y
	31	+ ---help---
	32	+ Say Y here to boot in hypervisor (HYP) mode when booting non-secure.
	33	+
	34	+endif
...	...	@@ -26,6 +26,8 @@
26	26
27	27	config TARGET_ARNDALE
28	28	bool "Exynos5250 Arndale board"
	29	+ select CPU_V7_HAS_NONSEC
	30	+ select CPU_V7_HAS_VIRT
29	31	select SUPPORT_SPL
30	32	select OF_CONTROL if !SPL_BUILD
31	33
...	...	@@ -237,6 +237,26 @@
237	237	}
238	238	}
239	239
	240	+#if defined(CONFIG_ARMV7_NONSEC) \|\| defined(CONFIG_ARMV7_VIRT)
	241	+static bool boot_nonsec(void)
	242	+{
	243	+ char *s = getenv("bootm_boot_mode");
	244	+#ifdef CONFIG_ARMV7_BOOT_SEC_DEFAULT
	245	+ bool nonsec = false;
	246	+#else
	247	+ bool nonsec = true;
	248	+#endif
	249	+
	250	+ if (s && !strcmp(s, "sec"))
	251	+ nonsec = false;
	252	+
	253	+ if (s && !strcmp(s, "nonsec"))
	254	+ nonsec = true;
	255	+
	256	+ return nonsec;
	257	+}
	258	+#endif
	259	+
240	260	/* Subcommand: GO */
241	261	static void boot_jump_linux(bootm_headers_t *images, int flag)
242	262	{
243	263
...	...	@@ -285,12 +305,13 @@
285	305
286	306	if (!fake) {
287	307	#if defined(CONFIG_ARMV7_NONSEC) \|\| defined(CONFIG_ARMV7_VIRT)
288		- armv7_init_nonsec();
289		- secure_ram_addr(_do_nonsec_entry)(kernel_entry,
290		- 0, machid, r2);
291		-#else
292		- kernel_entry(0, machid, r2);
	308	+ if (boot_nonsec()) {
	309	+ armv7_init_nonsec();
	310	+ secure_ram_addr(_do_nonsec_entry)(kernel_entry,
	311	+ 0, machid, r2);
	312	+ } else
293	313	#endif
	314	+ kernel_entry(0, machid, r2);
294	315	}
295	316	#endif
296	317	}
...	...	@@ -21,6 +21,8 @@
21	21	config MACH_SUN7I
22	22	bool "sun7i (Allwinner A20)"
23	23	select CPU_V7
	24	+ select CPU_V7_HAS_NONSEC
	25	+ select CPU_V7_HAS_VIRT
24	26	select SUPPORT_SPL
25	27
26	28	config MACH_SUN8I
...	...	@@ -60,7 +60,5 @@
60	60	/* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */
61	61	#define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000
62	62
63		-#define CONFIG_ARMV7_VIRT
64		-
65	63	#endif /* __CONFIG_H */
...	...	@@ -22,8 +22,6 @@
22	22	#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
23	23	#endif
24	24
25		-#define CONFIG_ARMV7_VIRT 1
26		-#define CONFIG_ARMV7_NONSEC 1
27	25	#define CONFIG_ARMV7_PSCI 1
28	26	#define CONFIG_ARMV7_PSCI_NR_CPUS 2
29	27	#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE
...	...	@@ -18,7 +18,5 @@
18	18	#define CONFIG_SYSFLAGS_ADDR 0x1c010030
19	19	#define CONFIG_SMP_PEN_ADDR CONFIG_SYSFLAGS_ADDR
20	20
21		-#define CONFIG_ARMV7_VIRT
22		-
23	21	#endif