rockchip: rk3036: sdram: correct setting for pll integer mode

According to rk3036 TRM, should be set to '1' for the pll integer mode, while the '0' means the frac mode. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

rockchip: rk3036: sdram: correct setting for pll integer mode
According to rk3036 TRM, should be set to '1' for the pll integer mode, while the '0' means the frac mode. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang · Philipp Tomsich
1 parent 731cafecc5
Showing 1 changed file with 1 additions and 1 deletions Side-by-side Diff
arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
@@ -334,7 +334,7 @@
 		     DPLL_MODE_SLOW << DPLL_MODE_SHIFT);
  
 	/* use integer mode */
-	rk_clrreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
+	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
  
 	rk_clrsetreg(&pll->con0,
 		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,
...	...	@@ -334,7 +334,7 @@
334	334	DPLL_MODE_SLOW << DPLL_MODE_SHIFT);
335	335
336	336	/* use integer mode */
337		- rk_clrreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
	337	+ rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
338	338
339	339	rk_clrsetreg(&pll->con0,
340	340	PLL_POSTDIV1_MASK \| PLL_FBDIV_MASK,