Eric Lee / smarc-uboot

Download as
Browse Code ยป

Commit fd1f9177abdfab23ae124b8f41583c578cfe0b2e

Authored by Ye Li
1 parent 0dd8cc03ec
Exists in smarc-8m-android-10.0.0_2.6.0 and in 1 other branch 8qm-imx_v2020.04_5.4.70_2.3.0

MLK-24157 ulp_wdog: Fix unaligned access to cs2 reg 

Patch "MLK-22755 mx7ulp: wdog: Wait for WDOG unlock and
reconfiguration to complete",  added some flags checking
to WDOG driver. But the cs2 register access is wrong, should
use "readb" not "readl".

This is fine for some compilers (like gcc8.2, gcc9.2) which
adjusts the access to "ldrb" instruction. However for old
compilers (like gcc4.9), it won't fix the instruction and cause
data abort.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

Showing 1 changed file with 4 additions and 4 deletions Side-by-side Diff

drivers/watchdog/ulp_wdog.c
Diff comments   View file @ fd1f917
... ... @@ -71,7 +71,7 @@
71 71 dmb();
72 72  
73 73 /* Wait WDOG Unlock */
74   - while (!(readl(&wdog->cs2) & WDGCS2_ULK));
  74 + while (!(readb(&wdog->cs2) & WDGCS2_ULK));
75 75  
76 76 val = readb(&wdog->cs2);
77 77 val |= WDGCS2_FLG;
... ... @@ -84,7 +84,7 @@
84 84 writeb((WDGCS1_WDGE | WDGCS1_WDGUPDATE), &wdog->cs1);/* enable counter running */
85 85  
86 86 /* Wait WDOG reconfiguration */
87   - while (!(readl(&wdog->cs2) & WDGCS2_RCS));
  87 + while (!(readb(&wdog->cs2) & WDGCS2_RCS));
88 88  
89 89 hw_watchdog_reset();
90 90 }
... ... @@ -99,7 +99,7 @@
99 99 dmb();
100 100  
101 101 /* Wait WDOG Unlock */
102   - while (!(readl(&wdog->cs2) & WDGCS2_ULK));
  102 + while (!(readb(&wdog->cs2) & WDGCS2_ULK));
103 103  
104 104 hw_watchdog_set_timeout(5); /* 5ms timeout */
105 105 writel(0, &wdog->win);
... ... @@ -108,7 +108,7 @@
108 108 writeb(WDGCS1_WDGE, &wdog->cs1);/* enable counter running */
109 109  
110 110 /* Wait WDOG reconfiguration */
111   - while (!(readl(&wdog->cs2) & WDGCS2_RCS));
  111 + while (!(readb(&wdog->cs2) & WDGCS2_RCS));
112 112  
113 113 hw_watchdog_reset();
114 114