Commit fd998418084a9ac0928b4032ce0bb8bee8c9323b
Committed by
Neil Armstrong
1 parent
335d287327
Exists in
smarc_8mq_lf_v2020.04
and in
11 other branches
video: dw_hdmi: support SoC specific read/write ops
Some IPs like the meson VPU have a specific way to write to dw_hdmi registers. Make it configurable. Signed-off-by: Jorge Ramirez-Ortiz <jramirez@baylibre.com> [added commit description] Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
Showing 2 changed files with 14 additions and 2 deletions Side-by-side Diff
drivers/video/dw_hdmi.c
... | ... | @@ -52,7 +52,7 @@ |
52 | 52 | } |
53 | 53 | }; |
54 | 54 | |
55 | -static void hdmi_write(struct dw_hdmi *hdmi, u8 val, int offset) | |
55 | +static void dw_hdmi_write(struct dw_hdmi *hdmi, u8 val, int offset) | |
56 | 56 | { |
57 | 57 | switch (hdmi->reg_io_width) { |
58 | 58 | case 1: |
... | ... | @@ -67,7 +67,7 @@ |
67 | 67 | } |
68 | 68 | } |
69 | 69 | |
70 | -static u8 hdmi_read(struct dw_hdmi *hdmi, int offset) | |
70 | +static u8 dw_hdmi_read(struct dw_hdmi *hdmi, int offset) | |
71 | 71 | { |
72 | 72 | switch (hdmi->reg_io_width) { |
73 | 73 | case 1: |
... | ... | @@ -82,6 +82,10 @@ |
82 | 82 | return 0; |
83 | 83 | } |
84 | 84 | |
85 | +static u8 (*hdmi_read)(struct dw_hdmi *hdmi, int offset) = dw_hdmi_read; | |
86 | +static void (*hdmi_write)(struct dw_hdmi *hdmi, u8 val, int offset) = | |
87 | + dw_hdmi_write; | |
88 | + | |
85 | 89 | static void hdmi_mod(struct dw_hdmi *hdmi, unsigned reg, u8 mask, u8 data) |
86 | 90 | { |
87 | 91 | u8 val = hdmi_read(hdmi, reg) & ~mask; |
... | ... | @@ -753,6 +757,12 @@ |
753 | 757 | ih_mute = /*hdmi_read(hdmi, HDMI_IH_MUTE) |*/ |
754 | 758 | HDMI_IH_MUTE_MUTE_WAKEUP_INTERRUPT | |
755 | 759 | HDMI_IH_MUTE_MUTE_ALL_INTERRUPT; |
760 | + | |
761 | + if (hdmi->write_reg) | |
762 | + hdmi_write = hdmi->write_reg; | |
763 | + | |
764 | + if (hdmi->read_reg) | |
765 | + hdmi_read = hdmi->read_reg; | |
756 | 766 | |
757 | 767 | hdmi_write(hdmi, ih_mute, HDMI_IH_MUTE); |
758 | 768 |
include/dw_hdmi.h
... | ... | @@ -472,6 +472,8 @@ |
472 | 472 | u8 reg_io_width; |
473 | 473 | |
474 | 474 | int (*phy_set)(struct dw_hdmi *hdmi, uint mpixelclock); |
475 | + void (*write_reg)(struct dw_hdmi *hdmi, u8 val, int offset); | |
476 | + u8 (*read_reg)(struct dw_hdmi *hdmi, int offset); | |
475 | 477 | }; |
476 | 478 | |
477 | 479 | int dw_hdmi_phy_cfg(struct dw_hdmi *hdmi, uint mpixelclock); |