Commit fe32c6d159177e5ea184f5ae598babf32a360f31
Committed by
Anatolij Gustschin
1 parent
d2cd09bb44
Exists in
smarc_8mq_lf_v2020.04
and in
17 other branches
board: sama5d3xek: Convert to CONFIG_DM_VIDEO
Convert the board to support the video driver model, add the device tree node, and remove the unnecessary code. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Showing 11 changed files with 43 additions and 115 deletions Side-by-side Diff
- arch/arm/dts/sama5d36ek_cmp.dts
- arch/arm/dts/sama5d3_lcd.dtsi
- arch/arm/dts/sama5d3xdm.dtsi
- board/atmel/sama5d3xek/sama5d3xek.c
- configs/sama5d36ek_cmp_mmc_defconfig
- configs/sama5d36ek_cmp_nandflash_defconfig
- configs/sama5d36ek_cmp_spiflash_defconfig
- configs/sama5d3xek_mmc_defconfig
- configs/sama5d3xek_nandflash_defconfig
- configs/sama5d3xek_spiflash_defconfig
- include/configs/sama5d3xek.h
arch/arm/dts/sama5d36ek_cmp.dts
arch/arm/dts/sama5d3_lcd.dtsi
... | ... | @@ -14,31 +14,12 @@ |
14 | 14 | ahb { |
15 | 15 | apb { |
16 | 16 | hlcdc: hlcdc@f0030000 { |
17 | - compatible = "atmel,sama5d3-hlcdc"; | |
17 | + compatible = "atmel,at91sam9x5-hlcdc"; | |
18 | 18 | reg = <0xf0030000 0x2000>; |
19 | 19 | interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>; |
20 | 20 | clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>; |
21 | 21 | clock-names = "periph_clk","sys_clk", "slow_clk"; |
22 | 22 | status = "disabled"; |
23 | - | |
24 | - hlcdc-display-controller { | |
25 | - compatible = "atmel,hlcdc-display-controller"; | |
26 | - #address-cells = <1>; | |
27 | - #size-cells = <0>; | |
28 | - | |
29 | - port@0 { | |
30 | - #address-cells = <1>; | |
31 | - #size-cells = <0>; | |
32 | - reg = <0>; | |
33 | - }; | |
34 | - }; | |
35 | - | |
36 | - hlcdc_pwm: hlcdc-pwm { | |
37 | - compatible = "atmel,hlcdc-pwm"; | |
38 | - pinctrl-names = "default"; | |
39 | - pinctrl-0 = <&pinctrl_lcd_pwm>; | |
40 | - #pwm-cells = <3>; | |
41 | - }; | |
42 | 23 | }; |
43 | 24 | |
44 | 25 | pinctrl@fffff200 { |
arch/arm/dts/sama5d3xdm.dtsi
... | ... | @@ -10,6 +10,32 @@ |
10 | 10 | / { |
11 | 11 | ahb { |
12 | 12 | apb { |
13 | + hlcdc: hlcdc@f0030000 { | |
14 | + atmel,vl-bpix = <4>; | |
15 | + atmel,output-mode = <24>; | |
16 | + atmel,guard-time = <1>; | |
17 | + pinctrl-names = "default"; | |
18 | + pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb888_alt>; | |
19 | + status = "okay"; | |
20 | + u-boot,dm-pre-reloc; | |
21 | + | |
22 | + display-timings { | |
23 | + u-boot,dm-pre-reloc; | |
24 | + 800x480 { | |
25 | + clock-frequency = <24000000>; | |
26 | + hactive = <800>; | |
27 | + vactive = <480>; | |
28 | + hsync-len = <5>; | |
29 | + hfront-porch = <64>; | |
30 | + hback-porch = <64>; | |
31 | + vfront-porch = <22>; | |
32 | + vback-porch = <21>; | |
33 | + vsync-len = <5>; | |
34 | + u-boot,dm-pre-reloc; | |
35 | + }; | |
36 | + }; | |
37 | + }; | |
38 | + | |
13 | 39 | i2c1: i2c@f0018000 { |
14 | 40 | qt1070: keyboard@1b { |
15 | 41 | compatible = "qt1070"; |
board/atmel/sama5d3xek/sama5d3xek.c
... | ... | @@ -13,9 +13,7 @@ |
13 | 13 | #include <asm/arch/gpio.h> |
14 | 14 | #include <asm/arch/clk.h> |
15 | 15 | #include <debug_uart.h> |
16 | -#include <lcd.h> | |
17 | 16 | #include <linux/ctype.h> |
18 | -#include <atmel_hlcdc.h> | |
19 | 17 | #include <phy.h> |
20 | 18 | #include <micrel.h> |
21 | 19 | #include <spl.h> |
... | ... | @@ -132,80 +130,6 @@ |
132 | 130 | } |
133 | 131 | #endif |
134 | 132 | |
135 | -#ifdef CONFIG_LCD | |
136 | -vidinfo_t panel_info = { | |
137 | - .vl_col = 800, | |
138 | - .vl_row = 480, | |
139 | - .vl_clk = 24000000, | |
140 | - .vl_bpix = LCD_BPP, | |
141 | - .vl_tft = 1, | |
142 | - .vl_hsync_len = 128, | |
143 | - .vl_left_margin = 64, | |
144 | - .vl_right_margin = 64, | |
145 | - .vl_vsync_len = 2, | |
146 | - .vl_upper_margin = 22, | |
147 | - .vl_lower_margin = 21, | |
148 | - .mmio = ATMEL_BASE_LCDC, | |
149 | -}; | |
150 | - | |
151 | -void lcd_enable(void) | |
152 | -{ | |
153 | -} | |
154 | - | |
155 | -void lcd_disable(void) | |
156 | -{ | |
157 | -} | |
158 | - | |
159 | -static void sama5d3xek_lcd_hw_init(void) | |
160 | -{ | |
161 | - gd->fb_base = CONFIG_SAMA5D3_LCD_BASE; | |
162 | - | |
163 | - /* The higher 8 bit of LCD is board related */ | |
164 | - at91_pio3_set_c_periph(AT91_PIO_PORTC, 14, 0); /* LCDD16 */ | |
165 | - at91_pio3_set_c_periph(AT91_PIO_PORTC, 13, 0); /* LCDD17 */ | |
166 | - at91_pio3_set_c_periph(AT91_PIO_PORTC, 12, 0); /* LCDD18 */ | |
167 | - at91_pio3_set_c_periph(AT91_PIO_PORTC, 11, 0); /* LCDD19 */ | |
168 | - at91_pio3_set_c_periph(AT91_PIO_PORTC, 10, 0); /* LCDD20 */ | |
169 | - at91_pio3_set_c_periph(AT91_PIO_PORTC, 15, 0); /* LCDD21 */ | |
170 | - at91_pio3_set_c_periph(AT91_PIO_PORTE, 27, 0); /* LCDD22 */ | |
171 | - at91_pio3_set_c_periph(AT91_PIO_PORTE, 28, 0); /* LCDD23 */ | |
172 | - | |
173 | - /* Configure lower 16 bit of LCD and enable clock */ | |
174 | - at91_lcd_hw_init(); | |
175 | -} | |
176 | - | |
177 | -#ifdef CONFIG_LCD_INFO | |
178 | -#include <nand.h> | |
179 | -#include <version.h> | |
180 | - | |
181 | -void lcd_show_board_info(void) | |
182 | -{ | |
183 | - ulong dram_size; | |
184 | - uint64_t nand_size; | |
185 | - int i; | |
186 | - char temp[32]; | |
187 | - | |
188 | - lcd_printf("%s\n", U_BOOT_VERSION); | |
189 | - lcd_printf("(C) 2013 ATMEL Corp\n"); | |
190 | - lcd_printf("at91@atmel.com\n"); | |
191 | - lcd_printf("%s CPU at %s MHz\n", get_cpu_name(), | |
192 | - strmhz(temp, get_cpu_clk_rate())); | |
193 | - | |
194 | - dram_size = 0; | |
195 | - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) | |
196 | - dram_size += gd->bd->bi_dram[i].size; | |
197 | - | |
198 | - nand_size = 0; | |
199 | -#ifdef CONFIG_NAND_ATMEL | |
200 | - for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) | |
201 | - nand_size += get_nand_dev_by_index(i)->size; | |
202 | -#endif | |
203 | - lcd_printf("%ld MB SDRAM, %lld MB NAND\n", | |
204 | - dram_size >> 20, nand_size >> 20); | |
205 | -} | |
206 | -#endif /* CONFIG_LCD_INFO */ | |
207 | -#endif /* CONFIG_LCD */ | |
208 | - | |
209 | 133 | #ifdef CONFIG_DEBUG_UART_BOARD_INIT |
210 | 134 | void board_debug_uart_init(void) |
211 | 135 | { |
... | ... | @@ -240,10 +164,6 @@ |
240 | 164 | #ifdef CONFIG_GENERIC_ATMEL_MCI |
241 | 165 | sama5d3xek_mci_hw_init(); |
242 | 166 | #endif |
243 | -#ifdef CONFIG_LCD | |
244 | - if (has_lcdc()) | |
245 | - sama5d3xek_lcd_hw_init(); | |
246 | -#endif | |
247 | 167 | return 0; |
248 | 168 | } |
249 | 169 | |
... | ... | @@ -268,6 +188,9 @@ |
268 | 188 | |
269 | 189 | strcat(name, "ek.dtb"); |
270 | 190 | env_set("dtb_name", name); |
191 | +#endif | |
192 | +#ifdef CONFIG_DM_VIDEO | |
193 | + at91_video_show_board_info(); | |
271 | 194 | #endif |
272 | 195 | return 0; |
273 | 196 | } |
configs/sama5d36ek_cmp_mmc_defconfig
configs/sama5d36ek_cmp_nandflash_defconfig
configs/sama5d36ek_cmp_spiflash_defconfig
configs/sama5d3xek_mmc_defconfig
configs/sama5d3xek_nandflash_defconfig
configs/sama5d3xek_spiflash_defconfig
include/configs/sama5d3xek.h
... | ... | @@ -28,15 +28,6 @@ |
28 | 28 | */ |
29 | 29 | #define ATMEL_PMC_UHP (1 << 6) |
30 | 30 | |
31 | -/* LCD */ | |
32 | -#define LCD_BPP LCD_COLOR16 | |
33 | -#define LCD_OUTPUT_BPP 24 | |
34 | -#define CONFIG_LCD_LOGO | |
35 | -#define CONFIG_LCD_INFO | |
36 | -#define CONFIG_LCD_INFO_BELOW_LOGO | |
37 | -#define CONFIG_ATMEL_HLCD | |
38 | -#define CONFIG_ATMEL_LCD_RGB565 | |
39 | - | |
40 | 31 | /* board specific (not enough SRAM) */ |
41 | 32 | #define CONFIG_SAMA5D3_LCD_BASE 0x23E00000 |
42 | 33 |