Commit ff7e9700eda14ccf8ebe399d3831ef266e743c2d

Authored by Marek Vasut
1 parent be9f643ae6

arm: cache: Add support for write-allocate D-Cache

Add configuration for the write-allocate mode of L1 D-Cache on ARM.
This is needed for D-Cache operation on Cortex-A9 on the SoCFPGA .

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>

Showing 2 changed files with 3 additions and 0 deletions Side-by-side Diff

arch/arm/include/asm/system.h
... ... @@ -185,6 +185,7 @@
185 185 DCACHE_OFF = 0x12,
186 186 DCACHE_WRITETHROUGH = 0x1a,
187 187 DCACHE_WRITEBACK = 0x1e,
  188 + DCACHE_WRITEALLOC = 0x16,
188 189 };
189 190  
190 191 /* Size of an MMU section */
arch/arm/lib/cache-cp15.c
... ... @@ -73,6 +73,8 @@
73 73 i++) {
74 74 #if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
75 75 set_section_dcache(i, DCACHE_WRITETHROUGH);
  76 +#elif defined(CONFIG_SYS_ARM_CACHE_WRITEALLOC)
  77 + set_section_dcache(i, DCACHE_WRITEALLOC);
76 78 #else
77 79 set_section_dcache(i, DCACHE_WRITEBACK);
78 80 #endif