10 Aug, 2018
1 commit
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Disable the LTSSM when link is down in uboot.
Otherwise, the pcie ep/rc validation system in kernel
would be impacted by the enabled ltssm stat in the uboot.Signed-off-by: Richard Zhu
Reviewed-by: Ye Li
27 Apr, 2018
1 commit
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- one lane pcie gen2 link is okay, the cfg space
of the rc/ep can be accessed.
rc cfg base 0x5f00_0000. ep cfg base 0x6000_0000
- limit to gen2 speed
- mask the wait of eq3 finish, because it is used
for gen3.
- use pcie_ctrla_init_rc() to do the initialization
of the pciea controller
- setup the common pcie codes in pcie_imx8x.c, separate
the different soc speicifed initialization codes into
their own pcie/board codes, move the macro definitions
into the new header file imx8_hsio.h.
- i.MX8QXP only have PCIe Control B. Enable PORT B at default.
i.MX8QM needs to set CONFIG_IMX_PCIEB to enable PORT B.
- Disable the LTSSM when link is down.Signed-off-by: Frank Li
Signed-off-by: Richard Zhu
Signed-off-by: Shenwei Wang
Signed-off-by: Ye Li
(cherry picked from commit 03141c2b955ce6034f06e701126aea1493dc2b4b)
26 Apr, 2018
1 commit
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Enable pcie support in uboot on imx6sx sd boards
- enable_pcie_clock should be call before ssp_en is set,
since that ssp_en control the phy_ref clk gate, turn on
it after the source of the pcie clks are stable.
- add debug info
- add rx_eq of gpr12 on imx6sx
- there are random link down issue on imx6sx. It's
pcie ep reset issue.
solution:reset ep, then retry link can fix it.(cherry picked from commit ec78595a24b5ff1020baa97b6d6e79a3a3326307)
Signed-off-by: Richard Zhu
Signed-off-by: Ye Li
(cherry picked from commit 81fd30250110d72992758f08b66c07306126892b)
05 Mar, 2018
1 commit
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Thomas reported U-Boot failed to build host tools if libfdt-devel
package is installed because tools include libfdt headers from
/usr/include/ instead of using internal ones.This commit moves the header code:
include/libfdt.h -> include/linux/libfdt.h
include/libfdt_env.h -> include/linux/libfdt_env.hand replaces include directives:
#include -> #include
#include -> #includeReported-by: Thomas Petazzoni
Signed-off-by: Masahiro Yamada
23 Feb, 2018
1 commit
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Since memory banks may not be located behind each other we need to add
them separately.Signed-off-by: Bernhard Messerklinger
Reviewed-by: Hannes Schmelzer
28 Jan, 2018
1 commit
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Add driver for the Renesas RCar PCIe controller present on Gen2 SoCs.
The PCIe on Gen2 is used both to connect external PCIe peripherals as
well as access the on-SoC USB EHCI controller.Signed-off-by: Marek Vasut
12 Jan, 2018
2 commits
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By default, the subordinate is set equally to the secondary bus (1) when
the RC boots, and does not alter afterwards.This means that theoretically, the highest bus reachable downstream is
bus 1.Force the PCIe RC subordinate to 0xff, otherwise no downstream
devices will be detected behind bus 1 if the booting OS does not allow
enumerating a higher busnr than the subordinate value of the primary
bus.Signed-off-by: Koen Vandeputte
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Before use GPIO, we need to request gpio first. Free gpio after use.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Fabio Estevam
Reviewed-by: Stefano Babic
10 Jan, 2018
1 commit
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Last user of this option went away in 2015 in commit:
d928664f41 ("powerpc: 74xx_7xx: remove 74xx_7xx cpu support")Signed-off-by: Tuomas Tynkkynen
29 Nov, 2017
1 commit
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MIPS is no longer a part of Imagination Technologies, and as such my
@imgtec.com email address will soon cease to function. This patch
updates occurrances of it with my new @mips.com email address, and adds
an entry in .mailmap such that git (& tools such as get_maintainer.pl
when examining history) will use the new address.Signed-off-by: Paul Burton
Cc: Daniel Schwierzeck
Cc: u-boot@lists.denx.de
17 Nov, 2017
1 commit
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This patch is to change U-Boot PCI bus assignement compliant with Linux.
It means each PCIe controller's bus number is 0, not the current maximum
PCI bus number, when start to scan this controller.Signed-off-by: Minghuan Lian
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
16 Nov, 2017
1 commit
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Increase size PCI memory mapping from 32MiB to 128MiB.
Signed-off-by: VlaoMao
Signed-off-by: Stefan Roese
12 Oct, 2017
1 commit
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We have at least a minor count of boards, that failed to re-initialize
PCI express in the Linux kernel. Typical failure rate is 20% on affected
boards. This is mitigated by commit 6ecbe1375671 ("drivers: pci: imx:
add imx_pcie_remove function").However, at least on some i.MX6 custom boards, when calling
assert_core_reset() as part of the first-time PCIe init, read access
to PCIE_PL_PFLR simply hangs. Surround this readl() with
imx_pcie_fix_dabt_handler() does not help. For this reason, the forced
LTSSM detection is only used on the second assert_core_reset() that is
called shorly before starting the Linux kernel.Signed-off-by: Sven-Ola Tuecke
Signed-off-by: Fabio Estevam
Tested-by: David Müller
06 Oct, 2017
4 commits
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QEMU emulates such a device with '-machine virt,highmem=off' on ARM.
The 'highmem=off' part is required for things to work as the PCI code
in U-Boot doesn't seem to support 64-bit BARs.Signed-off-by: Tuomas Tynkkynen
Reviewed-by: Bin Meng -
Use the new helpers to avoid boilerplate in the driver.
Signed-off-by: Tuomas Tynkkynen
Reviewed-by: Bin Meng -
Use the new helper function to avoid boilerplate in the driver.
Note that this changes __raw_writel et al. to writel. AFAICT this is
no problem because:- The Linux driver for the same hardware uses the non-__raw variants as
well (via pci_generic_config_write()).
- This driver seems to be used only on MIPS so far, where the __raw and
non-__raw accessors are the same.Signed-off-by: Tuomas Tynkkynen
Reviewed-by: Bin Meng -
This sort of pattern for implementing memory-mapped PCI config space
accesses appears in U-Boot twice already, and a third user is coming up.
So add helper functions to avoid code duplication, similar to how Linux
has pci_generic_config_write and pci_generic_config_read.Signed-off-by: Tuomas Tynkkynen
Reviewed-by: Bin Meng
04 Oct, 2017
1 commit
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U-Boot widely uses error() as a bit noisier variant of printf().
This macro causes name conflict with the following line in
include/linux/compiler-gcc.h:# define __compiletime_error(message) __attribute__((error(message)))
This prevents us from using __compiletime_error(), and makes it
difficult to fully sync BUILD_BUG macros with Linux. (Notice
Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().)Let's convert error() into now treewide-available pr_err().
Done with the help of Coccinelle, excluing tools/ directory.
The semantic patch I used is as follows:
//
@@@@
-error
+pr_err
(...)
//Signed-off-by: Masahiro Yamada
Reviewed-by: Simon Glass
[trini: Re-run Coccinelle]
Signed-off-by: Tom Rini
23 Sep, 2017
1 commit
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Commit 0aaa1a9 added support for LS208xA devices but fixing
iommu-map property is missing. This patch adds support for
fixing iommu-map.Signed-off-by: Bharat Bhushan
Signed-off-by: Ioana Ciornei
[YS: revised commit message]
Reviewed-by: York Sun
22 Sep, 2017
5 commits
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'default n' is the default anyway so it doesn't need to be specified
explicitly, and the rest of the file doesn't specify it either anywhere.
Drop it.Signed-off-by: Tuomas Tynkkynen
Reviewed-by: Bin Meng -
This field is no longer used since the DM conversion. Drop it.
Signed-off-by: Tuomas Tynkkynen
Reviewed-by: Bin Meng -
This field is no longer used since the DM conversion. Drop it.
Signed-off-by: Tuomas Tynkkynen
Reviewed-by: Bin Meng -
This field has never been used as the driver has been DM-based since the
beginning. Drop it.Signed-off-by: Tuomas Tynkkynen
Reviewed-by: Bin Meng -
These take the 'struct udevice *' as an argument, not the
'struct xilinx_pcie *` which is a local variable. Fix the comments to
match the code.Signed-off-by: Tuomas Tynkkynen
Reviewed-by: Bin Meng
24 Aug, 2017
1 commit
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With DM video, this is not used any more. Drop it.
Signed-off-by: Bin Meng
16 Aug, 2017
1 commit
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We are now using an env_ prefix for environment functions. Rename these
two functions for consistency. Also add function comments in common.h.Quite a few places use getenv() in a condition context, provoking a
warning from checkpatch. These are fixed up in this patch also.Suggested-by: Wolfgang Denk
Signed-off-by: Simon Glass
10 Aug, 2017
1 commit
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This bug is brought by the commit 3d8553f0a3 (pci: layerscape: add
LS2088A series SoC pcie support), which only updated cfg_res.start
and did not update the .end field. This causes fdt_resource_size()
getting wrong value when calculate the cfg1 space address.Signed-off-by: Hou Zhiqiang
[YS: Revise subject and commit message]
Reviewed-by: York Sun
02 Aug, 2017
1 commit
-
Signed-off-by: Tom Rini
Conflicts:
include/configs/ls1046aqds.h
include/configs/ls1046ardb.h
01 Aug, 2017
2 commits
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Update SVR as per the SOC document.
-LS2081A: 0x870919 -> 0x870918
-LS2041A: 0x870915 -> 0x870914Signed-off-by: Santan Kumar
Signed-off-by: Priyanka Jain
Signed-off-by: Hou Zhiqiang
Reviewed-by: York Sun -
PCI is the de facto interconnect bus in an x86 system.
Signed-off-by: Bin Meng
Reviewed-by: Andy Shevchenko
Reviewed-by: Simon Glass
29 Jul, 2017
1 commit
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Update the tegra pci driver to support a live device tree. Fix the check
for nvidia,num-lanes so that an error will actually be detected.Tested-by: Marcel Ziswiler
Tested-on: Beaver, Jetson-TK1
Signed-off-by: Simon Glass
Tested-by: Stephen Warren
12 Jul, 2017
2 commits
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This function returns the pointer to the value of a node property.
The current name ofnode_read_prop() is confusing. Follow the naming
of_get_property() from Linux.The return type (const u32 *) is wrong. DT property values can be
strings as well as integers. This is why of_get_property/fdt_getprop
returns an opaque pointer.Signed-off-by: Masahiro Yamada
Acked-by: Simon Glass -
The of_n_addr_cells() and of_n_size_cells() functions are useful for
getting the size of addresses in a node, but in a few places U-Boot needs
to obtain the actual property value for a node without walking up the
stack. Add functions for this and just the existing code to use it.Add a comment to the existing ofnode functions which do not do the right
thing with a flat tree.This fixes a problem reading PCI addresses.
Signed-off-by: Simon Glass
Tested-by: Marcel Ziswiler
Tested-on: Beaver, Jetson-TK1
04 Jul, 2017
1 commit
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There was for long time no activity in the 4xx area.
We need to go further and convert to Kconfig, but it
turned out, nobody is interested anymore in 4xx,
so remove it.Signed-off-by: Heiko Schocher
27 Jun, 2017
1 commit
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Signed-off-by: Tom Rini
Conflicts:
include/configs/imx6qdl_icore_rqs.h
include/configs/imx6ul_geam.h
include/configs/imx6ul_isiot.h
12 Jun, 2017
1 commit
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There was for long time no activity in the 8260 area.
We need to go further and convert to Kconfig, but it
turned out, nobody is interested anymore in 8260,
so remove it.Signed-off-by: Heiko Schocher
06 Jun, 2017
1 commit
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The declarations should not be in common.h. Move them to the arch-specific
headers.Signed-off-by: Simon Glass
[trini: Fixup thinko defined(FSL_LSCH3) -> defined(CONFIG_FSL_LSCH3)]
Signed-off-by: Tom Rini
01 Jun, 2017
2 commits
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Update the PCI uclass to support livetree. This mostly involves fixing
the address decoding from the device tree.Signed-off-by: Simon Glass
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These support the flat device tree. We want to use the dev_read_..()
prefix for functions that support both flat tree and live tree. So rename
the existing functions to avoid confusion.In the end we will have:
1. dev_read_addr...() - works on devices, supports flat/live tree
2. devfdt_get_addr...() - current functions, flat tree only
3. of_get_address() etc. - new functions, live tree onlyAll drivers will be written to use 1. That function will in turn call
either 2 or 3 depending on whether the flat or live tree is in use.Note this involves changing some dead code - the imx_lpi2c.c file.
Signed-off-by: Simon Glass
31 May, 2017
1 commit
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There is no dedicated reset signal wired up for the MX6QDL thus if the
bootloader enables the link we need some special handling to get the core
back into a state where it is safe to touch it for configuration.While there has been some special handling in the Linux kernel to do this,
it was removed in 4.11 thus we need to do it properly in the bootloader
and therefore without this if you enable PCI in the bootloader you will hang
while booting the 4.11 kernel.This puts the PCIe controller back into a safe state for the kernel driver
before launching the kernel.Signed-off-by: Tim Harvey
Reviewed-by: Fabio Estevam
Tested-by: Peter Senna Tschudin