17 Mar, 2020
7 commits
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Few v0.1 SBI calls are being replaced by new SBI calls that follows
v0.2 calling convention.Implement the replacement extensions and few additional new SBI
function calls that makes way for a better SBI interface in future.Signed-off-by: Bin Meng
Reviewed-by: Pragnesh Patel -
We now have SBI v0.2 which is more scalable and extendable to handle
future needs for RISC-V supervisor interfaces.Introduce a new config and move all SBI v0.1 code under that config.
This allows to implement the new replacement SBI extensions cleanly
and remove v0.1 extensions easily in future. Currently, the config
is enabled by default. Once all M-mode software, with v0.1, is no
longer in use, this config option and all relevant code can be easily
removed.This commit is inspired from Linux kernel patch:
https://patchwork.kernel.org/patch/11407361/Signed-off-by: Bin Meng
Reviewed-by: Pragnesh Patel -
Few v0.1 SBI calls are being replaced by new SBI calls that follows
v0.2 calling convention.This patch just defines these new extensions.
This commit is inspired from Linux kernel patch:
https://patchwork.kernel.org/patch/11407359/Signed-off-by: Bin Meng
Reviewed-by: Pragnesh Patel -
The SBI v0.2 introduces a base extension which is backward compatible
with v0.1. Implement all helper functions and minimum required SBI
calls from v0.2 for now. All other base extension function will be
added later as per need.As v0.2 calling convention is backward compatible with v0.1, remove
the v0.1 helper functions and just use v0.2 calling convention.Add a new Kconfig options CONFIG_SBI for the new SBI v0.2 codes, and
let CONFIG_SBI_IPI depend on it.This commit is inspired from Linux kernel patch:
https://patchwork.kernel.org/patch/11407363/Signed-off-by: Bin Meng
Reviewed-by: Pragnesh Patel -
As per the new SBI specification, current SBI implementation version
is defined as 0.1 and will be removed/replaced in future. Each of the
function call in 0.1 is defined as a separate extension which makes
easier to replace them one at a time.Rename existing implementation to reflect that. This patch is just
a preparatory patch for SBI v0.2 and doesn't introduce any functional
changes.This commit is inspired from Linux kernel patch:
https://patchwork.kernel.org/patch/11407355/Signed-off-by: Bin Meng
Reviewed-by: Pragnesh Patel -
There is no need for S-mode U-Boot to call sbi_clear_ipi() as it
can be cleared directly from S-mode. This saves some cycles.Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer -
Currently sbi_remote_sfence_vma{,_asid} does not pass their arguments
to SBI at all, which is semantically incorrect.This keeps in sync with Linux kernel commit:
a21344dfc6ad: fix sbi_remote_sfence_vma{,_asid}Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
19 Feb, 2020
3 commits
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The implementation of dma_map_single() and dma_unmap_single() is
exactly the same for all the architectures that support them.Factor them out to , and make all drivers to
include instead of .If we need to differentiate them for some architectures, we can
move the generic definitions to .Add some comments to the helpers. The concept is quite similar to
the DMA-API of Linux kernel. Drivers are agnostic about what is
going on behind the scene. Just call dma_map_single() before the
DMA, and dma_unmap_single() after it.Signed-off-by: Masahiro Yamada
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dma_unmap_single() takes the dma address, not virtual address.
Signed-off-by: Masahiro Yamada
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Make dma_map_single() return the dma address, and remove the
pointless volatile.Signed-off-by: Masahiro Yamada
11 Feb, 2020
1 commit
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sandbox conversion to SDL2
TPM TEE driver
Various minor sandbox video enhancements
New driver model core utility functions
10 Feb, 2020
3 commits
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The add instruction on risc-v can have any three sources and targets, so there
is no need for an intermediate mov.Signed-off-by: Sean Anderson
Reviewed-by: Rick Chen
Reviewed-by: Bin Meng -
When debugging, it can be helpful to see more information about an
unhandled exception. This patch adds an option to view the registers at
the time of the trap, similar to the linux output on a kernel panic.Signed-off-by: Sean Anderson
Reviewed-by: Rick Chen
Reviewed-by: Bin Meng
Tested-by: Bin Meng -
Due to the two-instruction sequence needed to access arbitrary memory
locations, the RISC-V linker aggressively optimises memory accesses and
jumps at link-time. This is called "linker relaxation," and is discussed
in this SiFive article
.
One of the optimizations in place is to assume that the __global_pointer
symbol is placed in the gp register. To quote the article:"...The magic __global_pointer$ symbol is defined to point 0x800 bytes
past the start of the .sdata section. The 0x800 magic number allows
signed 12-bit offsets from __global_pointer$ to address symbols at the
start of the .sdata section. The linker assumes that if this symbol is
defined, then the gp register contains that value, which it can then use
to relax accesses to global symbols within that 12-bit range. The
compiler treats the gp register as a constant so it doesn't need to be
saved or restored, which means it is generally only written by _start,
the ELF entry point."However, U-Boot instead keeps the global data pointer in gp. This causes
memory accesses and jumps optimized to use the gp pointer to fail. To
fix this problem, we undefine the __global_pointer symbol.Signed-off-by: Sean Anderson
Reviewed-by: Bin Meng
Reviewed-by: Rick Chen
06 Feb, 2020
1 commit
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At present devres.h is included in all files that include dm.h but few
make use of it. Also this pulls in linux/compat which adds several more
headers. Drop the automatic inclusion and require files to include devres
themselves. This provides a good indication of which files use devres.Signed-off-by: Simon Glass
Reviewed-by: Anatolij Gustschin
26 Jan, 2020
1 commit
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Subsystems such as USB expect dma_map_single() and dma_unmap_single() to
do dcache flush/invalidate operations as required. For example, see
see drivers/usb/gadget/udc/udc-core.c::usb_gadget_map_request().
Currently drivers do this locally, (see drivers/usb/dwc3/ep0.c,
drivers/mtd/nand/raw/denali.c etc..)
Update arch specific dma_map_single() and dma_unmap_single() APIs to do
cache flush/invalidate operations, so that drivers need not implement
them locally.Signed-off-by: Vignesh Raghavendra
Reviewed-by: Masahiro Yamada
Reviewed-by: Rick Chen
18 Jan, 2020
3 commits
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At present panic() is in the vsprintf.h header file. That does not seem
like an obvious choice for hang(), even though it relates to panic(). So
let's put hang() in its own header.Signed-off-by: Simon Glass
[trini: Migrate a few more files]
Signed-off-by: Tom Rini -
These functions relate to setting up the device tree for booting the OS.
The fdt_support.h header file supports similar functions, so move these
there.Signed-off-by: Simon Glass
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This is an init function so move it out of the common header. Avoid using
the typedef so that we don't have to include the global_data header file.Also tidy up the function style in comments while we are here.
Signed-off-by: Simon Glass
10 Dec, 2019
10 commits
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Add a wait option to smp_call_function() to wait for the secondary harts
to acknowledge the call-function request. The request is considered to
be acknowledged once each secondary hart has cleared the corresponding
IPI.As part of the call-function request, the secondary harts invalidate the
instruction cache after clearing the IPI. This adds a delay between
acknowledgment (clear IPI) and fulfillment (call function) of the
request. We want to use the acknowledgment to be able to judge when the
request has been completed. Remove the delay by clearing the IPI after
cache invalidation and just before calling the function from the
request.Signed-off-by: Lukas Auer
Reviewed-by: Rick Chen
Tested-by: Rick Chen
Reviewed-by: Anup Patel -
Add the function riscv_get_ipi() for reading the pending status of IPIs.
The supported controllers are Andes' Platform Level Interrupt Controller
(PLIC), the Supervisor Binary Interface (SBI), and SiFive's Core Local
Interruptor (CLINT).Signed-off-by: Lukas Auer
Reviewed-by: Rick Chen -
Those are required for cfi-flash driver to get correct address information.
Also modify size description correctly.Signed-off-by: Rick Chen
Cc: KC Lin
Cc: Alan Kao -
Add CPU2 and CPU3 information in cpus node
to support four cores SMP booting.Signed-off-by: Rick Chen
Cc: KC Lin
Cc: Alan Kao -
For RV64, it will use sd instruction to clear t0
register, and the increament will be 8 bytes. So
if the difference between__bss_strat and __bss_end
was not 8 bytes aligned, the clear bss loop will
overflow and acks like system hang.Signed-off-by: Rick Chen
Cc: KC Lin
Cc: Alan Kao -
The mcache_ctl csr only can be manipulated in M mode.
Add SPL_RISCV_MMODE for U-Boot SPL to control cache
operation.Signed-off-by: Rick Chen
Cc: KC Lin
Cc: Alan Kao -
Fix two wrong settings of andes plic driver as below:
1. Fix wrong pending register base definition.
2. Declaring the en variable in enable_ipi() as unsigned int instead of
int can help to fix wrong plic enabling setting in RV64.Signed-off-by: Rick Chen
Cc: KC Lin
Cc: Alan Kao -
The U-Boot SPL will boot in M mode and load the FIT image which
include OpenSBI and U-Boot proper images. After loading progress,
it will jump to OpenSBI first and then U-Boot proper which will
run in S mode.Also remove V5L2_CACHE due to U-Boot SPL code size consideration.
Without this concern, it can be enable manually for performance.Signed-off-by: Rick Chen
Cc: KC Lin
Cc: Alan Kao -
Sync the hifive-unleashed-a00 dts from Linux with
below commit details:commit ("riscv: dts: HiFive
Unleashed: add default chosen/stdout-path")Idea is to periodically sync the dts from Linux instead of
tweaking internal changes one after another, so better not
add any intermediate changes in between. This would help to
maintain the dts files easy and meaningful since we are
reusing device tree files from Linux.Signed-off-by: Jagan Teki
Reviewed-by: Bin Meng
Reviewed-by: Anup Patel -
This fixes a problem, where booting Linux using distro boot will
sometimes lead to an invalid instruction exception on the main hart. The
secondary harts are not affected and boot Linux successfully. The root
cause of this problem is a stack overflow on the main hart.With distro boot, the current default stack size of 8KiB on RISC-V is
not sufficient and will cause a stack overflow. The stacks are allocated
sequentially. In the case of a stack overflow the stack of the main hart
can reach into that of another hart and be corrupted.The stack overflow previously did not cause any problems, because only
stack frames, which are not used anymore since the hart enters Linux,
were corrupted. Starting with GCC 9, the stack usage has decreased. Now,
only the most recent stack frame overflows into the stack of a secondary
hart and is corrupted. The illegal instruction exception is caused by
the secondary hart overwriting the return address in the stack frame of
the main hart with an address that does not include valid code.Increase the default stack size of each hart to 16KiB to avoid this
problem.Reported-by: Aurelien Jarno
Signed-off-by: Lukas Auer
Tested-by: David Abdurachmanov
Tested-by: Aurelien Jarno
Reviewed-by: Rick Chen
03 Dec, 2019
5 commits
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Move this function into init.h which seems to be designed for this sort
of thing. Also update the header to declare struct global_data so that it
can be included without global_data.h being needed.Signed-off-by: Simon Glass
Reviewed-by: Tom Rini -
Move these two functions into the irq_funcs.h header file. Also move
interrupt_handler_t as this is used by the irq_install_handler() function.Signed-off-by: Simon Glass
Reviewed-by: Tom Rini -
These functions do not use driver model but are fairly widely used in
U-Boot. But it is not clear that they will use driver model anytime soon,
so we don't want to label them as 'legacy'.Move them to a new irq_func.h header file. Avoid the name 'irq.h' since it
is widely used in U-Boot already.Signed-off-by: Simon Glass
Reviewed-by: Tom Rini -
These functions are CPU-related and do not use driver model. Move them to
cpu_func.hSigned-off-by: Simon Glass
Reviewed-by: Daniel Schwierzeck
Reviewed-by: Tom Rini -
These functions belong in cpu_func.h. Another option would be cache.h
but that code uses driver model and we have not moved these cache
functions to use driver model. Since they are CPU-related it seems
reasonable to put them here.Move them over.
Signed-off-by: Simon Glass
Reviewed-by: Tom Rini
18 Oct, 2019
2 commits
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The released Linux boot image header in v5.3 is different from the
one present in U-Boot. Align the header with the new version. The
changes in Linux are backward compatible. Previous U-Boot releases
with older header will continue to work as well. As v5.3 kernel is
the first one to support image header, there is no compatibility
issue between new U-Boot (with this patch) and older kernel.Signed-off-by: Atish Patra
Reviewed-by: Rick Chen -
This patch adds a DM based driver model for gpio controller present in
FU540-C000 SoC on HiFive Unleashed A00 board. This SoC has one GPIO
bank and 16 GPIO lines in total, out of which GPIO0 to GPIO9 and
GPIO15 are routed to the J1 header on the board.This implementation is ported from linux based gpio driver submitted
for review by Wesley W. Terpstra and/or Atish Patra
(many thanks !!). The linux driver can be referred
here [1][1]: https://lkml.org/lkml/2018/10/9/1103
Signed-off-by: Sagar Shrikant Kadam
Reviewed-by: Bin Meng
03 Sep, 2019
4 commits
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Use CCTL command to do d-cache write back
and invalidate instead of fence.Signed-off-by: Rick Chen
Cc: KC Lin
Reviewed-by: Bin Meng -
When L2 node exists inside cpus node, uclass_get_device
can not parse L2 node successfully. So move it outside
from cpus node.Also add tag-ram-ctl and data-ram-ctl attributes for
v5l2 cache controller driver. This can adjust timing
by requirement from dtb to improve performance.Signed-off-by: Rick Chen
Cc: KC Lin
Reviewed-by: Bin Meng -
Flush and disable L2 cache in dcache_disable()
which will be called in cleanup_before_linux()
before jump to linux.The sequence will be preferred as below:
L1 flush -> L1 disable -> L2 flush -> L2 disableSigned-off-by: Rick Chen
Cc: KC Lin
Reviewed-by: Bin Meng -
Select the v5l2 UCLASS_CACHE driver for ax25.
Signed-off-by: Rick Chen
Cc: KC Lin
Reviewed-by: Bin Meng