24 Jul, 2013

1 commit


07 Dec, 2011

1 commit

  • Improve the tool that finds multiplier and divider for PLLs:
    The previous algorithm could get stuck on local maxima
    and required the user to specify the tolerance. Improve
    the algorithm to go through the entire search space and find
    the optimal solution.

    Signed-off-by: Aneesh V

    Aneesh V
     

03 Aug, 2011

1 commit

  • Add support for:
    1. DPLL locking
    2. Initialization of clock domains and clock modules
    3. Setting up the right voltage on voltage rails

    This work draws upon previous work done for x-loader by:
    Santosh Shilimkar
    Rajendra Nayak

    Signed-off-by: Aneesh V
    Signed-off-by: Sandeep Paulraj

    Aneesh V