08 Jun, 2017
2 commits
-
When enabling CONFIG_DISPLAY_ROCKCHIP_HDMI, compile-time warning for
the following implicitly defined functions are raised due to a missing
include directive:drivers/video/rockchip/rk_hdmi.c: In function 'rk_hdmi_probe':
drivers/video/rockchip/rk_hdmi.c:150:2: warning: implicit declaration of function 'rk_setreg' [-Wimplicit-function-declaration]
rk_setreg(&priv->grf->soc_con6, 1 << 15);
^~~~~~~~~
drivers/video/rockchip/rk_hdmi.c:153:2: warning: implicit declaration of function 'rk_clrsetreg' [-Wimplicit-function-declaration]
rk_clrsetreg(&priv->grf->soc_con6, 1 << 4,
^~~~~~~~~~~~This change fixes this by including in rk_hdmi.c.
Signed-off-by: Philipp Tomsich
Acked-by: Simon Glass -
The usb_gadget_handle_interrupts()-function is already implemented by
drivers/usb/gadget/dwc2_udc_otg.c, so we need to avoid defining it
in the evb-rk3328.c board-specific file.This change fixes the following build error (from buildman):
drivers/usb/gadget/built-in.o: In function `usb_gadget_handle_interrupts':
build/../drivers/usb/gadget/dwc2_udc_otg.c:850: multiple definition of `usb_gadget_handle_interrupts'
board/rockchip/evb_rk3328/built-in.o:build/../board/rockchip/evb_rk3328/evb-rk3328.c:37: first defined here
make[1]: *** [u-boot] Error 1Signed-off-by: Philipp Tomsich
Acked-by: Simon Glass
07 Jun, 2017
38 commits
-
Add the compatible "rockchip,rk3328-xhci" in match table
for rk3328 to probe xhci controller. Use fixed regulator
to control the voltage of vbus and turn off vbus when
usb stop.Signed-off-by: Meng Dongyang
Reviewed-by: Simon Glass -
Add basic support for rv1108 evb, whith this patch we
can boot into u-boot console.Signed-off-by: Andy Yan
Reviewed-by: Simon Glass -
RV1108 is embedded with an ARM Cortex-A7 single core and a DSP core
from Rockchip. It is designed for varies application scenario such
as car DVR, sports DV, secure camera and UAV camera.Signed-off-by: Andy Yan
Reviewed-by: Simon Glass -
Add clock driver support for Rockchip rv1108 soc
Signed-off-by: Andy Yan
Reviewed-by: Simon Glass -
Add pinctrl support for Rockchip rv1108 soc
Signed-off-by: Andy Yan
Reviewed-by: Simon Glass -
Add support to mkimage for rv1108 soc, the max
spl code size for rv1108 is 6kb, and the spl
code should be packed by rksd, wether boot from
emmc or spi nor flash.Signed-off-by: Andy Yan
Reviewed-by: Philipp Tomsich
Reviewed-by: Simon Glass -
For the RK3399-Q7 module, we use full OF_CONTROL (i.e. not
OF_PLATDATA) for SPL. In this configuration, the rockchip_dw_mmc
driver retrieves one of its clocks via clk_get_by_name and fails if
this is not possible. For this reason, we can not filter clock-names
from the device-tree nodes used for the configuration of the SPL
stage.Signed-off-by: Philipp Tomsich
Reviewed-by: Simon Glass -
The RK3399-Q7 exposes I2C on its edge connector and uses it as one of
the interfaces towards the on-module STM32 (for the emulated RTC and
fan-controller).Enable I2C and CMD_I2C support in the defconfig.
Signed-off-by: Philipp Tomsich
Reviewed-by: Simon Glass -
The RK3399-Q7 has a KSZ9031 GbE PHY. Enable support for it in defconfig.
Signed-off-by: Philipp Tomsich
Reviewed-by: Simon Glass -
On the RK3399-Q7, we need PMIC support (for the RK808) to enable HDMI
output, as one of the required powerrails is not enabled on boot.
For this, we need to enable the RK808 driver.Signed-off-by: Philipp Tomsich
Version-changes: 3
- With the recent upstream changes to the RK808 (PMIC) driver, the
associated configuration options have been renamed to RK8XX. Track
this change in the RK3399-Q7 defconfig.
Reviewed-by: Simon Glass -
defines the spl-payload to 256k (0x40000)
Signed-off-by: Klaus Goger
Signed-off-by: Philipp Tomsich
Reviewed-by: Simon Glass -
On the RK3399-Q7, the on-module USB3 hub is held in reset at boot-up
to save power and needs to be woken up using GPIO4A3.Note that this is not a negated reset-signal (due to a level shifter
being needed for this signal anyway), but a negated enable-signal:
to enable, we need to output LOW (i.e. 0)... so we mark this as an
ACTIVE_LOW signal.Signed-off-by: Philipp Tomsich
Reviewed-by: Simon Glass -
Signed-off-by: Philipp Tomsich
Reviewed-by: Simon Glass -
With the validation done for DDR3-1866 (i.e. 933 MHz bus clock), we
can now add the timings (rk3399-sdram-ddr3-1866.dtsi) for boards built
with the DDR3-1866 option.Signed-off-by: Philipp Tomsich
Reviewed-by: Simon Glass -
The RK3399 is capable of driving DDR3 at 933MHz (i.e. DDR3-1866),
if the PCB layout permits and appropriate memory timings are used.This changes the sanity checks to allow a DTS to request DDR3-1866
operation.Signed-off-by: Philipp Tomsich
Tested-by: Klaus Goger
Reviewed-by: Simon Glass
Reviewed-by: Kever Yang -
Revise the loop watching for a timeout on obtaining a DRAM PHY lock to
clearly state a timeout in milliseconds and use get_timer (based on
the ARMv8 architected timer) to detect a timeout.Signed-off-by: Philipp Tomsich
Reviewed-by: Kever Yang
Reviewed-by: Simon Glass -
This change restores the earlier setting of init_boot_size to include
the maximum area covered by the the boot ROM of each chip for resolve
issues with back-to-bootrom functionality reported by Kever and Heiko.To ensure that we don't run into the same issue again in the future,
I have updated the comments accordingly and added a reference to the
mailing list archive (there's some very helpful info from Andy Yan
that provides background on the BootROM requirements regarding these
fields).See https://lists.denx.de/pipermail/u-boot/2017-May/293267.html for
some background (by Andy Yan) of how the BootROM processes this field.Signed-off-by: Philipp Tomsich
Reviewed-by: Simon Glass -
The Rockchip BootROM relies on init_size being aligned to 2KB
(see https://lists.denx.de/pipermail/u-boot/2017-May/293268.html).This pads the image to 2KB both for SD card images and SPI images
and uses a common symbolic constant for the alignment.Signed-off-by: Philipp Tomsich
Reviewed-by: Simon Glass -
The rockchip image generation was previously missing the ability to
verify the generated header (and dump the image-type) without having
to resort to hexdump or od. Experience in our testing has showed it
to be very easy to get the rkspi and rksd images mixed up and the
lab... so we add the necessary support to have dumpimage tell us
what image type we're dealing with.This change set adds the verify_header and print_header capability
to the rksd/rkspi image drivers (through shared code in rkcommon).As of now, we only support images fully that are not RC4-encoded for
the SPL payload (i.e. header1 and payload). For RC4-encoded payloads,
the outer header (header0) is checked, but no detection of whether
this is a SD/MMC or SPI formatted payload takes place.The output of dumpsys now prints the image type (spl_hdr), whether it
is a SD/MMC or SPI image, and the (padded) size of the image:
$ ./tools/dumpimage -l ./spl.img
Image Type: Rockchip RK33 (SD/MMC) boot image
^^^^^^ SD/MMC vs. SPI indication
^^^^ spl_hdr indicated by the image
Data Size: 79872 bytesSigned-off-by: Philipp Tomsich
Acked-by: Simon Glass -
Update maintainer to Kever Yang for William Zhang is not
work for this board now.Signed-off-by: Kever Yang
Reviewed-by: Simon Glass -
Directory board/rockchip/ are all boards for Rockchip SoCs,
so add it to maintained entry.Signed-off-by: Kever Yang
Reviewed-by: Simon Glass -
Send patch to Kever Yang instead of Lin Huang for Rockchip patches,
for Lin is not always working on upstream U-Boot.Signed-off-by: Kever Yang
Reviewed-by: Simon Glass
Changed , to : in subject:
Signed-off-by: Simon Glass -
Signed-off-by: Meng Dongyang
Reviewed-by: Simon Glass -
Add config of max root ports and add config to enable xhci
controller.Signed-off-by: Meng Dongyang
Reviewed-by: Simon Glass -
Signed-off-by: Meng Dongyang
Reviewed-by: Simon Glass -
Add defconfig for usb and ehci and ohci controller, config maximal
number of ports of the root hub for ohci driver.Signed-off-by: Meng Dongyang
Reviewed-by: Simon Glass -
In rk3328, some function pin may have more than one choice, and muxed
with more than one IO, for example, the UART2 controller IO,
TX and RX, have 3 choice(setting in com_iomux):
- M0 which mux with GPIO1A0/GPIO1A1
- M1 which mux with GPIO2A0/GPIO2A1
- usb2phy which mux with USB2.0 DP/DM pin.We should not decide which group to use in pinctrl driver,
for it may be different in different board, it should goes to board
file, and the pinctrl file should setting correct iomux depends on
the com_iomux value.Signed-off-by: Kever Yang
Acked-by: Simon Glass -
Move GRF register bit definition into GRF header file, remove
'GRF_' prefix and add 'GPIOmXn_' as prefix for bit meaning.Signed-off-by: Kever Yang
Acked-by: Simon Glass -
U-Boot prefer to use MASKs with SHIFT embeded, clean the Macro
definition in grf header file and pinctrl driver.Signed-off-by: Kever Yang
Reviewed-by: Simon Glass -
- hclk/pclk_div range should use '
Reviewed-by: Simon Glass -
Embeded the shift in mask MACRO definition in cru header file
and clock driver.Signed-off-by: Kever Yang
Reviewed-by: Simon Glass -
PX5 EVB is designed by Rockchip for automotive field
with integrated CVBS (TP2825) / MIPI DSI / CSI / LVDS
HDMI video input/output interface, audio codec ES8396,
WIFI / BT (on RTL8723BS), Gsensor BMA250E and light&proximity
sensor STK3410.Signed-off-by: Andy Yan
Reviewed-by: Simon Glass -
The GeekBox is a TV box from GeekBuying, based on an MXM3 module.
The module can be used with base boards such as the GeekBox Landingship.
This adds basic support to chain-load U-Boot from Rockchip's miniloader.Signed-off-by: Andreas Färber
Signed-off-by: Andy Yan
Reviewed-by: Simon Glass -
Sheep board is designed by Rockchip as a EVB for rk3368.
Currently it is able to boot a linux kernel and system
to console with the miniloader run as fist level loader.Reviewed-by: Simon Glass
Signed-off-by: Andy Yan -
Add sysreset driver to reset rk3368 SOC.
Signed-off-by: Andy Yan
Reviewed-by: Simon Glass -
The RK3368 is an octa-core Cortex-A53 SoC from Rockchip.
This adds basic support to chain-load U-Boot from Rockchip's
miniloader.Signed-off-by: Andreas Färber
Signed-off-by: Andy Yan
Reviewed-by: Simon Glass -
Add driver to support iomux setup for the most commonly
used peripherals on rk3368.Signed-off-by: Andy Yan
Reviewed-by: Simon Glass -
Add driver to setup the various PLLs and peripheral
clocks on the RK3368.Signed-off-by: Andy Yan
Reviewed-by: Simon Glass
