05 Nov, 2019
17 commits
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i.MX8MN support loading images with rom api, so we implement
reuse board_return_to_bootrom to let ROM loading images.Signed-off-by: Peng Fan
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i.MX8MN follow same logic as i.MX8MM, so use spl_board_boot_device
Signed-off-by: Peng Fan
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Add pin header for i.MX8MN
Signed-off-by: Peng Fan
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i.MX8MN does not have LVTTL, it has a PE property
Signed-off-by: Peng Fan
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Set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to
generated AXI bus errors with TZC380 enabled.Signed-off-by: Peng Fan
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i.MX8MN has similar architecture with i.MX8MM, so it could reuse
the clock code of i.MX8MM, but i.MX8MN has different CCM root
configurations, so need a separate root entry.Signed-off-by: Peng Fan
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Add a dummy cpu type and support get_cpu_rev for i.MX8MN
Signed-off-by: Peng Fan
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Add i.MX8MN kconfig entry
Signed-off-by: Peng Fan
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The power domain tree is not accepted by Linux Kernel upstream.
only a single pd node is used currently, as following:pd: imx8qx-pd {
compatible = "fsl,imx8qm-scu-pd", "fsl,scu-pd";
#power-domain-cells = ;
};So to migrate to use upstream linux dts, we also need a driver
to support this.This patch is to support the new method, compared with legacy power
domain tree, it will be simpiler, because each device will
has resource id as power domain index, it will be directly passed
to scfw, and no need to let power domain build that tree. If multiple
power domain is needed, it is the dts node should has correctly power
domains entry added and sequence correct.Signed-off-by: Peng Fan
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The current i.MX8 power domain driver is based on i.MX vendor
power domain tree which will retire later.The Linux upstream use a single pd node for power domain driver,
and U-Boot will adopt that. When U-Boot i.MX8 dts synced with
Linux Kernel upstream and related driver ready, the legacy
driver will be removed.Signed-off-by: Peng Fan
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clk and pinctrl will be get(probed) during each device probe,
we don't need to probe them in scu driver. Only need to bind the sub-nodes
(clk and iomuxc) of MU node with their drivers.So drop the code to probe the clk/pinctrl, and this patch will make it
easy to add more subnodes.Signed-off-by: Peng Fan
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lpuart0 is the uart used by SPL and U-Boot proper, and DM_SERIAL
is enabled. Since uclass power domain is also enabled, to make
lpuart work properly, need add u-boot,dm-spl for lpuart power domain
and its parent.Signed-off-by: Peng Fan
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lpuart0 is the uart used by SPL and U-Boot proper, and DM_SERIAL
is enabled. Since uclass power domain is also enabled, to make
lpuart work properly, need add u-boot,dm-spl for lpuart power domain
and its parent.Signed-off-by: Peng Fan
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with u-boot,dm-spl added for imx8qm-pm node, and SPL_SIMPLE_BUS enabled,
the bind and probe code in board file could be removed.Also we need to enlarge SYS_MALLOC_F_LEN to avoid calloc fail.
Signed-off-by: Peng Fan
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u-boot-imx-20191104
-------------------- i.MX NAND: nandbcb support for MX6UL / i.MX7
- i.MX8: support for HAB
- Convert to DM (opos6ul, mccmon6)
- Toradex i.MX6ull colibri
- sync DTS with kernelTravis : https://travis-ci.org/sbabic/u-boot-imx/builds/606853416
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- Various CPSW related improvements, DTS resync
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Conver TI CPSW driver to use dev/ofnode api.
Signed-off-by: Grygorii Strashko
[trini: Add to provide the prototype to ofnode]
Signed-off-by: Tom Rini
04 Nov, 2019
23 commits
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- Add support for Intel FSP-S and FSP-T in binman
- Correct priority selection for image loaders for SPL
- Add a size check for TPL
- Various small SPL/TPL bug fixes and changes
- SPI: Add support for memory-mapped flash -
We have once again reached a point where this board does not build in
some cases with supported toolchains due to reaching a size constraint.
To regain some space, disable support for Plan 9 / RTEMS images with the
bootm command.Acked-by: Stefano Babic
Signed-off-by: Tom Rini -
Add subcommand for add writing BCB only, where we provide appropriate
offsets for firmware1 and firmware2 and size.Example of usage:
> nandbcb bcbonly 0x00180000 0x00080000 0x00200000
Writing 1024 bytes to 0x0: randomizing
OK
Writing 1024 bytes to 0x20000: randomizing
OKSigned-off-by: Igor Opaniuk
Tested-by: Max Krummenacher
Reviewed-by: Oleksandr Suvorov -
Move code for writing FCB/DBBT pages to a separate function
Signed-off-by: Igor Opaniuk
Tested-by: Max Krummenacher
Reviewed-by: Oleksandr Suvorov -
Add support for updating FCB/DBBT on i.MX7:
- additional new fields in FCB structure
- Leverage hardware BCH/randomizer for writing FCBSigned-off-by: Igor Opaniuk
Tested-by: Max Krummenacher
Reviewed-by: Oleksandr Suvorov -
On i.MX7 in a sake of reducing the disturbances caused by a neighboring
cells in the FCB page in the NAND chip, a randomizer is enabled when
reading the FCB page by ROM bootloader.Add API for setting BCH to specific layout (and restoring it back) used by
ROM bootloader to be able to burn it in a proper way to NAND using
nandbcb command.Signed-off-by: Igor Opaniuk
Signed-off-by: Anti Sullin
Tested-by: Max Krummenacher
Reviewed-by: Oleksandr Suvorov -
Extend GPMI Integrated ECC Control Register Description, include
additional defines for enabling randomizer function and providing
proper randomizer type.For additional details check i.MX7 APR, section
9.6.6.3 GPMI Integrated ECC Control Register Description
(GPMI_ECCCTRLn)Signed-off-by: Igor Opaniuk
Tested-by: Max Krummenacher
Reviewed-by: Oleksandr Suvorov -
We have once again reached a point where this board does not build in
some cases with supported toolchains due to reaching a size constraint.
To regain some space, disable support for Plan 9 / RTEMS images with the
bootm command.Signed-off-by: Tom Rini
Acked-by: Stefano Babic -
Add i.MX8QM ROM 7720a1 board support
Boot log as below:
U-Boot 2019.10-rc3-00004-gd073e0242f (Sep 20 2019 - 08:24:13 +0200)CPU: NXP i.MX8QM RevB A53 at 1200 MHz
Model: Advantech iMX8QM Qseven series
Board: ROM-7720-A1 4GB
Build: SCFW 65afe5f6
Boot: SD2
DRAM: 4 GiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In: serial@5a060000
Out: serial@5a060000
Err: serial@5a060000
Net: eth0: ethernet@5b040000Could not get PHY for FEC1: addr 1
, eth-1: ethernet@5b050000
Hit any key to stop autoboot: 0Signed-off-by: Oliver Graute
Cc: Stefano Babic
Cc: Fabio Estevam
Cc: Peng Fan
Cc: Simon Glass
Cc: Ye Li
Cc: uboot-imx -
Sync dts for i.MX8MM from Linux Kernel 5.4.0-rc1
Signed-off-by: Peng Fan
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This commit adds support for the brppt2 board. The board is based on the
i.mx6 dual-lite SoC.Signed-off-by: Hannes Schmelzer
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Borrow ID reading code from Ye Li (NXP U-Boot, commit ID 5b443e3e2617)
but drop imx-mkimage commit ID reading since we now use in tree mkimage.Signed-off-by: Anatolij Gustschin
Reviewed-by: Peng Fan -
Need to pass total 5 arguments for SIP HAB call on i.MX8MQ,
so update the interface to add new argument.Signed-off-by: Ye Li
[agust: fixed imx8m-power-domain build]
Signed-off-by: Anatolij Gustschin
Reviewed-by: Patrick Wildt
Reviewed-by: Peng Fan -
Add secure boot script, use ahab to verify image
Signed-off-by: Peng Fan
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Add secure boot script, use ahab to verify image
Signed-off-by: Peng Fan
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Add function and new command "auth_cntr" for secure boot support.
When booting with life cycle set to OEM closed, we need to use
this function to authenticate the OS container and load kernel & FDT
from OS container to their destination.Also add image authentication call when loading container images.
Users can set CONFIG_AHAB_BOOT=y to enable the feature. It is not
set at default.Signed-off-by: Ye Li
Signed-off-by: Peng Fan -
Enable bd71837 pmic for i.MX8MM EVK board, need to set voltage for
DRAM and linux suspend voltage requirement.Signed-off-by: Peng Fan
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We are going to add i2c pmic support before dram could be used.
So we need enable clk driver earlier, so use spl_early_init
and move clock controller probe eariler to board_init_f.Signed-off-by: Peng Fan
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Add CONFIG_SPL_DM_PMIC_BD71837 to make this driver could be
used in SPL stageSigned-off-by: Peng Fan
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Drop DEBUG macro definition which is used for debug purpose.
Signed-off-by: Peng Fan
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Import usb pd bindings from Linux 5.4.0-rc1.
This file will be included by imx8mm-evk.dts.Signed-off-by: Peng Fan
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It will be easy to separate SD/EMMC when booting in SPL stage, then
no need to bother which device is BOOT_DEVICE_MMC1/2.Signed-off-by: Peng Fan
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Add init_nand_clk to enable gpmi nand clock. Since i.MX8MQ not use CCF,
so we still use legacy mode to configure the clock.Signed-off-by: Peng Fan