19 Jul, 2019
19 commits
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Writing/updating boot image in nand device is not
straight forward in i.MX6 platform and it requires
boot control block(BCB) to be configured.It becomes difficult to use uboot 'nand' command to
write BCB since it requires platform specific attributes
need to be taken care of.It is even difficult to use existing msx-nand.c driver by
incorporating BCB attributes like mxs_dma_desc does
because it requires change in mtd and nand command.So, cmd_nandbcb implemented in arch/arm/mach-imx
BCB contains two data structures, Firmware Configuration Block(FCB)
and Discovered Bad Block Table(DBBT). FCB has nand timings,
DBBT search area, page address of firmware.On summary, nandbcb update will
- erase the entire partition
- create BCB by creating 2 FCB/DBBT block followed by
1 FW block based on partition size and erasesize.
- fill FCB/DBBT structures
- write FW/SPL on FW1
- write FCB/DBBT in first 2 blocksfor nand boot, up on reset bootrom look for FCB structure in
first block's if FCB found the nand timings are loaded for
further reads. once FCB read done, DTTB will load and finally
firmware will be loaded which is boot image.Refer section "NAND Boot" from doc/imx/common/imx6.txt for more usage
information.Reviewed-by: Stefano Babic
Signed-off-by: Jagan Teki
Signed-off-by: Sergey Kubushyn
Signed-off-by: Shyam Saini -
The clock subsystem needs active maintenance as it steadily grows.
I do offer my help for this task.Signed-off-by: Lukasz Majewski
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Enable by default the Common Clock Framework [CCF] clock code for sandbox.
Signed-off-by: Lukasz Majewski
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This patch provides code to implement the CCF clock tree in sandbox. It
uses all the introduced primitives; some generic ones are reused, some
sandbox specific were developed.In that way (after introducing the real CCF tree in sandbox) the recently
added to clk-uclass.c: clk_get_by_id() and clk_get_parent_rate() are tested
in their natural work environment.Usage (sandbox_defconfig and sandbox_flattree_defconfig):
./u-boot --fdt arch/sandbox/dts/test.dtb --command "ut dm clk_ccf"Signed-off-by: Lukasz Majewski
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The generic mux clock code for CCF requires reading the clock multiplexer
value from HW registers. As sandbox by design has readl() as no-op it was
necessary to provide this value in the other way.The new field in the mux structure (accessible only when sandbox is run)
has been introduced for this purpose.Signed-off-by: Lukasz Majewski
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The generic divider clock code for CCF requires reading the divider value
from HW registers. As sandbox by design has readl() as no-op it was
necessary to provide this value in the other way.The new field in the divider structure (accessible only when sandbox is
run) has been introduced for this purpose.Signed-off-by: Lukasz Majewski
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This patch adds the 'osc' fixed clock to facilitate the CCF testing in
the sandbox U-Boot. It is a starting point for building CCF hierarchy of
clocks.Signed-off-by: Lukasz Majewski
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If the CLK_GET_RATE_NOCACHE flag is set - the clk_get_parent_rate()
provides recalculated clock value without considering the cache setting.This may be necessary for some clocks tightly coupled with power domains
(i.e. imx8), and prevents from reading invalid cached values.Signed-off-by: Lukasz Majewski
Reviewed-by: Peng Fan -
This patch brings the files from Linux kernel (linux-stable/linux-5.1.y
SHA1: 5752b50477da)to provide clocks support as it is used on the Linux
kernel with Common Clock Framework [CCF] setup.The directory structure has been preserved. The ported code only supports
reading information from PLL, MUX, Divider, etc and enabling/disabling
the clocks USDHCx/ECSPIx depending on used bus. Moreover, it is agnostic
to the alias numbering as the information about the clock is read from the
device tree.One needs to pay attention to the comments indicating necessary for U-Boot's
driver model changes.If needed, the code can be extended to support the "set" part of the clock
management.Signed-off-by: Lukasz Majewski
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This commit adds the clk_get_by_id() function, which is responsible
for getting the udevice with matching clk->id. Such approach allows
re-usage of inherit DM list relationship for the same class (UCLASS_CLK).
As a result - we don't need any other external list - it is just enough
to look for UCLASS_CLK related udevices.Signed-off-by: Lukasz Majewski
Reviewed-by: Peng Fan -
This commit adds the clk_get_parent_rate() function, which is responsible
for getting the rate of parent clock.
Unfortunately, u-boot's DM support for getting parent is different
(the parent relationship is in udevice) than the one in Common Clock
Framework [CCF] in Linux.To alleviate this problem - the clk_get_parent_rate() function has been
introduced to clk-uclass.c.Signed-off-by: Lukasz Majewski
Reviewed-by: Peng Fan -
This commit adds the clk_get_parent() function, which is responsible
for getting the parent's struct clock pointer.U-Boot's DM support for getting parent is different (the parent
relationship is in udevice) than the one in Common Clock Framework [CCF]
in Linux. To obtain the pointer to struct clk of parent the
pdev->uclass_priv field is read via dev_get_clk_ptr() wrapper.Signed-off-by: Lukasz Majewski
Reviewed-by: Peng Fan -
This file now stores the dev_get_clk_ptr() wrapper on the dev_get_uclass_priv()
function.Signed-off-by: Lukasz Majewski
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Up till now the fixed rate clock ('osc') has been added to UCLASS_CLK
without declaring struct clk. As a result it was only accessible by
iterating the udevice's uclass list.This is a problem for clock code, which operates on pointers to struct
clk (like clk_get_rate()), not udevices.After this change struct clk is accessible from udevice and udevice from
struct clk.Signed-off-by: Lukasz Majewski
Reviewed-by: Peng Fan -
This commit extends the struct clk to provide information regarding the
flags related to this devices.Those flags are clk device agnostic and indicate generic features
(like e.g. CLK_GET_RATE_NOCACHE - the need to always recalculate the rate).Signed-off-by: Lukasz Majewski
Reviewed-by: Peng Fan -
This commit extends the struct clk to provide information regarding the
clock rate.
As a result the clock tree traversal is performed at most once, and further
reads are using the cached value.Signed-off-by: Lukasz Majewski
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This check requires the struct clk passed to .get_rate() to be always
cleared out as any clock with valid ID causes -EINVAL return value.The return code of fixed clocks shall always be returned.
Signed-off-by: Lukasz Majewski
Reviewed-by: Peng Fan -
There is no UCLASS_CLOCK uclass defined. Instead we do use the UCLASS_CLK.
Signed-off-by: Lukasz Majewski
Reviewed-by: Simon Glass
Reviewed-by: Peng Fan -
This patch describes the design decisions considerations and taken approach
for porting in a separate documentation entry.Signed-off-by: Lukasz Majewski
18 Jul, 2019
21 commits
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- Various FS/disk related fixes with security implications.
- Proper fix for the pci_ep test.
- Assorted bugfixes
- Some MediaTek updates.
- 'env erase' support. -
We now have a proper fix for this test, stop disabling it in CI.
This reverts commit ae8d23a668755d804748a1cf848426b28338b3d5.
Signed-off-by: Tom Rini
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barno was mistakely readed from the target structure,
resulting in undefined behavious depending on the previous memory
content. fix that.Fixes: bb413337826e ("pci_ep: add pci endpoint sandbox driver")
Signed-off-by: Ramon Fried
[trini: Drop unused bar_idx]
Signed-off-by: Tom Rini -
Removed one of the defconfig(obsoleted) file
and unused CONFIG_MMC_SPI definition to avoid confusion
about if this board using non-DM stuff or not.
uCP1020 is completely DM free board, tested and runs well.Signed-off-by: Oleksandr Zhadan
Signed-off-by: Michael Durrant
Reviewed-by: Bin Meng -
Some storage devices have multiple hw partitions and both address from
zero, for example eMMC.
However currently block cache invalidation only applies to block
write/erase.
This can cause a problem that data of current hw partition is cached
before switching to another hw partition. And the following read
operation of the latter hw partition will get wrong data when reading
from the addresses that have been cached previously.To solve this problem, invalidate block cache after a successful
select_hwpart operation.Signed-off-by: Weijie Gao
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This patch removes tick-timer as all mt7629 boards should use arch timer.
Signed-off-by: Weijie Gao
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This patch changes mt7629_rfb to use ARM's generic arch timer instead of
MediaTek's soc timer.Signed-off-by: Weijie Gao
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The timer0 node has its two clocks written in reversed order. The timer0
is used as the tick timer which causes a problem that the time a delay
function used is 4 times longer.This patch reverses these two clocks to solve this issue.
Signed-off-by: Weijie Gao
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We don't need a full checkout of Chrome OS to build U-Boot with
Chromium OS verified boot. Update the instructions accordingly and fix a
typo which joins the output directory and defconfig.Signed-off-by: Simon Glass
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This patch sets CNTVOFF of ARM CP15 timer to zero to make sure the virtual
counter is fully usable for linux kernel.Cc: Albert Aribaud
Signed-off-by: Weijie Gao -
%s/ot/to/
Signed-off-by: Anatolij Gustschin
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In ext4fs_read_file in ext4fs.c, a memset can overwrite the bounds of
the destination memory region. This patch adds a check to disallow
this.Signed-off-by: Paul Emge
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This patch checks for 0 in several ext4 headers and gracefully
fails instead of raising a divide-by-0 exception.Signed-off-by: Paul Emge
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in ext4fs_read_file, it is possible for a broken/malicious file
system to cause a memcpy of a negative number of bytes, which
overflows all memory. This patch fixes the issue by checking for
a negative length.Signed-off-by: Paul Emge
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ext_cache_read doesn't null cache->buf, after freeing, which results
in a later function double-freeing it. This patch fixes
ext_cache_read to call ext_cache_fini instead of free.Signed-off-by: Paul Emge
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part_get_info_extended and print_partition_extended can recurse infinitely
while parsing a self-referential filesystem or one with a silly number of
extended partitions. This patch adds a limit to the number of recursive
partitions.Signed-off-by: Paul Emge
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libvirt v.5.3.0 with QEMU 4.0.0 or above uses PCI automatically and
thus devices (network, storage, etc) are connected via PCI.Signed-off-by: David Abdurachmanov
Reviewed-by: Bin Meng -
If U-Boot is loaded and started from TF-A (you need to change
SYS_TEXT_BASE to 0x60000000), it will hang up at flash initialization.If secure mode is off (default, or -machine virt,secure=off) at qemu,
it will provide dtb with two flash memory banks:
flash@0 {
bank-width = ;
reg = ;
compatible = "cfi-flash";
};
If secure mode is on, on the other hand, qemu provides dtb with 1 bank:
flash@0 {
bank-width = ;
reg = ;
compatible = "cfi-flash";
};As a result, flash_init()/flash_get_size() will eventually fail.
With this patch applied, relevant CONFIG values are modified.Signed-off-by: AKASHI Takahiro
Tested-by: Heinrich Schuchardt -
Currently, CONFIG_TFABOOT is located in armv8/fsl-layerscape Kconfig,
but it will be also useful for other targets if some additional
configuration are necessary.
So move it to arch/arm/Kconfig.Please note that CONFIG_TFABOOT still depends on
CONFIG_ARCH_SUPPORT_TFABOOT and so the menu won't come up
if any target doesn't need its own customization for TF-A boot.
This will maintain the compatibility.Signed-off-by: AKASHI Takahiro
Cc: Rajesh Bhagat
Cc: York Sun
Cc: Prabhakar Kushwaha
Cc: Priyanka Jain
Cc: Sriram Dash
Cc: Hou Zhiqiang
Cc: Peng Ma
Cc: Yuantian Tang
Cc: Pankit Garg -
Signed-off-by: Sam Protsenko
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This command fills the memory with data produced by rand().
Signed-off-by: Jean-Jacques Hiblot
