11 Aug, 2018
2 commits
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Add test infrastructure and tests for the AXI uclass.
Reviewed-by: Simon Glass
Signed-off-by: Mario Six -
Add a uclass for AXI (Advanced eXtensible Interface) busses, and a
driver for the gdsys IHS AXI bus on IHS FPGAs.Signed-off-by: Mario Six
Reviewed-by: Simon Glass