01 Nov, 2013

1 commit


24 Jul, 2013

1 commit


18 May, 2011

6 commits


28 Mar, 2011

1 commit


18 Nov, 2010

1 commit

  • Before this commit, weak symbols were not overridden by non-weak symbols
    found in archive libraries when linking with recent versions of
    binutils. As stated in the System V ABI, "the link editor does not
    extract archive members to resolve undefined weak symbols".

    This commit changes all Makefiles to use partial linking (ld -r) instead
    of creating library archives, which forces all symbols to participate in
    linking, allowing non-weak symbols to override weak symbols as intended.
    This approach is also used by Linux, from which the gmake function
    cmd_link_o_target (defined in config.mk and used in all Makefiles) is
    inspired.

    The name of each former library archive is preserved except for
    extensions which change from ".a" to ".o". This commit updates
    references accordingly where needed, in particular in some linker
    scripts.

    This commit reveals board configurations that exclude some features but
    include source files that depend these disabled features in the build,
    resulting in undefined symbols. Known such cases include:
    - disabling CMD_NET but not CMD_NFS;
    - enabling CONFIG_OF_LIBFDT but not CONFIG_QE.

    Signed-off-by: Sebastien Carlier

    Sebastien Carlier
     

19 Oct, 2010

1 commit

  • The change is currently needed to be able to remove the board
    configuration scripting from the top level Makefile and replace it by
    a simple, table driven script.

    Moving this configuration setting into the "CONFIG_*" name space is
    also desirable because it is needed if we ever should move forward to
    a Kconfig driven configuration system.

    Signed-off-by: Wolfgang Denk

    Wolfgang Denk
     

03 Sep, 2010

2 commits

  • Use the MMU hardware to set up 1:1 mappings between physical and virtual
    addresses. This allows us to bypass the cache when accessing the flash
    without having to do any physical-to-virtual address mapping in the CFI
    driver.

    The virtual memory mappings are defined at compile time through a sorted
    array of virtual memory range objects. When a TLB miss exception
    happens, the exception handler does a binary search through the array
    until it finds a matching entry and loads it into the TLB. The u-boot
    image itself is covered by a fixed TLB entry which is never replaced.

    This makes the 'saveenv' command work again on ATNGW100 and other boards
    using the CFI driver, hopefully without breaking any rules.

    Signed-off-by: Haavard Skinnemoen

    Haavard Skinnemoen
     
  • The paging system which is required to set up caching properties has not
    yet been initialized when the SDRAM is initialized. So when the
    map_physmem() function is converted to return the physical address
    unchanged, the SDRAM initialization will break on some boards.

    The avr32-specific uncached() macro will return an address which will
    always cause uncached accessed to be made. Since this happens in the
    board code, using avr32-specific features should be ok, and will allow
    the SDRAM initialization to keep working.

    Signed-off-by: Haavard Skinnemoen

    Haavard Skinnemoen
     

23 Mar, 2009

1 commit


21 Mar, 2009

1 commit

  • A recent gcc added a new unaligned rodata section called '.rodata.str1.1',
    which needs to be added the the linker script. Instead of just adding this
    one section, we use a wildcard ".rodata*" to get all rodata linker section
    gcc has now and might add in the future.

    However, '*(.rodata*)' by itself will result in sub-optimal section
    ordering. The sections will be sorted by object file, which causes extra
    padding between the unaligned rodata.str.1.1 of one object file and the
    aligned rodata of the next object file. This is easy to fix by using the
    SORT_BY_ALIGNMENT command.

    This patch has not be tested one most of the boards modified. Some boards
    have a linker script that looks something like this:

    *(.text)
    . = ALIGN(16);
    *(.rodata)
    *(.rodata.str1.4)
    *(.eh_frame)

    I change this to:

    *(.text)
    . = ALIGN(16);
    *(.eh_frame)
    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))

    This means the start of rodata will no longer be 16 bytes aligned.
    However, the boundary between text and rodata/eh_frame is still aligned to
    16 bytes, which is what I think the real purpose of the ALIGN call is.

    Signed-off-by: Trent Piepho

    Trent Piepho
     

17 Dec, 2008

1 commit

  • Conflicts:

    board/atmel/atngw100/atngw100.c
    board/atmel/atstk1000/atstk1000.c
    cpu/at32ap/at32ap700x/gpio.c
    include/asm-avr32/arch-at32ap700x/clk.h
    include/configs/atngw100.h
    include/configs/atstk1002.h
    include/configs/atstk1003.h
    include/configs/atstk1004.h
    include/configs/atstk1006.h
    include/configs/favr-32-ezkit.h
    include/configs/hammerhead.h
    include/configs/mimc200.h

    Haavard Skinnemoen
     

03 Sep, 2008

1 commit


01 Sep, 2008

4 commits

  • Replace the avr32-specific board_init_info hook by the standard
    board_early_init_r hook and make it optional.

    board_early_init_r() runs somewhat earlier than board_init_info used to
    do, but this isn't a problem for any of the in-tree boards.

    Signed-off-by: Haavard Skinnemoen

    Haavard Skinnemoen
     
  • Replace the avr32-specific gclk_init() board hook with the standard
    board_postclk_init() hook which is supposed to run at the same point
    during initialization.

    Provide a dummy weak alias for boards not implementing this hook. The
    cost of this is:
    - 2 bytes for the dummy function (retal 0)
    - 2 bytes for each unnecessary function call (short rcall)

    which is a pretty small price to pay for avoiding lots of #ifdef
    clutter. In this particular case, all boards probably end up slightly
    smaller because we avoid the conditional checking if the gclk_init
    symbol is NULL.

    Signed-off-by: Haavard Skinnemoen

    Haavard Skinnemoen
     
  • Use the new gclk helper functions to set up the PHY clock instead of
    accessing the PM registers directly.

    Signed-off-by: Haavard Skinnemoen

    Haavard Skinnemoen
     
  • - Separate the portmux configuration functionality from the GPIO pin
    control API.
    - Separate the controller-specific code from the chip-specific code.
    - Allow "ganged" port configuration (multiple pins at once).
    - Add more flexibility to the "canned" peripheral select functions:
    - Allow using more than 23 address bits, more chip selects, as
    well as NAND- and CF-specific pins.
    - Make the MACB SPEED pin optional, and choose between MII/RMII
    using a parameter instead of an #ifdef.
    - Make it possible to use other MMC slots than slot 0, and support
    different MMC/SDCard data bus widths.
    - Use more reasonable pull-up defaults; floating pins may consume a
    lot of power.
    - Get rid of some custom portmux code from the mimc200 board code. The
    old gpio/portmux API couldn't really handle its requirements, but
    the new one can.
    - Add documentation.

    The end result is slightly smaller code for all boards. Which isn't
    really the point, but at least it isn't any larger.

    This has been verified on ATSTK1002 and ATNGW100. I'd appreciate if
    the board maintainers could help me test this on their boards. In
    particular, the mimc200 port has lost a lot of code, so I'm hoping Mark
    can help me out.

    Signed-off-by: Haavard Skinnemoen
    Cc: Hans-Christian Egtvedt
    Cc: Mark Jackson
    Cc: Alex Raimondi
    Cc: Julien May

    Changes since v1:
    * Enable pullup on NWAIT
    * Add missing include to portmux-pio.h
    * Rename CONFIG_PIO2 -> CONFIG_PORTMUX_PIO to match docs

    Haavard Skinnemoen
     

30 Jul, 2008

1 commit

  • The Hammerhead platform is built around a AVR32 32-bit microcontroller
    from Atmel. It offers versatile peripherals, such as ethernet, usb
    device, usb host etc.

    The board also incooperates a power supply and is a Power over Ethernet
    (PoE) Powered Device (PD).

    Additonally, a Cyclone III FPGA from Altera is integrated on the board.
    The FPGA is mapped into the 32-bit AVR memory bus. The FPGA offers two
    DDR2 SDRAM interfaces, which will cover even the most exceptional need
    of memory bandwidth. Together with the onboard video decoder the board
    is ready for video processing.

    For more information see: http:///www.miromico.com/hammerhead

    Signed-off-by: Julien May
    [haavard.skinnemoen@atmel.com: various small fixes and adaptions]
    Signed-off-by: Haavard Skinnemoen

    Julien May