27 Oct, 2017
5 commits
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Use Kconfig to select QE-HDLC and USB pin-mux.
Signed-off-by: Ran Wang
Reviewed-by: Bin Meng
Reviewed-by: York Sun -
Since TX delay is now enabled only in PHY_INTERFACE_MODE_RGMII_ID
PHY_INTERFACE_MODE_RGMII_TXID.These change where introduced in phy driver in commit 05b29aa0cb68
("net: phy: realtek: fix enabling of the TX-delay for RTL8211F").Signed-off-by: Ashish Kumar
Reviewed-by: York Sun -
On ls1012a soc, core clock source frequency is fixed at 100Mhz.
Generic timer frequency is core clock source divided by 4, which
is 25Mhz.Signed-off-by: Tang Yuantian
Reviewed-by: York Sun -
Signed-off-by: Ashish Kumar
Reviewed-by: York Sun -
Memory allocated via malloc is not guaranteed to be zeroized.
So explicitly use calloc instead of malloc.Signed-off-by: Prabhakar Kushwaha
Reviewed-by: York Sun
24 Oct, 2017
1 commit
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Commit 06ad970b53a3 ("powerpc: mpc85xx: Implemente workaround for CPU
erratum A-007907") clears L1CSR2 for the boot core, but other cores
don't run through the workaround. Add similar code for secondary
cores to clear DCSTASHID field in L1CSR2 register.Signed-off-by: York Sun
23 Oct, 2017
9 commits
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Commit dd74b945af2e ("ARM: uniphier: use pr_() instead of printf()
where appropriate"), but I missed to update this file for some reason.Signed-off-by: Masahiro Yamada
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Add a simple documentation about how to use the Verified Boot on
UniPhier boards.Signed-off-by: Masahiro Yamada
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If the environment "verify" is set to n, the image verification
is entirely skipped. Remove it as a preparation for verified boot.Signed-off-by: Masahiro Yamada
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The default value of CONFIG_SYS_BOOTM_LEN, 0x800000, causes error
when uncompressing Image.gz out of FIT image.Uncompressing Kernel Image ... Error: inflate() returned -5
Image too large: increase CONFIG_SYS_BOOTM_LENSigned-off-by: Masahiro Yamada
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Signed-off-by: Masahiro Yamada
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UniPhier 32-bit SoCs use CONFIG_SPL_OF_CONTROL. So, many nodes must
be marked as dm-pre-reloc to prevent fdtgrep from stripping them off.Sprinkling U-Boot-specific properties all over the place is painful
because DT files are synced with Linux from time to time.Split u-boot,dm-pre-reloc out to uniphier-v7-u-boot.dtsi, which is
appended to UniPhier V7 DTS before the build.Signed-off-by: Masahiro Yamada
Reviewed-by: Jagan Teki -
The option is never enabled by anyone. Remove the code surrounded
by its ifdef. This should be handled by the clock/reset drivers.CONFIG_UNIPHIER_ETH in scripts/config_whitelist.txt will be dropped
by the next resync.Signed-off-by: Masahiro Yamada
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I thought commit d37d31849c6a ("ARM: uniphier: enable DWC3 xHCI
driver") enabled CONFIG_USB_DWC3_UNIPHIER, but CONFIG_USB_XHCI_DWC3
was missing in uniphier_v7_defconfig. Re-add.Signed-off-by: Masahiro Yamada
21 Oct, 2017
3 commits
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This was dropped by accident in the Kconfig conversion.
Signed-off-by: Tom Rini
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We add the various SMC91XX symbols to drivers/net/Kconfig and then this
converts the following to Kconfig:
CONFIG_SMC911X
CONFIG_SMC911X_BASE
CONFIG_SMC911X_16_BIT
CONFIG_SMC911X_32_BITSigned-off-by: Adam Ford
[trini: Apply to the rest of the tree, re-squash old and new patch]
Signed-off-by: Tom Rini -
This converts the following to Kconfig:
CONFIG_NAND_MXC
CONFIG_NAND_OMAP_GPMC
CONFIG_NAND_OMAP_GPMC_PREFETCH
CONFIG_NAND_OMAP_ELM
CONFIG_SPL_NAND_AM33XX_BCH
CONFIG_SPL_NAND_SIMPLE
CONFIG_SYS_NAND_BUSWIDTH_16BITSigned-off-by: Adam Ford
Reviewed-by: Heiko Schocher
[trini: Finish migration of CONFIG_SPL_NAND_SIMPLE, fix some build issues,
add CONFIG_NAND_MXC so we can do CONFIG_SYS_NAND_BUSWIDTH_16BIT]
Signed-off-by: Tom Rini
19 Oct, 2017
9 commits
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I've missed to add the ACPI resume support to this x86 build target.
This patch adds the ACPI resume support enabling S3 suspend /
resume.Signed-off-by: Stefan Roese
Cc: Bin Meng
Cc: Simon Glass
Reviewed-by: Bin Meng -
Up to now we depended on an exported variable to build u-boot.rom.
We should be able to specify it in the configuration file, too.With this patch this becomes possible using the new Kconfig option
CONFIG_BUILD_ROM.This option depends on CONFIG_X86 and is selected in
qemu-x86_defconfig and qemu-x86_64_defconfig.Cc: Simon Glass
Cc: Bin Meng
Signed-off-by: Heinrich Schuchardt
Reviewed-by: Bin Meng -
Azalia configuration may be different across boards, hence it's not
appropriate to do that in the SoC level. Instead, let's make the
SoC update_fsp_azalia_configs() routine as a weak version, and do
the actual work in the board codes.So far it seems only som-db5800-som-6867 board enables the Azalia.
Move the original codes into som-db5800-som-6867.c.Signed-off-by: Bin Meng
Reviewed-by: Stefan Roese -
At present we directly pass the Azalia config pointer to the FSP UPD.
This updates to use a function to do the stuff, like Braswell does.Signed-off-by: Bin Meng
Reviewed-by: Stefan Roese -
So far there are two copies of Azalia struct defines with one in
baytrail and the other one in braswell. This consolidates these
two into one, put it in the common place, and remove the prefix
pch_ to these structs to make their names more generic.This also corrects reset_wait_timer from us to ms.
Signed-off-by: Bin Meng
Reviewed-by: Stefan Roese -
This is only needed when graphics console is used. For kernel with
native graphics driver, this can be turned off to speed up.Change this option's default to n in the Kconfig.
Signed-off-by: Bin Meng
Reviewed-by: Stefan Roese -
It was observed that when booting a Ubuntu 16.04 kernel, doing ACPI
S3 suspend/resume sometimes causes the Ubuntu kernel hang forever.
The issue is however not reproduced with a kernel built from i386/
x86_64 defconfig configuration.The unstability is actually caused by unexpected interrupts being
generated during the S3 resume. For some unknown reason, FSP (gold4)
for BayTrail configures the GPIO DFX5 PAD to enable level interrupt
(bit 24 and 25). As this pin keeps generating interrupts during an
S3 resume, and there is no IRQ requester in the kernel to handle it,
the kernel seems to hang and does not continue resuming.Clear the mysterious interrupt bits for this pin.
Reported-by: Stefan Roese
Signed-off-by: Bin Meng
Tested-by: Stefan Roese
Reviewed-by: Stefan Roese -
Adjust VGA rom address to 0xfffb0000 so that u-boot.rom image
can be built again.Signed-off-by: Bin Meng
Reviewed-by: Stefan Roese
18 Oct, 2017
2 commits
17 Oct, 2017
7 commits
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Remove useless local variable "s" and use directly
function's parameter "output"Signed-off-by: Patrice Chotard
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As "v" is a local variable in stm32_i2c_choose_solution()
"v" has to be copied into "s" to avoid data abort in
stm32_i2c_compute_timing().Signed-off-by: Christophe Kerello
Reviewed-by: Patrick DELAUNAY
Signed-off-by: Patrice Chotard -
No global pointer is used in this file.
Signed-off-by: Masahiro Yamada
Reviewed-by: Heiko Schocher -
Signed-off-by: Tom Rini
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Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini
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On qemu errors like
assert 2.999650001525879 >= 3
occur.According to the comment in the code the test is meant to be
approximate. So we should accept some milliseconds less.Cc: Stephen Warren
Signed-off-by: Heinrich Schuchardt
Reviewed-by: Stephen Warren -
Update the script to version 0.26 (as of Linux v4.14-rc1)
Keep our "penguin_chief".
Keep our top_of_kernel_tree.The negative forms of the command line parameters are described
when using --help.New options are
--git-blame-signatures => when used with --git-blame,
also include all commit signers
--r => include reviewer(s) if any
--letters => print all matching 'letter' types
from all matching sectionsFile .get_maintainer.ignore can be used to specify
email addressees that shall be ignored.Signed-off-by: Heinrich Schuchardt
16 Oct, 2017
4 commits
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'commit fa24eca1f20a ("omap: Add routine for setting fastboot variables")'
adds initial support and usage of "fastboot getvar" command
for DRA75x and DRA72x devices.and
'commit 0f9e6aee9dbc ("arm: dra76: Add support for ES1.0 detection")'
adds initial dra76 device definitionThis patch is to extend usage of "fastboot getvar" for DRA76 device.
Signed-off-by: Praneeth Bajjuri
Reviewed-by: Tom Rini -
DRA71x processors are reduced pin and software compatible
derivative of DRA72 processors. Extend support for this
revision in "getvar cpu" command.Signed-off-by: Vishal Mahaveer
[praneeth@ti.com: rebase to u-boot master]
Signed-off-by: Praneeth Bajjuri
Reviewed-by: Tom Rini -
Add vendor partition to Android GPT table for eMMC.
A Vendor image contains SoC-specific code and configuration.
Prior to Android 8.0, the vendor partition was optional ;
files belonging to these images were placed in boot.img or system.img
with symlinks (such as /vendor >/system/vendor ) when absent.Android 8.0 makes the vendor partition mandatory
The goal is to modularize Android partitions with standard interface between
the Android Platform (on system.img ) and vendor-provided code(on vendor.img).This standard interface enables the Android Platform to be updated
without affecting the SoC partitions. This makes it possible to upgrade a
device system.img from Android 8.0 to Android P while other images (such as
vendor.img) remain at Android 8.0. This modularity enables timely
Android platform upgrades (such as monthly security updates )
without requiring SoC/ODM partners to update SoC- and device-specific code.Signed-off-by: Vishal Mahaveer
Signed-off-by: Praneeth Bajjuri
Reviewed-by: Tom Rini -
Add vendor partition to Android GPT table for eMMC.
A Vendor image contains SoC-specific code and configuration.
Prior to Android 8.0, the vendor partition was optional ;
files belonging to these images were placed in boot.img or system.img
with symlinks (such as /vendor >/system/vendor ) when absent.Android 8.0 makes the vendor partition mandatory
The goal is to modularize Android partitions with standard interface between
the Android Platform (on system.img ) and vendor-provided code(on vendor.img).This standard interface enables the Android Platform to be updated
without affecting the SoC partitions. This makes it possible to upgrade a
device system.img from Android 8.0 to Android P while other images (such as
vendor.img) remain at Android 8.0. This modularity enables timely
Android platform upgrades (such as monthly security updates )
without requiring SoC/ODM partners to update SoC- and device-specific code.Signed-off-by: Praneeth Bajjuri
Reviewed-by: Tom Rini
